]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/blob - queue-4.20/x86-boot-compressed-64-set-efer.lme-1-in-32-bit-tram.patch
Linux 4.14.106
[thirdparty/kernel/stable-queue.git] / queue-4.20 / x86-boot-compressed-64-set-efer.lme-1-in-32-bit-tram.patch
1 From e9a0b4d1c6e2191daf89936395bff640d313bdbc Mon Sep 17 00:00:00 2001
2 From: Wei Huang <wei@redhat.com>
3 Date: Thu, 3 Jan 2019 23:44:11 -0600
4 Subject: x86/boot/compressed/64: Set EFER.LME=1 in 32-bit trampoline before
5 returning to long mode
6
7 [ Upstream commit b677dfae5aa197afc5191755a76a8727ffca538a ]
8
9 In some old AMD KVM implementation, guest's EFER.LME bit is cleared by KVM
10 when the hypervsior detects that the guest sets CR0.PG to 0. This causes
11 the guest OS to reboot when it tries to return from 32-bit trampoline code
12 because the CPU is in incorrect state: CR4.PAE=1, CR0.PG=1, CS.L=1, but
13 EFER.LME=0. As a precaution, set EFER.LME=1 as part of long mode
14 activation procedure. This extra step won't cause any harm when Linux is
15 booted on a bare-metal machine.
16
17 Signed-off-by: Wei Huang <wei@redhat.com>
18 Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
19 Acked-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
20 Cc: bp@alien8.de
21 Cc: hpa@zytor.com
22 Link: https://lkml.kernel.org/r/20190104054411.12489-1-wei@redhat.com
23 Signed-off-by: Sasha Levin <sashal@kernel.org>
24 ---
25 arch/x86/boot/compressed/head_64.S | 8 ++++++++
26 arch/x86/boot/compressed/pgtable.h | 2 +-
27 2 files changed, 9 insertions(+), 1 deletion(-)
28
29 diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
30 index 64037895b085..f105ae8651c9 100644
31 --- a/arch/x86/boot/compressed/head_64.S
32 +++ b/arch/x86/boot/compressed/head_64.S
33 @@ -600,6 +600,14 @@ ENTRY(trampoline_32bit_src)
34 leal TRAMPOLINE_32BIT_PGTABLE_OFFSET(%ecx), %eax
35 movl %eax, %cr3
36 3:
37 + /* Set EFER.LME=1 as a precaution in case hypervsior pulls the rug */
38 + pushl %ecx
39 + movl $MSR_EFER, %ecx
40 + rdmsr
41 + btsl $_EFER_LME, %eax
42 + wrmsr
43 + popl %ecx
44 +
45 /* Enable PAE and LA57 (if required) paging modes */
46 movl $X86_CR4_PAE, %eax
47 cmpl $0, %edx
48 diff --git a/arch/x86/boot/compressed/pgtable.h b/arch/x86/boot/compressed/pgtable.h
49 index 91f75638f6e6..6ff7e81b5628 100644
50 --- a/arch/x86/boot/compressed/pgtable.h
51 +++ b/arch/x86/boot/compressed/pgtable.h
52 @@ -6,7 +6,7 @@
53 #define TRAMPOLINE_32BIT_PGTABLE_OFFSET 0
54
55 #define TRAMPOLINE_32BIT_CODE_OFFSET PAGE_SIZE
56 -#define TRAMPOLINE_32BIT_CODE_SIZE 0x60
57 +#define TRAMPOLINE_32BIT_CODE_SIZE 0x70
58
59 #define TRAMPOLINE_32BIT_STACK_END TRAMPOLINE_32BIT_SIZE
60
61 --
62 2.19.1
63