queue-4.4/mmc-sdhci-of-esdhc-add-erratum-esdhc5-support.patch

   1 From c1b088615ffed125ecf4966ea0cd3303244592b1 Mon Sep 17 00:00:00 2001
   2 From: Yinbo Zhu <yinbo.zhu@nxp.com>
   3 Date: Mon, 11 Mar 2019 02:16:36 +0000
   4 Subject: mmc: sdhci-of-esdhc: add erratum eSDHC5 support
   5
   6 [ Upstream commit a46e42712596b51874f04c73f1cdf1017f88df52 ]
   7
   8 Software writing to the Transfer Type configuration register
   9 (system clock domain) can cause a setup/hold violation in the
  10 CRC flops (card clock domain), which can cause write accesses
  11 to be sent with corrupt CRC values. This issue occurs only for
  12 write preceded by read. this erratum is to fix this issue.
  13
  14 Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  15 Acked-by: Adrian Hunter <adrian.hunter@intel.com>
  16 Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
  17 Signed-off-by: Sasha Levin <sashal@kernel.org>
  18 ---
  19  drivers/mmc/host/sdhci-of-esdhc.c | 3 +++
  20  1 file changed, 3 insertions(+)
  21
  22 diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
  23 index ac66c61d9433c..a5a11e7ab53b4 100644
  24 --- a/drivers/mmc/host/sdhci-of-esdhc.c
  25 +++ b/drivers/mmc/host/sdhci-of-esdhc.c
  26 @@ -624,6 +624,9 @@ static int sdhci_esdhc_probe(struct platform_device *pdev)
  27         if (esdhc->vendor_ver > VENDOR_V_22)
  28                 host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
  29
  30 +       if (of_find_compatible_node(NULL, NULL, "fsl,p2020-esdhc"))
  31 +               host->quirks2 |= SDHCI_QUIRK_RESET_AFTER_REQUEST;
  32 +
  33         if (of_device_is_compatible(np, "fsl,p5040-esdhc") ||
  34             of_device_is_compatible(np, "fsl,p5020-esdhc") ||
  35             of_device_is_compatible(np, "fsl,p4080-esdhc") ||
  36 --
  37 2.20.1
  38