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[thirdparty/kernel/stable-queue.git] / queue-4.9 / 0002-x86-cpufeatures-Hide-AMD-specific-speculation-flags.patch
1 From 34c52587df02423bc09e270fa770eb6d6145aad0 Mon Sep 17 00:00:00 2001
2 From: Ben Hutchings <ben@decadent.org.uk>
3 Date: Wed, 7 Nov 2018 17:09:42 +0000
4 Subject: [PATCH 02/76] x86/cpufeatures: Hide AMD-specific speculation flags
5
6 Hide the AMD_{IBRS,IBPB,STIBP} flag from /proc/cpuinfo. This was done
7 upstream as part of commit e7c587da1252 "x86/speculation: Use
8 synthetic bits for IBRS/IBPB/STIBP". That commit has already been
9 backported but this part was omitted.
10
11 Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
12 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 ---
14 arch/x86/include/asm/cpufeatures.h | 6 +++---
15 1 file changed, 3 insertions(+), 3 deletions(-)
16
17 diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
18 index 98444b77fbe3..e493a5836ff1 100644
19 --- a/arch/x86/include/asm/cpufeatures.h
20 +++ b/arch/x86/include/asm/cpufeatures.h
21 @@ -271,9 +271,9 @@
22 /* AMD-defined CPU features, CPUID level 0x80000008 (ebx), word 13 */
23 #define X86_FEATURE_CLZERO (13*32+0) /* CLZERO instruction */
24 #define X86_FEATURE_IRPERF (13*32+1) /* Instructions Retired Count */
25 -#define X86_FEATURE_AMD_IBPB (13*32+12) /* Indirect Branch Prediction Barrier */
26 -#define X86_FEATURE_AMD_IBRS (13*32+14) /* Indirect Branch Restricted Speculation */
27 -#define X86_FEATURE_AMD_STIBP (13*32+15) /* Single Thread Indirect Branch Predictors */
28 +#define X86_FEATURE_AMD_IBPB (13*32+12) /* "" Indirect Branch Prediction Barrier */
29 +#define X86_FEATURE_AMD_IBRS (13*32+14) /* "" Indirect Branch Restricted Speculation */
30 +#define X86_FEATURE_AMD_STIBP (13*32+15) /* "" Single Thread Indirect Branch Predictors */
31 #define X86_FEATURE_VIRT_SSBD (13*32+25) /* Virtualized Speculative Store Bypass Disable */
32
33 /* Thermal and Power Management Leaf, CPUID level 0x00000006 (eax), word 14 */
34 --
35 2.21.0
36