queue-4.9/0027-x86-speculation-Rename-SSBD-update-functions.patch

   1 From bdeeb3726f8fe6bc42bc6639bd034ecf4d5bb269 Mon Sep 17 00:00:00 2001
   2 From: Thomas Gleixner <tglx@linutronix.de>
   3 Date: Sun, 25 Nov 2018 19:33:34 +0100
   4 Subject: [PATCH 27/76] x86/speculation: Rename SSBD update functions
   5
   6 commit 26c4d75b234040c11728a8acb796b3a85ba7507c upstream.
   7
   8 During context switch, the SSBD bit in SPEC_CTRL MSR is updated according
   9 to changes of the TIF_SSBD flag in the current and next running task.
  10
  11 Currently, only the bit controlling speculative store bypass disable in
  12 SPEC_CTRL MSR is updated and the related update functions all have
  13 "speculative_store" or "ssb" in their names.
  14
  15 For enhanced mitigation control other bits in SPEC_CTRL MSR need to be
  16 updated as well, which makes the SSB names inadequate.
  17
  18 Rename the "speculative_store*" functions to a more generic name. No
  19 functional change.
  20
  21 Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
  22 Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
  23 Reviewed-by: Ingo Molnar <mingo@kernel.org>
  24 Cc: Peter Zijlstra <peterz@infradead.org>
  25 Cc: Andy Lutomirski <luto@kernel.org>
  26 Cc: Linus Torvalds <torvalds@linux-foundation.org>
  27 Cc: Jiri Kosina <jkosina@suse.cz>
  28 Cc: Tom Lendacky <thomas.lendacky@amd.com>
  29 Cc: Josh Poimboeuf <jpoimboe@redhat.com>
  30 Cc: Andrea Arcangeli <aarcange@redhat.com>
  31 Cc: David Woodhouse <dwmw@amazon.co.uk>
  32 Cc: Andi Kleen <ak@linux.intel.com>
  33 Cc: Dave Hansen <dave.hansen@intel.com>
  34 Cc: Casey Schaufler <casey.schaufler@intel.com>
  35 Cc: Asit Mallick <asit.k.mallick@intel.com>
  36 Cc: Arjan van de Ven <arjan@linux.intel.com>
  37 Cc: Jon Masters <jcm@redhat.com>
  38 Cc: Waiman Long <longman9394@gmail.com>
  39 Cc: Greg KH <gregkh@linuxfoundation.org>
  40 Cc: Dave Stewart <david.c.stewart@intel.com>
  41 Cc: Kees Cook <keescook@chromium.org>
  42 Link: https://lkml.kernel.org/r/20181125185004.058866968@linutronix.de
  43 Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
  44 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  45 ---
  46  arch/x86/include/asm/spec-ctrl.h |  6 +++---
  47  arch/x86/kernel/cpu/bugs.c       |  4 ++--
  48  arch/x86/kernel/process.c        | 12 ++++++------
  49  3 files changed, 11 insertions(+), 11 deletions(-)
  50
  51 diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h
  52 index ae7c2c5cd7f0..8e2f8411c7a7 100644
  53 --- a/arch/x86/include/asm/spec-ctrl.h
  54 +++ b/arch/x86/include/asm/spec-ctrl.h
  55 @@ -70,11 +70,11 @@ extern void speculative_store_bypass_ht_init(void);
  56  static inline void speculative_store_bypass_ht_init(void) { }
  57  #endif
  58
  59 -extern void speculative_store_bypass_update(unsigned long tif);
  60 +extern void speculation_ctrl_update(unsigned long tif);
  61
  62 -static inline void speculative_store_bypass_update_current(void)
  63 +static inline void speculation_ctrl_update_current(void)
  64  {
  65 -       speculative_store_bypass_update(current_thread_info()->flags);
  66 +       speculation_ctrl_update(current_thread_info()->flags);
  67  }
  68
  69  #endif
  70 diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
  71 index 364fd880feef..8c108343f7ae 100644
  72 --- a/arch/x86/kernel/cpu/bugs.c
  73 +++ b/arch/x86/kernel/cpu/bugs.c
  74 @@ -200,7 +200,7 @@ x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest)
  75                 tif = setguest ? ssbd_spec_ctrl_to_tif(guestval) :
  76                                  ssbd_spec_ctrl_to_tif(hostval);
  77
  78 -               speculative_store_bypass_update(tif);
  79 +               speculation_ctrl_update(tif);
  80         }
  81  }
  82  EXPORT_SYMBOL_GPL(x86_virt_spec_ctrl);
  83 @@ -637,7 +637,7 @@ static int ssb_prctl_set(struct task_struct *task, unsigned long ctrl)
  84          * mitigation until it is next scheduled.
  85          */
  86         if (task == current && update)
  87 -               speculative_store_bypass_update_current();
  88 +               speculation_ctrl_update_current();
  89
  90         return 0;
  91  }
  92 diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
  93 index 00a9047539d7..36ab44270a82 100644
  94 --- a/arch/x86/kernel/process.c
  95 +++ b/arch/x86/kernel/process.c
  96 @@ -321,27 +321,27 @@ static __always_inline void amd_set_ssb_virt_state(unsigned long tifn)
  97         wrmsrl(MSR_AMD64_VIRT_SPEC_CTRL, ssbd_tif_to_spec_ctrl(tifn));
  98  }
  99
 100 -static __always_inline void intel_set_ssb_state(unsigned long tifn)
 101 +static __always_inline void spec_ctrl_update_msr(unsigned long tifn)
 102  {
 103         u64 msr = x86_spec_ctrl_base | ssbd_tif_to_spec_ctrl(tifn);
 104
 105         wrmsrl(MSR_IA32_SPEC_CTRL, msr);
 106  }
 107
 108 -static __always_inline void __speculative_store_bypass_update(unsigned long tifn)
 109 +static __always_inline void __speculation_ctrl_update(unsigned long tifn)
 110  {
 111         if (static_cpu_has(X86_FEATURE_VIRT_SSBD))
 112                 amd_set_ssb_virt_state(tifn);
 113         else if (static_cpu_has(X86_FEATURE_LS_CFG_SSBD))
 114                 amd_set_core_ssb_state(tifn);
 115         else
 116 -               intel_set_ssb_state(tifn);
 117 +               spec_ctrl_update_msr(tifn);
 118  }
 119
 120 -void speculative_store_bypass_update(unsigned long tif)
 121 +void speculation_ctrl_update(unsigned long tif)
 122  {
 123         preempt_disable();
 124 -       __speculative_store_bypass_update(tif);
 125 +       __speculation_ctrl_update(tif);
 126         preempt_enable();
 127  }
 128
 129 @@ -375,7 +375,7 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
 130                 cr4_toggle_bits(X86_CR4_TSD);
 131
 132         if ((tifp ^ tifn) & _TIF_SSBD)
 133 -               __speculative_store_bypass_update(tifn);
 134 +               __speculation_ctrl_update(tifn);
 135  }
 136
 137  /*
 138 --
 139 2.21.0
 140