queue-5.0/asoc-samsung-odroid-fix-clock-configuration-for-4410.patch

   1 From b78c7241ad65e7d349a5e5cb1c44105dfd99a9cf Mon Sep 17 00:00:00 2001
   2 From: Sylwester Nawrocki <s.nawrocki@samsung.com>
   3 Date: Tue, 12 Mar 2019 18:40:06 +0100
   4 Subject: ASoC: samsung: odroid: Fix clock configuration for 44100 sample rate
   5
   6 [ Upstream commit 2b13bee3884926cba22061efa75bd315e871de24 ]
   7
   8 After commit fbeec965b8d1c ("ASoC: samsung: odroid: Fix 32000 sample rate
   9 handling") the audio root clock frequency is configured improperly for
  10 44100 sample rate. Due to clock rate rounding it's 20070401 Hz instead
  11 of 22579000 Hz. This results in a too low value of the PSR clock divider
  12 in the CPU DAI driver and too fast actual sample rate for fs=44100. E.g.
  13 1 kHz tone has actual 1780 Hz frequency (1 kHz * 20070401/22579000 * 2).
  14
  15 Fix this by increasing the correction passed to clk_set_rate() to take
  16 into account inaccuracy of the EPLL frequency properly.
  17
  18 Fixes: fbeec965b8d1c ("ASoC: samsung: odroid: Fix 32000 sample rate handling")
  19 Reported-by: JaeChul Lee <jcsing.lee@samsung.com>
  20 Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
  21 Signed-off-by: Mark Brown <broonie@kernel.org>
  22 Signed-off-by: Sasha Levin <sashal@kernel.org>
  23 ---
  24  sound/soc/samsung/odroid.c | 4 ++--
  25  1 file changed, 2 insertions(+), 2 deletions(-)
  26
  27 diff --git a/sound/soc/samsung/odroid.c b/sound/soc/samsung/odroid.c
  28 index e7b371b072304..45c6d73967852 100644
  29 --- a/sound/soc/samsung/odroid.c
  30 +++ b/sound/soc/samsung/odroid.c
  31 @@ -64,11 +64,11 @@ static int odroid_card_hw_params(struct snd_pcm_substream *substream,
  32                 return ret;
  33
  34         /*
  35 -        *  We add 1 to the rclk_freq value in order to avoid too low clock
  36 +        *  We add 2 to the rclk_freq value in order to avoid too low clock
  37          *  frequency values due to the EPLL output frequency not being exact
  38          *  multiple of the audio sampling rate.
  39          */
  40 -       rclk_freq = params_rate(params) * rfs + 1;
  41 +       rclk_freq = params_rate(params) * rfs + 2;
  42
  43         ret = clk_set_rate(priv->sclk_i2s, rclk_freq);
  44         if (ret < 0)
  45 --
  46 2.20.1
  47