queue-5.0/drm-i915-icl-fix-the-trans_ddi_func_ctl2-bitfield-macro.patch

   1 From 69903dfae0310afe8a15f5cd4e376ebb7c6da1d2 Mon Sep 17 00:00:00 2001
   2 From: Manasi Navare <manasi.d.navare@intel.com>
   3 Date: Tue, 19 Mar 2019 15:18:47 -0700
   4 Subject: drm/i915/icl: Fix the TRANS_DDI_FUNC_CTL2 bitfield macro
   5
   6 From: Manasi Navare <manasi.d.navare@intel.com>
   7
   8 commit 69903dfae0310afe8a15f5cd4e376ebb7c6da1d2 upstream.
   9
  10 This patch fixes the PORT_SYNC_MODE_MASTER_SELECT macro
  11 to correctly do the left shifting to set the port sync
  12 master select correctly.
  13 I have tested this fix on ICL.
  14
  15 Fixes: 49edbd49786e ("drm/i915/icl: Define TRANS_DDI_FUNC_CTL DSI registers")
  16 Cc: Madhav Chauhan <madhav.chauhan@intel.com>
  17 Cc: Jani Nikula <jani.nikula@intel.com>
  18 Cc: <stable@vger.kernel.org> # v5.0+
  19 Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
  20 Reviewed-by: Jani Nikula <jani.nikula@intel.com>
  21 Link: https://patchwork.freedesktop.org/patch/msgid/20190319221847.21311-1-manasi.d.navare@intel.com
  22 (cherry picked from commit 7264aebb81d15aa6bbed650c816bba90f026bc35)
  23 Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
  24 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  25
  26 ---
  27  drivers/gpu/drm/i915/i915_reg.h |    2 +-
  28  1 file changed, 1 insertion(+), 1 deletion(-)
  29
  30 --- a/drivers/gpu/drm/i915/i915_reg.h
  31 +++ b/drivers/gpu/drm/i915/i915_reg.h
  32 @@ -9205,7 +9205,7 @@ enum skl_power_gate {
  33  #define TRANS_DDI_FUNC_CTL2(tran)      _MMIO_TRANS2(tran, \
  34                                                      _TRANS_DDI_FUNC_CTL2_A)
  35  #define  PORT_SYNC_MODE_ENABLE                 (1 << 4)
  36 -#define  PORT_SYNC_MODE_MASTER_SELECT(x)       ((x) < 0)
  37 +#define  PORT_SYNC_MODE_MASTER_SELECT(x)       ((x) << 0)
  38  #define  PORT_SYNC_MODE_MASTER_SELECT_MASK     (0x7 << 0)
  39  #define  PORT_SYNC_MODE_MASTER_SELECT_SHIFT    0
  40