queue-5.10/octeontx2-af-fix-pause-frame-configuration-in-gmp-mo.patch

   1 From 295de9d445d4fd9d45dd4c3d51b8e5f1e7c20777 Mon Sep 17 00:00:00 2001
   2 From: Sasha Levin <sashal@kernel.org>
   3 Date: Tue, 26 Mar 2024 10:57:20 +0530
   4 Subject: Octeontx2-af: fix pause frame configuration in GMP mode
   5
   6 From: Hariprasad Kelam <hkelam@marvell.com>
   7
   8 [ Upstream commit 40d4b4807cadd83fb3f46cc8cd67a945b5b25461 ]
   9
  10 The Octeontx2 MAC block (CGX) has separate data paths (SMU and GMP) for
  11 different speeds, allowing for efficient data transfer.
  12
  13 The previous patch which added pause frame configuration has a bug due
  14 to which pause frame feature is not working in GMP mode.
  15
  16 This patch fixes the issue by configurating appropriate registers.
  17
  18 Fixes: f7e086e754fe ("octeontx2-af: Pause frame configuration at cgx")
  19 Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
  20 Reviewed-by: Simon Horman <horms@kernel.org>
  21 Link: https://lore.kernel.org/r/20240326052720.4441-1-hkelam@marvell.com
  22 Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  23 Signed-off-by: Sasha Levin <sashal@kernel.org>
  24 ---
  25  drivers/net/ethernet/marvell/octeontx2/af/cgx.c | 5 +++++
  26  1 file changed, 5 insertions(+)
  27
  28 diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
  29 index 55dfe1a20bc99..7f82baf8e7403 100644
  30 --- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
  31 +++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
  32 @@ -403,6 +403,11 @@ int cgx_lmac_set_pause_frm(void *cgxd, int lmac_id,
  33         if (!cgx || lmac_id >= cgx->lmac_count)
  34                 return -ENODEV;
  35
  36 +       cfg = cgx_read(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL);
  37 +       cfg &= ~CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK;
  38 +       cfg |= rx_pause ? CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK : 0x0;
  39 +       cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);
  40 +
  41         cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL);
  42         cfg &= ~CGX_SMUX_RX_FRM_CTL_CTL_BCK;
  43         cfg |= rx_pause ? CGX_SMUX_RX_FRM_CTL_CTL_BCK : 0x0;
  44 --
  45 2.43.0
  46