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Fixes for 6.1
[thirdparty/kernel/stable-queue.git] / queue-6.1 / pinctrl-renesas-checker-limit-cfg-reg-enum-checks-to.patch
1 From e03c1708df6d47a0fbce1d9abb3813b4959a5c7d Mon Sep 17 00:00:00 2001
2 From: Sasha Levin <sashal@kernel.org>
3 Date: Mon, 22 Jan 2024 14:43:38 +0100
4 Subject: pinctrl: renesas: checker: Limit cfg reg enum checks to provided IDs
5
6 From: Geert Uytterhoeven <geert+renesas@glider.be>
7
8 [ Upstream commit 3803584a4e9b65bb5b013f862f55c5055aa86c25 ]
9
10 If the number of provided enum IDs in a variable width config register
11 description does not match the expected number, the checker uses the
12 expected number for validating the individual enum IDs.
13
14 However, this may cause out-of-bounds accesses on the array holding the
15 enum IDs, leading to bogus enum_id conflict warnings. Worse, if the bug
16 is an incorrect bit field description (e.g. accidentally using "12"
17 instead of "-12" for a reserved field), thousands of warnings may be
18 printed, overflowing the kernel log buffer.
19
20 Fix this by limiting the enum ID check to the number of provided enum
21 IDs.
22
23 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
24 Link: https://lore.kernel.org/r/c7385f44f2faebb8856bcbb4e908d846fc1531fb.1705930809.git.geert+renesas@glider.be
25 Signed-off-by: Sasha Levin <sashal@kernel.org>
26 ---
27 drivers/pinctrl/renesas/core.c | 4 +++-
28 1 file changed, 3 insertions(+), 1 deletion(-)
29
30 diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c
31 index c91102d3f1d15..1c7f8caf7f7cd 100644
32 --- a/drivers/pinctrl/renesas/core.c
33 +++ b/drivers/pinctrl/renesas/core.c
34 @@ -921,9 +921,11 @@ static void __init sh_pfc_check_cfg_reg(const char *drvname,
35 sh_pfc_err("reg 0x%x: var_field_width declares %u instead of %u bits\n",
36 cfg_reg->reg, rw, cfg_reg->reg_width);
37
38 - if (n != cfg_reg->nr_enum_ids)
39 + if (n != cfg_reg->nr_enum_ids) {
40 sh_pfc_err("reg 0x%x: enum_ids[] has %u instead of %u values\n",
41 cfg_reg->reg, cfg_reg->nr_enum_ids, n);
42 + n = cfg_reg->nr_enum_ids;
43 + }
44
45 check_enum_ids:
46 sh_pfc_check_reg_enums(drvname, cfg_reg->reg, cfg_reg->enum_ids, n);
47 --
48 2.43.0
49