queue-6.6/drm-amdgpu-fix-vcn-allocation-in-cpx-partition.patch

   1 From c50b9fb789a3e9afa48a282e3a420a2e032cdb4f Mon Sep 17 00:00:00 2001
   2 From: Sasha Levin <sashal@kernel.org>
   3 Date: Wed, 6 Mar 2024 17:05:07 +0530
   4 Subject: drm/amdgpu: Fix VCN allocation in CPX partition
   5
   6 From: Lijo Lazar <lijo.lazar@amd.com>
   7
   8 [ Upstream commit f7e232de51bb1b45646e5b7dc4ebcf13510f2630 ]
   9
  10 VCN need not be shared in CPX mode always for all GFX 9.4.3 SOC SKUs. In
  11 certain configs, VCN instance can be exclusively allocated to a
  12 partition even under CPX mode.
  13
  14 Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
  15 Reviewed-by: James Zhu <James.Zhu@amd.com>
  16 Reviewed-by: Asad Kamal <asad.kamal@amd.com>
  17 Acked-by: Alex Deucher <alexander.deucher@amd.com>
  18 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
  19 Signed-off-by: Sasha Levin <sashal@kernel.org>
  20 ---
  21  drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c | 15 +++++++++++----
  22  1 file changed, 11 insertions(+), 4 deletions(-)
  23
  24 diff --git a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
  25 index d0fc62784e821..0284c9198a04a 100644
  26 --- a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
  27 +++ b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
  28 @@ -61,6 +61,11 @@ void aqua_vanjaram_doorbell_index_init(struct amdgpu_device *adev)
  29         adev->doorbell_index.max_assignment = AMDGPU_DOORBELL_LAYOUT1_MAX_ASSIGNMENT << 1;
  30  }
  31
  32 +static bool aqua_vanjaram_xcp_vcn_shared(struct amdgpu_device *adev)
  33 +{
  34 +       return (adev->xcp_mgr->num_xcps > adev->vcn.num_vcn_inst);
  35 +}
  36 +
  37  static void aqua_vanjaram_set_xcp_id(struct amdgpu_device *adev,
  38                              uint32_t inst_idx, struct amdgpu_ring *ring)
  39  {
  40 @@ -86,7 +91,7 @@ static void aqua_vanjaram_set_xcp_id(struct amdgpu_device *adev,
  41         case AMDGPU_RING_TYPE_VCN_ENC:
  42         case AMDGPU_RING_TYPE_VCN_JPEG:
  43                 ip_blk = AMDGPU_XCP_VCN;
  44 -               if (adev->xcp_mgr->mode == AMDGPU_CPX_PARTITION_MODE)
  45 +               if (aqua_vanjaram_xcp_vcn_shared(adev))
  46                         inst_mask = 1 << (inst_idx * 2);
  47                 break;
  48         default:
  49 @@ -139,10 +144,12 @@ static int aqua_vanjaram_xcp_sched_list_update(
  50
  51                 aqua_vanjaram_xcp_gpu_sched_update(adev, ring, ring->xcp_id);
  52
  53 -               /* VCN is shared by two partitions under CPX MODE */
  54 +               /* VCN may be shared by two partitions under CPX MODE in certain
  55 +                * configs.
  56 +                */
  57                 if ((ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC ||
  58 -                       ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG) &&
  59 -                       adev->xcp_mgr->mode == AMDGPU_CPX_PARTITION_MODE)
  60 +                    ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG) &&
  61 +                   aqua_vanjaram_xcp_vcn_shared(adev))
  62                         aqua_vanjaram_xcp_gpu_sched_update(adev, ring, ring->xcp_id + 1);
  63         }
  64
  65 --
  66 2.43.0
  67