releases/2.6.24.1/sky2-fix-for-wol-on-some-devices.patch

   1 From stable-bounces@linux.kernel.org Thu Jan 24 19:46:45 2008
   2 From: Stephen Hemminger <shemminger@linux-foundation.org>
   3 Date: Thu, 24 Jan 2008 19:46:10 -0800
   4 Subject: sky2: fix for WOL on some devices
   5 To: stable@kernel.org
   6 Message-ID: <20080124194610.68c3b009@deepthought>
   7
   8 From: Stephen Hemminger <shemminger@linux-foundation.org>
   9
  10 patch 82637e808478087ce861129745fa60cc37e7929d in mainline
  11
  12 This patch disables config mode access after clearing PCI settings.
  13 Without this change WOL won't work on some BIOS's
  14
  15 Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org>
  16 Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
  17
  18 ---
  19  drivers/net/sky2.c |    9 ++++++++-
  20  1 file changed, 8 insertions(+), 1 deletion(-)
  21
  22 --- a/drivers/net/sky2.c
  23 +++ b/drivers/net/sky2.c
  24 @@ -621,6 +621,7 @@ static void sky2_phy_power(struct sky2_h
  25         static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
  26         static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
  27
  28 +       sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
  29         reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
  30         /* Turn on/off phy power saving */
  31         if (onoff)
  32 @@ -632,7 +633,8 @@ static void sky2_phy_power(struct sky2_h
  33                 reg1 |= coma_mode[port];
  34
  35         sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
  36 -       reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
  37 +       sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
  38 +       sky2_pci_read32(hw, PCI_DEV_REG1);
  39
  40         udelay(100);
  41  }
  42 @@ -2427,6 +2429,7 @@ static void sky2_hw_intr(struct sky2_hw
  43         if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
  44                 u16 pci_err;
  45
  46 +               sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
  47                 pci_err = sky2_pci_read16(hw, PCI_STATUS);
  48                 if (net_ratelimit())
  49                         dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
  50 @@ -2434,12 +2437,14 @@ static void sky2_hw_intr(struct sky2_hw
  51
  52                 sky2_pci_write16(hw, PCI_STATUS,
  53                                       pci_err | PCI_STATUS_ERROR_BITS);
  54 +               sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
  55         }
  56
  57         if (status & Y2_IS_PCI_EXP) {
  58                 /* PCI-Express uncorrectable Error occurred */
  59                 u32 err;
  60
  61 +               sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
  62                 err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
  63                 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
  64                              0xfffffffful);
  65 @@ -2447,6 +2452,7 @@ static void sky2_hw_intr(struct sky2_hw
  66                         dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
  67
  68                 sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
  69 +               sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
  70         }
  71
  72         if (status & Y2_HWE_L1_MASK)
  73 @@ -2812,6 +2818,7 @@ static void sky2_reset(struct sky2_hw *h
  74         }
  75
  76         sky2_power_on(hw);
  77 +       sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
  78
  79         for (i = 0; i < hw->ports; i++) {
  80                 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);