1 From 38000a94a902e94ca8b5498f7871c6316de8957a Mon Sep 17 00:00:00 2001
2 From: Brandon Philips <brandon@ifup.org>
3 Date: Wed, 16 Jun 2010 16:21:58 +0000
4 Subject: sky2: enable rx/tx in sky2_phy_reinit()
6 From: Brandon Philips <brandon@ifup.org>
8 commit 38000a94a902e94ca8b5498f7871c6316de8957a upstream.
10 sky2_phy_reinit is called by the ethtool helpers sky2_set_settings,
11 sky2_nway_reset and sky2_set_pauseparam when netif_running.
13 However, at the end of sky2_phy_init GM_GP_CTRL has GM_GPCR_RX_ENA and
14 GM_GPCR_TX_ENA cleared. So, doing these commands causes the device to
18 $ ethtool -A eth0 autoneg off
20 Fix this issue by enabling Rx/Tx after running sky2_phy_init in
23 Signed-off-by: Brandon Philips <bphilips@suse.de>
24 Tested-by: Brandon Philips <bphilips@suse.de>
26 Tested-by: Mike McCormack <mikem@ring3k.org>
27 Signed-off-by: David S. Miller <davem@davemloft.net>
28 Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
31 drivers/net/sky2.c | 19 ++++++++++++++-----
32 1 file changed, 14 insertions(+), 5 deletions(-)
34 --- a/drivers/net/sky2.c
35 +++ b/drivers/net/sky2.c
36 @@ -704,11 +704,24 @@ static void sky2_phy_power_down(struct s
37 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
41 +static void sky2_enable_rx_tx(struct sky2_port *sky2)
43 + struct sky2_hw *hw = sky2->hw;
44 + unsigned port = sky2->port;
47 + reg = gma_read16(hw, port, GM_GP_CTRL);
48 + reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
49 + gma_write16(hw, port, GM_GP_CTRL, reg);
52 /* Force a renegotiation */
53 static void sky2_phy_reinit(struct sky2_port *sky2)
55 spin_lock_bh(&sky2->phy_lock);
56 sky2_phy_init(sky2->hw, sky2->port);
57 + sky2_enable_rx_tx(sky2);
58 spin_unlock_bh(&sky2->phy_lock);
61 @@ -1929,7 +1942,6 @@ static void sky2_link_up(struct sky2_por
63 struct sky2_hw *hw = sky2->hw;
64 unsigned port = sky2->port;
66 static const char *fc_name[] = {
69 @@ -1937,10 +1949,7 @@ static void sky2_link_up(struct sky2_por
74 - reg = gma_read16(hw, port, GM_GP_CTRL);
75 - reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
76 - gma_write16(hw, port, GM_GP_CTRL, reg);
77 + sky2_enable_rx_tx(sky2);
79 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);