releases/2.6.35.9/x86-cpu-fix-renamed-not-yet-shipping-amd-cpuid-feature-bit.patch

   1 From 7ef8aa72ab176e0288f363d1247079732c5d5792 Mon Sep 17 00:00:00 2001
   2 From: Andre Przywara <andre.przywara@amd.com>
   3 Date: Mon, 6 Sep 2010 15:14:17 +0200
   4 Subject: x86, cpu: Fix renamed, not-yet-shipping AMD CPUID feature bit
   5
   6 From: Andre Przywara <andre.przywara@amd.com>
   7
   8 commit 7ef8aa72ab176e0288f363d1247079732c5d5792 upstream.
   9
  10 The AMD SSE5 feature set as-it has been replaced by some extensions
  11 to the AVX instruction set. Thus the bit formerly advertised as SSE5
  12 is re-used for one of these extensions (XOP).
  13 Although this changes the /proc/cpuinfo output, it is not user visible, as
  14 there are no CPUs (yet) having this feature.
  15 To avoid confusion this should be added to the stable series, too.
  16
  17 Signed-off-by: Andre Przywara <andre.przywara@amd.com>
  18 LKML-Reference: <1283778860-26843-2-git-send-email-andre.przywara@amd.com>
  19 Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
  20 Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
  21
  22 ---
  23  arch/x86/include/asm/cpufeature.h |    2 +-
  24  arch/x86/kvm/x86.c                |    2 +-
  25  2 files changed, 2 insertions(+), 2 deletions(-)
  26
  27 --- a/arch/x86/include/asm/cpufeature.h
  28 +++ b/arch/x86/include/asm/cpufeature.h
  29 @@ -150,7 +150,7 @@
  30  #define X86_FEATURE_3DNOWPREFETCH (6*32+ 8) /* 3DNow prefetch instructions */
  31  #define X86_FEATURE_OSVW       (6*32+ 9) /* OS Visible Workaround */
  32  #define X86_FEATURE_IBS                (6*32+10) /* Instruction Based Sampling */
  33 -#define X86_FEATURE_SSE5       (6*32+11) /* SSE-5 */
  34 +#define X86_FEATURE_XOP                (6*32+11) /* extended AVX instructions */
  35  #define X86_FEATURE_SKINIT     (6*32+12) /* SKINIT/STGI instructions */
  36  #define X86_FEATURE_WDT                (6*32+13) /* Watchdog timer */
  37  #define X86_FEATURE_NODEID_MSR (6*32+19) /* NodeId MSR */
  38 --- a/arch/x86/kvm/x86.c
  39 +++ b/arch/x86/kvm/x86.c
  40 @@ -1912,7 +1912,7 @@ static void do_cpuid_ent(struct kvm_cpui
  41         const u32 kvm_supported_word6_x86_features =
  42                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
  43                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
  44 -               F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
  45 +               F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
  46                 0 /* SKINIT */ | 0 /* WDT */;
  47
  48         /* all calls to cpuid_count() should be made on the same cpu */