1 From 9ca1d10d748e56964de95e3ed80211b192f56cf4 Mon Sep 17 00:00:00 2001
2 From: Eric Anholt <eric@anholt.net>
3 Date: Mon, 7 Nov 2011 16:07:05 -0800
4 Subject: drm/i915: Turn on another required clock gating bit on gen6.
6 From: Eric Anholt <eric@anholt.net>
8 commit 9ca1d10d748e56964de95e3ed80211b192f56cf4 upstream.
10 Unlike the previous one, I don't have known testcases it fixes. I'd
11 rather not go through the same debug cycle on whatever testcases those
14 Signed-off-by: Eric Anholt <eric@anholt.net>
15 Signed-off-by: Keith Packard <keithp@keithp.com>
16 Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
19 drivers/gpu/drm/i915/i915_reg.h | 1 +
20 drivers/gpu/drm/i915/intel_display.c | 7 ++++++-
21 2 files changed, 7 insertions(+), 1 deletion(-)
23 --- a/drivers/gpu/drm/i915/i915_reg.h
24 +++ b/drivers/gpu/drm/i915/i915_reg.h
27 #define GEN6_UCGCTL2 0x9404
28 # define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE (1 << 12)
29 +# define GEN6_RCCUNIT_CLOCK_GATE_DISABLE (1 << 11)
31 #define GEN6_RPNSWREQ 0xA008
32 #define GEN6_TURBO_DISABLE (1<<31)
33 --- a/drivers/gpu/drm/i915/intel_display.c
34 +++ b/drivers/gpu/drm/i915/intel_display.c
35 @@ -7888,8 +7888,13 @@ static void gen6_init_clock_gating(struc
36 * some amount of runtime in the Mesa "fire" demo, and Unigine
37 * Sanctuary and Tropics, and apparently anything else with
38 * alpha test or pixel discard.
40 + * According to the spec, bit 11 (RCCUNIT) must also be set,
41 + * but we didn't debug actual testcases to find it out.
43 - I915_WRITE(GEN6_UCGCTL2, GEN6_RCPBUNIT_CLOCK_GATE_DISABLE);
44 + I915_WRITE(GEN6_UCGCTL2,
45 + GEN6_RCPBUNIT_CLOCK_GATE_DISABLE |
46 + GEN6_RCCUNIT_CLOCK_GATE_DISABLE);
49 * According to the spec the following bits should be