releases/3.14.16/arm-dts-fix-l2-address-in-hi3620.patch

   1 From 28c9770bcbd2b6dbab99669825a2f8fa69e6d35b Mon Sep 17 00:00:00 2001
   2 From: Haojian Zhuang <haojian.zhuang@linaro.org>
   3 Date: Wed, 2 Apr 2014 21:31:50 +0800
   4 Subject: ARM: dts: fix L2 address in Hi3620
   5
   6 From: Haojian Zhuang <haojian.zhuang@linaro.org>
   7
   8 commit 28c9770bcbd2b6dbab99669825a2f8fa69e6d35b upstream.
   9
  10 Fix the address of L2 controler register in hi3620 SoC.
  11 This has been wrong from the point that the file was merged
  12 in v3.14.
  13
  14 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
  15 Acked-by: Wei Xu <xuwei5@hisilicon.com>
  16 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
  17 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  18
  19 ---
  20  arch/arm/boot/dts/hi3620.dtsi |    2 +-
  21  1 file changed, 1 insertion(+), 1 deletion(-)
  22
  23 --- a/arch/arm/boot/dts/hi3620.dtsi
  24 +++ b/arch/arm/boot/dts/hi3620.dtsi
  25 @@ -73,7 +73,7 @@
  26
  27                 L2: l2-cache {
  28                         compatible = "arm,pl310-cache";
  29 -                       reg = <0xfc10000 0x100000>;
  30 +                       reg = <0x100000 0x100000>;
  31                         interrupts = <0 15 4>;
  32                         cache-unified;
  33                         cache-level = <2>;