releases/3.14.3/drm-armada-fix-corruption-while-loading-cursors.patch

   1 From c39b06951f1dc2e384650288676c5b7dcc0ec92c Mon Sep 17 00:00:00 2001
   2 From: Russell King <rmk+kernel@arm.linux.org.uk>
   3 Date: Mon, 7 Apr 2014 12:00:17 +0100
   4 Subject: DRM: armada: fix corruption while loading cursors
   5
   6 From: Russell King <rmk+kernel@arm.linux.org.uk>
   7
   8 commit c39b06951f1dc2e384650288676c5b7dcc0ec92c upstream.
   9
  10 Loading cursors to the LCD controller's SRAM can be corrupted when the
  11 configured pixel clock is relatively slow.  This seems to be caused
  12 when we write back-to-back to the SRAM registers.
  13
  14 There doesn't appear to be any status register we can read to check
  15 when an access has completed.
  16
  17 Inserting a dummy read between the writes appears to fix the problem.
  18
  19 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
  20 Signed-off-by: Dave Airlie <airlied@redhat.com>
  21 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  22
  23 ---
  24  drivers/gpu/drm/armada/armada_crtc.c |    1 +
  25  1 file changed, 1 insertion(+)
  26
  27 --- a/drivers/gpu/drm/armada/armada_crtc.c
  28 +++ b/drivers/gpu/drm/armada/armada_crtc.c
  29 @@ -678,6 +678,7 @@ static void armada_load_cursor_argb(void
  30                                        base + LCD_SPU_SRAM_WRDAT);
  31                         writel_relaxed(addr | SRAM_WRITE,
  32                                        base + LCD_SPU_SRAM_CTRL);
  33 +                       readl_relaxed(base + LCD_SPU_HWC_OVSA_HPXL_VLN);
  34                         addr += 1;
  35                         if ((addr & 0x00ff) == 0)
  36                                 addr += 0xf00;