releases/3.16.3/powerpc-thp-invalidate-with-vpn-in-loop.patch

   1 From 969b7b208f7408712a3526856e4ae60ad13f6928 Mon Sep 17 00:00:00 2001
   2 From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
   3 Date: Wed, 13 Aug 2014 12:32:01 +0530
   4 Subject: powerpc/thp: Invalidate with vpn in loop
   5
   6 From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
   7
   8 commit 969b7b208f7408712a3526856e4ae60ad13f6928 upstream.
   9
  10 As per ISA, for 4k base page size we compare 14..65 bits of VA specified
  11 with the entry_VA in tlb. That implies we need to make sure we do a
  12 tlbie with all the possible 4k va we used to access the 16MB hugepage.
  13 With 64k base page size we compare 14..57 bits of VA. Hence we cannot
  14 ignore the lower 24 bits of va while tlbie .We also cannot tlb
  15 invalidate a 16MB entry with just one tlbie instruction because
  16 we don't track which va was used to instantiate the tlb entry.
  17
  18 Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
  19 Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
  20 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  21
  22 ---
  23  arch/powerpc/mm/hash_native_64.c |   23 +++++++----------------
  24  1 file changed, 7 insertions(+), 16 deletions(-)
  25
  26 --- a/arch/powerpc/mm/hash_native_64.c
  27 +++ b/arch/powerpc/mm/hash_native_64.c
  28 @@ -417,7 +417,7 @@ static void native_hugepage_invalidate(u
  29                                        unsigned char *hpte_slot_array,
  30                                        int psize, int ssize)
  31  {
  32 -       int i, lock_tlbie;
  33 +       int i;
  34         struct hash_pte *hptep;
  35         int actual_psize = MMU_PAGE_16M;
  36         unsigned int max_hpte_count, valid;
  37 @@ -456,22 +456,13 @@ static void native_hugepage_invalidate(u
  38                 else
  39                         /* Invalidate the hpte. NOTE: this also unlocks it */
  40                         hptep->v = 0;
  41 +               /*
  42 +                * We need to do tlb invalidate for all the address, tlbie
  43 +                * instruction compares entry_VA in tlb with the VA specified
  44 +                * here
  45 +                */
  46 +               tlbie(vpn, psize, actual_psize, ssize, 0);
  47         }
  48 -       /*
  49 -        * Since this is a hugepage, we just need a single tlbie.
  50 -        * use the last vpn.
  51 -        */
  52 -       lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
  53 -       if (lock_tlbie)
  54 -               raw_spin_lock(&native_tlbie_lock);
  55 -
  56 -       asm volatile("ptesync":::"memory");
  57 -       __tlbie(vpn, psize, actual_psize, ssize);
  58 -       asm volatile("eieio; tlbsync; ptesync":::"memory");
  59 -
  60 -       if (lock_tlbie)
  61 -               raw_spin_unlock(&native_tlbie_lock);
  62 -
  63         local_irq_restore(flags);
  64  }
  65