1 From 2f5bc307be2480ba89e4c5d118f406f04a4a7299 Mon Sep 17 00:00:00 2001
2 From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
3 Date: Tue, 16 Jun 2015 14:12:57 +0200
4 Subject: ARM: mvebu: fix suspend to RAM on big-endian configurations
6 From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8 commit 2f5bc307be2480ba89e4c5d118f406f04a4a7299 upstream.
10 The current Armada XP suspend to RAM implementation, as added in
11 commit 27432825ae19f ("ARM: mvebu: Armada XP GP specific
12 suspend/resume code") does not handle big-endian configurations
13 properly: the small bit of assembly code putting the DRAM in
14 self-refresh and toggling the GPIOs to turn off power forgets to
15 convert the values to little-endian.
17 This commit fixes that by making sure the two values we will write to
18 the DRAM controller register and GPIO register are already in
19 little-endian before entering the critical assembly code.
21 Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
22 Fixes: 27432825ae19f ("ARM: mvebu: Armada XP GP specific suspend/resume code")
23 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
26 arch/arm/mach-mvebu/pm-board.c | 3 +++
27 1 file changed, 3 insertions(+)
29 --- a/arch/arm/mach-mvebu/pm-board.c
30 +++ b/arch/arm/mach-mvebu/pm-board.c
31 @@ -43,6 +43,9 @@ static void mvebu_armada_xp_gp_pm_enter(
32 for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++)
33 ackcmd |= BIT(pic_raw_gpios[i]);
35 + srcmd = cpu_to_le32(srcmd);
36 + ackcmd = cpu_to_le32(ackcmd);
39 * Wait a while, the PIC needs quite a bit of time between the