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1 From 90922a2d03d84de36bf8a9979d62580102f31a92 Mon Sep 17 00:00:00 2001
2 From: Shanker Donthineni <shankerd@codeaurora.org>
3 Date: Tue, 7 Mar 2017 08:20:38 -0600
4 Subject: irqchip/gicv3-its: Add workaround for QDF2400 ITS erratum 0065
5
6 From: Shanker Donthineni <shankerd@codeaurora.org>
7
8 commit 90922a2d03d84de36bf8a9979d62580102f31a92 upstream.
9
10 On Qualcomm Datacenter Technologies QDF2400 SoCs, the ITS hardware
11 implementation uses 16Bytes for Interrupt Translation Entry (ITE),
12 but reports an incorrect value of 8Bytes in GITS_TYPER.ITTE_size.
13
14 It might cause kernel memory corruption depending on the number
15 of MSI(x) that are configured and the amount of memory that has
16 been allocated for ITEs in its_create_device().
17
18 This patch fixes the potential memory corruption by setting the
19 correct ITE size to 16Bytes.
20
21 Cc: stable@vger.kernel.org
22 Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
23 Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
24 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
25
26 ---
27 Documentation/arm64/silicon-errata.txt | 44 +++++++++++++++++----------------
28 arch/arm64/Kconfig | 10 +++++++
29 drivers/irqchip/irq-gic-v3-its.c | 16 ++++++++++++
30 3 files changed, 49 insertions(+), 21 deletions(-)
31
32 --- a/Documentation/arm64/silicon-errata.txt
33 +++ b/Documentation/arm64/silicon-errata.txt
34 @@ -42,24 +42,26 @@ file acts as a registry of software work
35 will be updated when new workarounds are committed and backported to
36 stable kernels.
37
38 -| Implementor | Component | Erratum ID | Kconfig |
39 -+----------------+-----------------+-----------------+-------------------------+
40 -| ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
41 -| ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
42 -| ARM | Cortex-A53 | #824069 | ARM64_ERRATUM_824069 |
43 -| ARM | Cortex-A53 | #819472 | ARM64_ERRATUM_819472 |
44 -| ARM | Cortex-A53 | #845719 | ARM64_ERRATUM_845719 |
45 -| ARM | Cortex-A53 | #843419 | ARM64_ERRATUM_843419 |
46 -| ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 |
47 -| ARM | Cortex-A57 | #852523 | N/A |
48 -| ARM | Cortex-A57 | #834220 | ARM64_ERRATUM_834220 |
49 -| ARM | Cortex-A72 | #853709 | N/A |
50 -| ARM | MMU-500 | #841119,#826419 | N/A |
51 -| | | | |
52 -| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
53 -| Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 |
54 -| Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 |
55 -| Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 |
56 -| Cavium | ThunderX SMMUv2 | #27704 | N/A |
57 -| | | | |
58 -| Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |
59 +| Implementor | Component | Erratum ID | Kconfig |
60 ++----------------+-----------------+-----------------+-----------------------------+
61 +| ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
62 +| ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
63 +| ARM | Cortex-A53 | #824069 | ARM64_ERRATUM_824069 |
64 +| ARM | Cortex-A53 | #819472 | ARM64_ERRATUM_819472 |
65 +| ARM | Cortex-A53 | #845719 | ARM64_ERRATUM_845719 |
66 +| ARM | Cortex-A53 | #843419 | ARM64_ERRATUM_843419 |
67 +| ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 |
68 +| ARM | Cortex-A57 | #852523 | N/A |
69 +| ARM | Cortex-A57 | #834220 | ARM64_ERRATUM_834220 |
70 +| ARM | Cortex-A72 | #853709 | N/A |
71 +| ARM | MMU-500 | #841119,#826419 | N/A |
72 +| | | | |
73 +| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
74 +| Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 |
75 +| Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 |
76 +| Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 |
77 +| Cavium | ThunderX SMMUv2 | #27704 | N/A |
78 +| | | | |
79 +| Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |
80 +| | | | |
81 +| Qualcomm Tech. | QDF2400 ITS | E0065 | QCOM_QDF2400_ERRATUM_0065 |
82 --- a/arch/arm64/Kconfig
83 +++ b/arch/arm64/Kconfig
84 @@ -479,6 +479,16 @@ config CAVIUM_ERRATUM_27456
85
86 If unsure, say Y.
87
88 +config QCOM_QDF2400_ERRATUM_0065
89 + bool "QDF2400 E0065: Incorrect GITS_TYPER.ITT_Entry_size"
90 + default y
91 + help
92 + On Qualcomm Datacenter Technologies QDF2400 SoC, ITS hardware reports
93 + ITE size incorrectly. The GITS_TYPER.ITT_Entry_size field should have
94 + been indicated as 16Bytes (0xf), not 8Bytes (0x7).
95 +
96 + If unsure, say Y.
97 +
98 endmenu
99
100
101 --- a/drivers/irqchip/irq-gic-v3-its.c
102 +++ b/drivers/irqchip/irq-gic-v3-its.c
103 @@ -1597,6 +1597,14 @@ static void __maybe_unused its_enable_qu
104 its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144;
105 }
106
107 +static void __maybe_unused its_enable_quirk_qdf2400_e0065(void *data)
108 +{
109 + struct its_node *its = data;
110 +
111 + /* On QDF2400, the size of the ITE is 16Bytes */
112 + its->ite_size = 16;
113 +}
114 +
115 static const struct gic_quirk its_quirks[] = {
116 #ifdef CONFIG_CAVIUM_ERRATUM_22375
117 {
118 @@ -1614,6 +1622,14 @@ static const struct gic_quirk its_quirks
119 .init = its_enable_quirk_cavium_23144,
120 },
121 #endif
122 +#ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065
123 + {
124 + .desc = "ITS: QDF2400 erratum 0065",
125 + .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */
126 + .mask = 0xffffffff,
127 + .init = its_enable_quirk_qdf2400_e0065,
128 + },
129 +#endif
130 {
131 }
132 };