releases/4.10.7/clk-sunxi-ng-mp-adjust-parent-rate-for-pre-dividers.patch

   1 From ac8616e4c81dded650dfade49a7da283565d37ce Mon Sep 17 00:00:00 2001
   2 From: Chen-Yu Tsai <wens@csie.org>
   3 Date: Tue, 14 Feb 2017 11:35:22 +0800
   4 Subject: clk: sunxi-ng: mp: Adjust parent rate for pre-dividers
   5
   6 From: Chen-Yu Tsai <wens@csie.org>
   7
   8 commit ac8616e4c81dded650dfade49a7da283565d37ce upstream.
   9
  10 The MP style clocks support an mux with pre-dividers. While the driver
  11 correctly accounted for them in the .determine_rate callback, it did
  12 not in the .recalc_rate and .set_rate callbacks.
  13
  14 This means when calculating the factors in the .set_rate callback, they
  15 would be off by a factor of the active pre-divider. Same goes for
  16 reading back the clock rate after it is set.
  17
  18 Fixes: 2ab836db5097 ("clk: sunxi-ng: Add M-P factor clock support")
  19 Signed-off-by: Chen-Yu Tsai <wens@csie.org>
  20 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  21 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  22
  23 ---
  24  drivers/clk/sunxi-ng/ccu_mp.c |    8 ++++++++
  25  1 file changed, 8 insertions(+)
  26
  27 --- a/drivers/clk/sunxi-ng/ccu_mp.c
  28 +++ b/drivers/clk/sunxi-ng/ccu_mp.c
  29 @@ -85,6 +85,10 @@ static unsigned long ccu_mp_recalc_rate(
  30         unsigned int m, p;
  31         u32 reg;
  32
  33 +       /* Adjust parent_rate according to pre-dividers */
  34 +       ccu_mux_helper_adjust_parent_for_prediv(&cmp->common, &cmp->mux,
  35 +                                               -1, &parent_rate);
  36 +
  37         reg = readl(cmp->common.base + cmp->common.reg);
  38
  39         m = reg >> cmp->m.shift;
  40 @@ -114,6 +118,10 @@ static int ccu_mp_set_rate(struct clk_hw
  41         unsigned int m, p;
  42         u32 reg;
  43
  44 +       /* Adjust parent_rate according to pre-dividers */
  45 +       ccu_mux_helper_adjust_parent_for_prediv(&cmp->common, &cmp->mux,
  46 +                                               -1, &parent_rate);
  47 +
  48         max_m = cmp->m.max ?: 1 << cmp->m.width;
  49         max_p = cmp->p.max ?: 1 << ((1 << cmp->p.width) - 1);
  50