1 From 642c8aee3bae0caa0e0ec839402f024a292c63a4 Mon Sep 17 00:00:00 2001
2 From: Vladimir Murzin <vladimir.murzin@arm.com>
3 Date: Fri, 25 Jan 2019 15:18:37 +0100
4 Subject: ARM: 8830/1: NOMMU: Toggle only bits in EXC_RETURN we are really care
7 [ Upstream commit 72cd4064fccaae15ab84d40d4be23667402df4ed ]
9 ARMv8M introduces support for Security extension to M class, among
10 other things it affects exception handling, especially, encoding of
13 The new bits have been added:
15 Bit [6] Secure or Non-secure stack
16 Bit [5] Default callee register stacking
17 Bit [0] Exception Secure
19 which conflicts with hard-coded value of EXC_RETURN:
21 In fact, we only care of few bits:
23 Bit [3] Mode (0 - Handler, 1 - Thread)
24 Bit [2] Stack pointer selection (0 - Main, 1 - Process)
26 We can toggle only those bits and left other bits as they were on
29 It is basically, what patch does - saves EXC_RETURN when we do
30 transition form Thread to Handler mode (it is first svc), so later
31 saved value is used instead of EXC_RET_THREADMODE_PROCESSSTACK.
33 Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
34 Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
35 Signed-off-by: Sasha Levin <sashal@kernel.org>
37 arch/arm/include/asm/v7m.h | 2 +-
38 arch/arm/kernel/entry-header.S | 3 ++-
39 arch/arm/kernel/entry-v7m.S | 4 ++++
40 arch/arm/mm/proc-v7m.S | 3 +++
41 4 files changed, 10 insertions(+), 2 deletions(-)
43 diff --git a/arch/arm/include/asm/v7m.h b/arch/arm/include/asm/v7m.h
44 index e6d9e29fcae4..6416fd3a3894 100644
45 --- a/arch/arm/include/asm/v7m.h
46 +++ b/arch/arm/include/asm/v7m.h
48 * (0 -> msp; 1 -> psp). Bits [1:0] are fixed to 0b01.
50 #define EXC_RET_STACK_MASK 0x00000004
51 -#define EXC_RET_THREADMODE_PROCESSSTACK 0xfffffffd
52 +#define EXC_RET_THREADMODE_PROCESSSTACK (3 << 2)
54 /* Cache related definitions */
56 diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
57 index 773424843d6e..62db1c9746cb 100644
58 --- a/arch/arm/kernel/entry-header.S
59 +++ b/arch/arm/kernel/entry-header.S
62 .macro v7m_exception_slow_exit ret_r0
64 - ldr lr, =EXC_RET_THREADMODE_PROCESSSTACK
68 @ read original r12, sp, lr, pc and xPSR
70 diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S
71 index abcf47848525..19d2dcd6530d 100644
72 --- a/arch/arm/kernel/entry-v7m.S
73 +++ b/arch/arm/kernel/entry-v7m.S
74 @@ -146,3 +146,7 @@ ENTRY(vector_table)
75 .rept CONFIG_CPU_V7M_NUM_IRQ
76 .long __irq_entry @ External Interrupts
82 diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
83 index 47a5acc64433..92e84181933a 100644
84 --- a/arch/arm/mm/proc-v7m.S
85 +++ b/arch/arm/mm/proc-v7m.S
86 @@ -139,6 +139,9 @@ __v7m_setup_cont:
91 + orr lr, lr, #EXC_RET_THREADMODE_PROCESSSTACK
93 ldmia sp, {r0-r3, r12}
94 str r5, [r12, #11 * 4] @ restore the original SVC vector entry
95 mov lr, r6 @ restore LR