releases/4.14.123/x86-mce-fix-machine_check_poll-tests-for-error-types.patch

   1 From f03c1a56ef6239050a864ba32ee02f3e6d27f67d Mon Sep 17 00:00:00 2001
   2 From: Tony Luck <tony.luck@intel.com>
   3 Date: Tue, 12 Mar 2019 10:09:38 -0700
   4 Subject: x86/mce: Fix machine_check_poll() tests for error types
   5
   6 [ Upstream commit f19501aa07f18268ab14f458b51c1c6b7f72a134 ]
   7
   8 There has been a lurking "TBD" in the machine check poll routine ever
   9 since it was first split out from the machine check handler. The
  10 potential issue is that the poll routine may have just begun a read from
  11 the STATUS register in a machine check bank when the hardware logs an
  12 error in that bank and signals a machine check.
  13
  14 That race used to be pretty small back when machine checks were
  15 broadcast, but the addition of local machine check means that the poll
  16 code could continue running and clear the error from the bank before the
  17 local machine check handler on another CPU gets around to reading it.
  18
  19 Fix the code to be sure to only process errors that need to be processed
  20 in the poll code, leaving other logged errors alone for the machine
  21 check handler to find and process.
  22
  23  [ bp: Massage a bit and flip the "== 0" check to the usual !(..) test. ]
  24
  25 Fixes: b79109c3bbcf ("x86, mce: separate correct machine check poller and fatal exception handler")
  26 Fixes: ed7290d0ee8f ("x86, mce: implement new status bits")
  27 Reported-by: Ashok Raj <ashok.raj@intel.com>
  28 Signed-off-by: Tony Luck <tony.luck@intel.com>
  29 Signed-off-by: Borislav Petkov <bp@suse.de>
  30 Cc: Ashok Raj <ashok.raj@intel.com>
  31 Cc: "H. Peter Anvin" <hpa@zytor.com>
  32 Cc: Ingo Molnar <mingo@redhat.com>
  33 Cc: linux-edac <linux-edac@vger.kernel.org>
  34 Cc: Thomas Gleixner <tglx@linutronix.de>
  35 Cc: x86-ml <x86@kernel.org>
  36 Cc: Yazen Ghannam <Yazen.Ghannam@amd.com>
  37 Link: https://lkml.kernel.org/r/20190312170938.GA23035@agluck-desk
  38 Signed-off-by: Sasha Levin <sashal@kernel.org>
  39 ---
  40  arch/x86/kernel/cpu/mcheck/mce.c | 44 +++++++++++++++++++++++++++-----
  41  1 file changed, 37 insertions(+), 7 deletions(-)
  42
  43 diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
  44 index 54874e2b1d325..4f3be91f0b0bc 100644
  45 --- a/arch/x86/kernel/cpu/mcheck/mce.c
  46 +++ b/arch/x86/kernel/cpu/mcheck/mce.c
  47 @@ -701,19 +701,49 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
  48
  49                 barrier();
  50                 m.status = mce_rdmsrl(msr_ops.status(i));
  51 +
  52 +               /* If this entry is not valid, ignore it */
  53                 if (!(m.status & MCI_STATUS_VAL))
  54                         continue;
  55
  56                 /*
  57 -                * Uncorrected or signalled events are handled by the exception
  58 -                * handler when it is enabled, so don't process those here.
  59 -                *
  60 -                * TBD do the same check for MCI_STATUS_EN here?
  61 +                * If we are logging everything (at CPU online) or this
  62 +                * is a corrected error, then we must log it.
  63                  */
  64 -               if (!(flags & MCP_UC) &&
  65 -                   (m.status & (mca_cfg.ser ? MCI_STATUS_S : MCI_STATUS_UC)))
  66 -                       continue;
  67 +               if ((flags & MCP_UC) || !(m.status & MCI_STATUS_UC))
  68 +                       goto log_it;
  69 +
  70 +               /*
  71 +                * Newer Intel systems that support software error
  72 +                * recovery need to make additional checks. Other
  73 +                * CPUs should skip over uncorrected errors, but log
  74 +                * everything else.
  75 +                */
  76 +               if (!mca_cfg.ser) {
  77 +                       if (m.status & MCI_STATUS_UC)
  78 +                               continue;
  79 +                       goto log_it;
  80 +               }
  81 +
  82 +               /* Log "not enabled" (speculative) errors */
  83 +               if (!(m.status & MCI_STATUS_EN))
  84 +                       goto log_it;
  85 +
  86 +               /*
  87 +                * Log UCNA (SDM: 15.6.3 "UCR Error Classification")
  88 +                * UC == 1 && PCC == 0 && S == 0
  89 +                */
  90 +               if (!(m.status & MCI_STATUS_PCC) && !(m.status & MCI_STATUS_S))
  91 +                       goto log_it;
  92 +
  93 +               /*
  94 +                * Skip anything else. Presumption is that our read of this
  95 +                * bank is racing with a machine check. Leave the log alone
  96 +                * for do_machine_check() to deal with it.
  97 +                */
  98 +               continue;
  99
 100 +log_it:
 101                 error_seen = true;
 102
 103                 mce_read_aux(&m, i);
 104 --
 105 2.20.1
 106