releases/4.14.53/mips-io-add-barrier-after-register-read-in-inx.patch

   1 From 18f3e95b90b28318ef35910d21c39908de672331 Mon Sep 17 00:00:00 2001
   2 From: Huacai Chen <chenhc@lemote.com>
   3 Date: Tue, 12 Jun 2018 17:54:42 +0800
   4 Subject: MIPS: io: Add barrier after register read in inX()
   5
   6 From: Huacai Chen <chenhc@lemote.com>
   7
   8 commit 18f3e95b90b28318ef35910d21c39908de672331 upstream.
   9
  10 While a barrier is present in the outX() functions before the register
  11 write, a similar barrier is missing in the inX() functions after the
  12 register read. This could allow memory accesses following inX() to
  13 observe stale data.
  14
  15 This patch is very similar to commit a1cc7034e33d12dc1 ("MIPS: io: Add
  16 barrier after register read in readX()"). Because war_io_reorder_wmb()
  17 is both used by writeX() and outX(), if readX() need a barrier then so
  18 does inX().
  19
  20 Cc: stable@vger.kernel.org
  21 Signed-off-by: Huacai Chen <chenhc@lemote.com>
  22 Patchwork: https://patchwork.linux-mips.org/patch/19516/
  23 Signed-off-by: Paul Burton <paul.burton@mips.com>
  24 Cc: James Hogan <james.hogan@mips.com>
  25 Cc: linux-mips@linux-mips.org
  26 Cc: Fuxin Zhang <zhangfx@lemote.com>
  27 Cc: Zhangjin Wu <wuzhangjin@gmail.com>
  28 Cc: Huacai Chen <chenhuacai@gmail.com>
  29 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  30
  31 ---
  32  arch/mips/include/asm/io.h |    2 ++
  33  1 file changed, 2 insertions(+)
  34
  35 --- a/arch/mips/include/asm/io.h
  36 +++ b/arch/mips/include/asm/io.h
  37 @@ -414,6 +414,8 @@ static inline type pfx##in##bwlq##p(unsi
  38         __val = *__addr;                                                \
  39         slow;                                                           \
  40                                                                         \
  41 +       /* prevent prefetching of coherent DMA data prematurely */      \
  42 +       rmb();                                                          \
  43         return pfx##ioswab##bwlq(__addr, __val);                        \
  44  }
  45