]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/blob - releases/4.14.60/bpf-arm32-fix-inconsistent-naming-about-emit_a32_lsr_-r64-i64.patch
Fixes for 5.10
[thirdparty/kernel/stable-queue.git] / releases / 4.14.60 / bpf-arm32-fix-inconsistent-naming-about-emit_a32_lsr_-r64-i64.patch
1 From foo@baz Sat Jul 28 10:25:26 CEST 2018
2 From: Wang YanQing <udknight@gmail.com>
3 Date: Fri, 11 May 2018 10:52:17 +0800
4 Subject: bpf, arm32: fix inconsistent naming about emit_a32_lsr_{r64,i64}
5
6 From: Wang YanQing <udknight@gmail.com>
7
8 [ Upstream commit 68565a1af9f7012e6f2fe2bdd612f67d2d830c28 ]
9
10 The names for BPF_ALU64 | BPF_ARSH are emit_a32_arsh_*,
11 the names for BPF_ALU64 | BPF_LSH are emit_a32_lsh_*, but
12 the names for BPF_ALU64 | BPF_RSH are emit_a32_lsr_*.
13
14 For consistence reason, let's rename emit_a32_lsr_* to
15 emit_a32_rsh_*.
16
17 This patch also corrects a wrong comment.
18
19 Fixes: 39c13c204bb1 ("arm: eBPF JIT compiler")
20 Signed-off-by: Wang YanQing <udknight@gmail.com>
21 Cc: Shubham Bansal <illusionist.neo@gmail.com>
22 Cc: linux-arm-kernel@lists.infradead.org
23 Cc: linux@armlinux.org.uk
24 Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
25 Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
26 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
27 ---
28 arch/arm/net/bpf_jit_32.c | 10 +++++-----
29 1 file changed, 5 insertions(+), 5 deletions(-)
30
31 --- a/arch/arm/net/bpf_jit_32.c
32 +++ b/arch/arm/net/bpf_jit_32.c
33 @@ -718,7 +718,7 @@ static inline void emit_a32_arsh_r64(con
34 }
35
36 /* dst = dst >> src */
37 -static inline void emit_a32_lsr_r64(const u8 dst[], const u8 src[], bool dstk,
38 +static inline void emit_a32_rsh_r64(const u8 dst[], const u8 src[], bool dstk,
39 bool sstk, struct jit_ctx *ctx) {
40 const u8 *tmp = bpf2a32[TMP_REG_1];
41 const u8 *tmp2 = bpf2a32[TMP_REG_2];
42 @@ -734,7 +734,7 @@ static inline void emit_a32_lsr_r64(cons
43 emit(ARM_LDR_I(rm, ARM_SP, STACK_VAR(dst_hi)), ctx);
44 }
45
46 - /* Do LSH operation */
47 + /* Do RSH operation */
48 emit(ARM_RSB_I(ARM_IP, rt, 32), ctx);
49 emit(ARM_SUBS_I(tmp2[0], rt, 32), ctx);
50 emit(ARM_MOV_SR(ARM_LR, rd, SRTYPE_LSR, rt), ctx);
51 @@ -784,7 +784,7 @@ static inline void emit_a32_lsh_i64(cons
52 }
53
54 /* dst = dst >> val */
55 -static inline void emit_a32_lsr_i64(const u8 dst[], bool dstk,
56 +static inline void emit_a32_rsh_i64(const u8 dst[], bool dstk,
57 const u32 val, struct jit_ctx *ctx) {
58 const u8 *tmp = bpf2a32[TMP_REG_1];
59 const u8 *tmp2 = bpf2a32[TMP_REG_2];
60 @@ -1340,7 +1340,7 @@ static int build_insn(const struct bpf_i
61 case BPF_ALU64 | BPF_RSH | BPF_K:
62 if (unlikely(imm > 63))
63 return -EINVAL;
64 - emit_a32_lsr_i64(dst, dstk, imm, ctx);
65 + emit_a32_rsh_i64(dst, dstk, imm, ctx);
66 break;
67 /* dst = dst << src */
68 case BPF_ALU64 | BPF_LSH | BPF_X:
69 @@ -1348,7 +1348,7 @@ static int build_insn(const struct bpf_i
70 break;
71 /* dst = dst >> src */
72 case BPF_ALU64 | BPF_RSH | BPF_X:
73 - emit_a32_lsr_r64(dst, src, dstk, sstk, ctx);
74 + emit_a32_rsh_r64(dst, src, dstk, sstk, ctx);
75 break;
76 /* dst = dst >> src (signed) */
77 case BPF_ALU64 | BPF_ARSH | BPF_X: