releases/4.14.60/perf-x86-intel-uncore-correct-fixed-counter-index-check-for-nhm.patch

   1 From foo@baz Sat Jul 28 10:25:26 CEST 2018
   2 From: Kan Liang <kan.liang@intel.com>
   3 Date: Thu, 3 May 2018 11:25:07 -0700
   4 Subject: perf/x86/intel/uncore: Correct fixed counter index check for NHM
   5
   6 From: Kan Liang <kan.liang@intel.com>
   7
   8 [ Upstream commit d71f11c076c420c4e2fceb4faefa144e055e0935 ]
   9
  10 For Nehalem and Westmere, there is only one fixed counter for W-Box.
  11 There is no index which is bigger than UNCORE_PMC_IDX_FIXED.
  12 It is not correct to use >= to check fixed counter.
  13 The code quality issue will bring problem when new counter index is
  14 introduced.
  15
  16 Signed-off-by: Kan Liang <kan.liang@intel.com>
  17 Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
  18 Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
  19 Cc: Linus Torvalds <torvalds@linux-foundation.org>
  20 Cc: Peter Zijlstra <peterz@infradead.org>
  21 Cc: acme@kernel.org
  22 Cc: eranian@google.com
  23 Link: http://lkml.kernel.org/r/1525371913-10597-2-git-send-email-kan.liang@intel.com
  24 Signed-off-by: Ingo Molnar <mingo@kernel.org>
  25 Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
  26 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  27 ---
  28  arch/x86/events/intel/uncore_nhmex.c |    2 +-
  29  1 file changed, 1 insertion(+), 1 deletion(-)
  30
  31 --- a/arch/x86/events/intel/uncore_nhmex.c
  32 +++ b/arch/x86/events/intel/uncore_nhmex.c
  33 @@ -246,7 +246,7 @@ static void nhmex_uncore_msr_enable_even
  34  {
  35         struct hw_perf_event *hwc = &event->hw;
  36
  37 -       if (hwc->idx >= UNCORE_PMC_IDX_FIXED)
  38 +       if (hwc->idx == UNCORE_PMC_IDX_FIXED)
  39                 wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0);
  40         else if (box->pmu->type->event_mask & NHMEX_PMON_CTL_EN_BIT0)
  41                 wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22);