releases/4.14.67/net-stmmac-socfpga-add-additional-ocp-reset-line-for-stratix10.patch

   1 From foo@baz Wed Aug 22 09:33:46 CEST 2018
   2 From: Dinh Nguyen <dinguyen@kernel.org>
   3 Date: Tue, 19 Jun 2018 10:35:38 -0500
   4 Subject: net: stmmac: socfpga: add additional ocp reset line for Stratix10
   5
   6 From: Dinh Nguyen <dinguyen@kernel.org>
   7
   8 [ Upstream commit bc8a2d9bcbf1ca548b1deb315d14e1da81945bea ]
   9
  10 The Stratix10 platform has an additional reset line, OCP(Open Core Protocol),
  11 that also needs to get deasserted for the stmmac ethernet controller to work.
  12 Thus we need to update the Kconfig to include ARCH_STRATIX10 in order to build
  13 dwmac-socfpga.
  14
  15 Also, remove the redundant check for the reset controller pointer. The
  16 reset driver already checks for the pointer and returns 0 if the pointer
  17 is NULL.
  18
  19 Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
  20 Signed-off-by: David S. Miller <davem@davemloft.net>
  21 Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
  22 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  23 ---
  24  drivers/net/ethernet/stmicro/stmmac/Kconfig         |    2 +-
  25  drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c |   18 ++++++++++++++----
  26  2 files changed, 15 insertions(+), 5 deletions(-)
  27
  28 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
  29 +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
  30 @@ -111,7 +111,7 @@ config DWMAC_ROCKCHIP
  31  config DWMAC_SOCFPGA
  32         tristate "SOCFPGA dwmac support"
  33         default ARCH_SOCFPGA
  34 -       depends on OF && (ARCH_SOCFPGA || COMPILE_TEST)
  35 +       depends on OF && (ARCH_SOCFPGA || ARCH_STRATIX10 || COMPILE_TEST)
  36         select MFD_SYSCON
  37         help
  38           Support for ethernet controller on Altera SOCFPGA
  39 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
  40 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
  41 @@ -55,6 +55,7 @@ struct socfpga_dwmac {
  42         struct  device *dev;
  43         struct regmap *sys_mgr_base_addr;
  44         struct reset_control *stmmac_rst;
  45 +       struct reset_control *stmmac_ocp_rst;
  46         void __iomem *splitter_base;
  47         bool f2h_ptp_ref_clk;
  48         struct tse_pcs pcs;
  49 @@ -262,8 +263,8 @@ static int socfpga_dwmac_set_phy_mode(st
  50                 val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII;
  51
  52         /* Assert reset to the enet controller before changing the phy mode */
  53 -       if (dwmac->stmmac_rst)
  54 -               reset_control_assert(dwmac->stmmac_rst);
  55 +       reset_control_assert(dwmac->stmmac_ocp_rst);
  56 +       reset_control_assert(dwmac->stmmac_rst);
  57
  58         regmap_read(sys_mgr_base_addr, reg_offset, &ctrl);
  59         ctrl &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << reg_shift);
  60 @@ -288,8 +289,8 @@ static int socfpga_dwmac_set_phy_mode(st
  61         /* Deassert reset for the phy configuration to be sampled by
  62          * the enet controller, and operation to start in requested mode
  63          */
  64 -       if (dwmac->stmmac_rst)
  65 -               reset_control_deassert(dwmac->stmmac_rst);
  66 +       reset_control_deassert(dwmac->stmmac_ocp_rst);
  67 +       reset_control_deassert(dwmac->stmmac_rst);
  68         if (phymode == PHY_INTERFACE_MODE_SGMII) {
  69                 if (tse_pcs_init(dwmac->pcs.tse_pcs_base, &dwmac->pcs) != 0) {
  70                         dev_err(dwmac->dev, "Unable to initialize TSE PCS");
  71 @@ -324,6 +325,15 @@ static int socfpga_dwmac_probe(struct pl
  72                 goto err_remove_config_dt;
  73         }
  74
  75 +       dwmac->stmmac_ocp_rst = devm_reset_control_get_optional(dev, "stmmaceth-ocp");
  76 +       if (IS_ERR(dwmac->stmmac_ocp_rst)) {
  77 +               ret = PTR_ERR(dwmac->stmmac_ocp_rst);
  78 +               dev_err(dev, "error getting reset control of ocp %d\n", ret);
  79 +               goto err_remove_config_dt;
  80 +       }
  81 +
  82 +       reset_control_deassert(dwmac->stmmac_ocp_rst);
  83 +
  84         ret = socfpga_dwmac_parse_data(dwmac, dev);
  85         if (ret) {
  86                 dev_err(dev, "Unable to parse OF data\n");