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Fix up backported ptrace patch
[thirdparty/kernel/stable-queue.git] / releases / 4.15.10 / tpm_tis-move-ilb_base_addr-to-tpm_tis_data.patch
1 From c382babccba2c82fe57f9e647f290fb7bf4d130d Mon Sep 17 00:00:00 2001
2 From: Azhar Shaikh <azhar.shaikh@intel.com>
3 Date: Fri, 22 Dec 2017 12:13:43 -0800
4 Subject: tpm_tis: Move ilb_base_addr to tpm_tis_data
5
6 From: Azhar Shaikh <azhar.shaikh@intel.com>
7
8 commit c382babccba2c82fe57f9e647f290fb7bf4d130d upstream.
9
10 Move static variable ilb_base_addr to tpm_tis_data.
11
12 Cc: stable@vger.kernel.org
13 Signed-off-by: Azhar Shaikh <azhar.shaikh@intel.com>
14 Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
15 Tested-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
16 Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
17 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
18
19 ---
20 drivers/char/tpm/tpm_tis.c | 75 ++++++++++++++--------------------------
21 drivers/char/tpm/tpm_tis_core.c | 16 ++++++++
22 drivers/char/tpm/tpm_tis_core.h | 13 ++++++
23 3 files changed, 56 insertions(+), 48 deletions(-)
24
25 --- a/drivers/char/tpm/tpm_tis.c
26 +++ b/drivers/char/tpm/tpm_tis.c
27 @@ -134,33 +134,24 @@ static int check_acpi_tpm2(struct device
28 #endif
29
30 #ifdef CONFIG_X86
31 -#define INTEL_LEGACY_BLK_BASE_ADDR 0xFED08000
32 -#define ILB_REMAP_SIZE 0x100
33 -#define LPC_CNTRL_REG_OFFSET 0x84
34 -#define LPC_CLKRUN_EN (1 << 2)
35 -
36 -static void __iomem *ilb_base_addr;
37 -
38 -static inline bool is_bsw(void)
39 -{
40 - return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
41 -}
42 +#define LPC_CNTRL_OFFSET 0x84
43 +#define LPC_CLKRUN_EN (1 << 2)
44
45 /**
46 * tpm_platform_begin_xfer() - clear LPC CLKRUN_EN i.e. clocks will be running
47 */
48 -static void tpm_platform_begin_xfer(void)
49 +static void tpm_platform_begin_xfer(struct tpm_tis_data *data)
50 {
51 u32 clkrun_val;
52
53 if (!is_bsw())
54 return;
55
56 - clkrun_val = ioread32(ilb_base_addr + LPC_CNTRL_REG_OFFSET);
57 + clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
58
59 /* Disable LPC CLKRUN# */
60 clkrun_val &= ~LPC_CLKRUN_EN;
61 - iowrite32(clkrun_val, ilb_base_addr + LPC_CNTRL_REG_OFFSET);
62 + iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
63
64 /*
65 * Write any random value on port 0x80 which is on LPC, to make
66 @@ -173,18 +164,18 @@ static void tpm_platform_begin_xfer(void
67 /**
68 * tpm_platform_end_xfer() - set LPC CLKRUN_EN i.e. clocks can be turned off
69 */
70 -static void tpm_platform_end_xfer(void)
71 +static void tpm_platform_end_xfer(struct tpm_tis_data *data)
72 {
73 u32 clkrun_val;
74
75 if (!is_bsw())
76 return;
77
78 - clkrun_val = ioread32(ilb_base_addr + LPC_CNTRL_REG_OFFSET);
79 + clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
80
81 /* Enable LPC CLKRUN# */
82 clkrun_val |= LPC_CLKRUN_EN;
83 - iowrite32(clkrun_val, ilb_base_addr + LPC_CNTRL_REG_OFFSET);
84 + iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
85
86 /*
87 * Write any random value on port 0x80 which is on LPC, to make
88 @@ -194,16 +185,11 @@ static void tpm_platform_end_xfer(void)
89
90 }
91 #else
92 -static inline bool is_bsw(void)
93 -{
94 - return false;
95 -}
96 -
97 -static void tpm_platform_begin_xfer(void)
98 +static void tpm_platform_begin_xfer(struct tpm_tis_data *data)
99 {
100 }
101
102 -static void tpm_platform_end_xfer(void)
103 +static void tpm_platform_end_xfer(struct tpm_tis_data *data)
104 {
105 }
106 #endif
107 @@ -213,12 +199,12 @@ static int tpm_tcg_read_bytes(struct tpm
108 {
109 struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
110
111 - tpm_platform_begin_xfer();
112 + tpm_platform_begin_xfer(data);
113
114 while (len--)
115 *result++ = ioread8(phy->iobase + addr);
116
117 - tpm_platform_end_xfer();
118 + tpm_platform_end_xfer(data);
119
120 return 0;
121 }
122 @@ -228,12 +214,12 @@ static int tpm_tcg_write_bytes(struct tp
123 {
124 struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
125
126 - tpm_platform_begin_xfer();
127 + tpm_platform_begin_xfer(data);
128
129 while (len--)
130 iowrite8(*value++, phy->iobase + addr);
131
132 - tpm_platform_end_xfer();
133 + tpm_platform_end_xfer(data);
134
135 return 0;
136 }
137 @@ -242,11 +228,11 @@ static int tpm_tcg_read16(struct tpm_tis
138 {
139 struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
140
141 - tpm_platform_begin_xfer();
142 + tpm_platform_begin_xfer(data);
143
144 *result = ioread16(phy->iobase + addr);
145
146 - tpm_platform_end_xfer();
147 + tpm_platform_end_xfer(data);
148
149 return 0;
150 }
151 @@ -255,11 +241,11 @@ static int tpm_tcg_read32(struct tpm_tis
152 {
153 struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
154
155 - tpm_platform_begin_xfer();
156 + tpm_platform_begin_xfer(data);
157
158 *result = ioread32(phy->iobase + addr);
159
160 - tpm_platform_end_xfer();
161 + tpm_platform_end_xfer(data);
162
163 return 0;
164 }
165 @@ -268,11 +254,11 @@ static int tpm_tcg_write32(struct tpm_ti
166 {
167 struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
168
169 - tpm_platform_begin_xfer();
170 + tpm_platform_begin_xfer(data);
171
172 iowrite32(value, phy->iobase + addr);
173
174 - tpm_platform_end_xfer();
175 + tpm_platform_end_xfer(data);
176
177 return 0;
178 }
179 @@ -351,9 +337,13 @@ MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
180 static void tpm_tis_pnp_remove(struct pnp_dev *dev)
181 {
182 struct tpm_chip *chip = pnp_get_drvdata(dev);
183 + struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
184
185 tpm_chip_unregister(chip);
186 tpm_tis_remove(chip);
187 + if (is_bsw())
188 + iounmap(priv->ilb_base_addr);
189 +
190 }
191
192 static struct pnp_driver tis_pnp_driver = {
193 @@ -400,10 +390,14 @@ static int tpm_tis_plat_probe(struct pla
194 static int tpm_tis_plat_remove(struct platform_device *pdev)
195 {
196 struct tpm_chip *chip = dev_get_drvdata(&pdev->dev);
197 + struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
198
199 tpm_chip_unregister(chip);
200 tpm_tis_remove(chip);
201
202 + if (is_bsw())
203 + iounmap(priv->ilb_base_addr);
204 +
205 return 0;
206 }
207
208 @@ -461,11 +455,6 @@ static int __init init_tis(void)
209 if (rc)
210 goto err_force;
211
212 -#ifdef CONFIG_X86
213 - if (is_bsw())
214 - ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
215 - ILB_REMAP_SIZE);
216 -#endif
217 rc = platform_driver_register(&tis_drv);
218 if (rc)
219 goto err_platform;
220 @@ -484,10 +473,6 @@ err_pnp:
221 err_platform:
222 if (force_pdev)
223 platform_device_unregister(force_pdev);
224 -#ifdef CONFIG_X86
225 - if (is_bsw())
226 - iounmap(ilb_base_addr);
227 -#endif
228 err_force:
229 return rc;
230 }
231 @@ -497,10 +482,6 @@ static void __exit cleanup_tis(void)
232 pnp_unregister_driver(&tis_pnp_driver);
233 platform_driver_unregister(&tis_drv);
234
235 -#ifdef CONFIG_X86
236 - if (is_bsw())
237 - iounmap(ilb_base_addr);
238 -#endif
239 if (force_pdev)
240 platform_device_unregister(force_pdev);
241 }
242 --- a/drivers/char/tpm/tpm_tis_core.c
243 +++ b/drivers/char/tpm/tpm_tis_core.c
244 @@ -701,6 +701,13 @@ int tpm_tis_core_init(struct device *dev
245 priv->phy_ops = phy_ops;
246 dev_set_drvdata(&chip->dev, priv);
247
248 + if (is_bsw()) {
249 + priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
250 + ILB_REMAP_SIZE);
251 + if (!priv->ilb_base_addr)
252 + return -ENOMEM;
253 + }
254 +
255 if (wait_startup(chip, 0) != 0) {
256 rc = -ENODEV;
257 goto out_err;
258 @@ -791,9 +798,16 @@ int tpm_tis_core_init(struct device *dev
259 }
260 }
261
262 - return tpm_chip_register(chip);
263 + rc = tpm_chip_register(chip);
264 + if (rc && is_bsw())
265 + iounmap(priv->ilb_base_addr);
266 +
267 + return rc;
268 out_err:
269 tpm_tis_remove(chip);
270 + if (is_bsw())
271 + iounmap(priv->ilb_base_addr);
272 +
273 return rc;
274 }
275 EXPORT_SYMBOL_GPL(tpm_tis_core_init);
276 --- a/drivers/char/tpm/tpm_tis_core.h
277 +++ b/drivers/char/tpm/tpm_tis_core.h
278 @@ -79,6 +79,9 @@ enum tis_defaults {
279 #define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
280 #define TPM_RID(l) (0x0F04 | ((l) << 12))
281
282 +#define INTEL_LEGACY_BLK_BASE_ADDR 0xFED08000
283 +#define ILB_REMAP_SIZE 0x100
284 +
285 enum tpm_tis_flags {
286 TPM_TIS_ITPM_WORKAROUND = BIT(0),
287 };
288 @@ -89,6 +92,7 @@ struct tpm_tis_data {
289 int irq;
290 bool irq_tested;
291 unsigned int flags;
292 + void __iomem *ilb_base_addr;
293 wait_queue_head_t int_queue;
294 wait_queue_head_t read_queue;
295 const struct tpm_tis_phy_ops *phy_ops;
296 @@ -144,6 +148,15 @@ static inline int tpm_tis_write32(struct
297 return data->phy_ops->write32(data, addr, value);
298 }
299
300 +static inline bool is_bsw(void)
301 +{
302 +#ifdef CONFIG_X86
303 + return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
304 +#else
305 + return false;
306 +#endif
307 +}
308 +
309 void tpm_tis_remove(struct tpm_chip *chip);
310 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
311 const struct tpm_tis_phy_ops *phy_ops,