]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/blob - releases/4.16.14/iio-adc-stm32-dfsdm-fix-sample-rate-for-div2-spi-clock.patch
drop queue-4.14/mips-make-sure-dt-memory-regions-are-valid.patch
[thirdparty/kernel/stable-queue.git] / releases / 4.16.14 / iio-adc-stm32-dfsdm-fix-sample-rate-for-div2-spi-clock.patch
1 From d58109dcf37fc9baec354385ec9fdcd8878d174d Mon Sep 17 00:00:00 2001
2 From: Fabrice Gasnier <fabrice.gasnier@st.com>
3 Date: Tue, 13 Mar 2018 15:23:06 +0100
4 Subject: iio: adc: stm32-dfsdm: fix sample rate for div2 spi clock
5
6 From: Fabrice Gasnier <fabrice.gasnier@st.com>
7
8 commit d58109dcf37fc9baec354385ec9fdcd8878d174d upstream.
9
10 When channel clk source is set to "CLKOUT_F" or "CLKOUT_R" (e.g. div2),
11 sample rate is currently set to half the requested value.
12
13 Fixes: eca949800d2d ("IIO: ADC: add stm32 DFSDM support for PDM
14 microphone")
15
16 Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
17 Acked-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
18 Cc: <Stable@vger.kernel.org>
19 Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
20 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
21
22 ---
23 drivers/iio/adc/stm32-dfsdm-adc.c | 14 ++++++++++++--
24 1 file changed, 12 insertions(+), 2 deletions(-)
25
26 --- a/drivers/iio/adc/stm32-dfsdm-adc.c
27 +++ b/drivers/iio/adc/stm32-dfsdm-adc.c
28 @@ -771,7 +771,7 @@ static int stm32_dfsdm_write_raw(struct
29 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
30 struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id];
31 struct stm32_dfsdm_channel *ch = &adc->dfsdm->ch_list[chan->channel];
32 - unsigned int spi_freq = adc->spi_freq;
33 + unsigned int spi_freq;
34 int ret = -EINVAL;
35
36 switch (mask) {
37 @@ -785,8 +785,18 @@ static int stm32_dfsdm_write_raw(struct
38 case IIO_CHAN_INFO_SAMP_FREQ:
39 if (!val)
40 return -EINVAL;
41 - if (ch->src != DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL)
42 +
43 + switch (ch->src) {
44 + case DFSDM_CHANNEL_SPI_CLOCK_INTERNAL:
45 spi_freq = adc->dfsdm->spi_master_freq;
46 + break;
47 + case DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING:
48 + case DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING:
49 + spi_freq = adc->dfsdm->spi_master_freq / 2;
50 + break;
51 + default:
52 + spi_freq = adc->spi_freq;
53 + }
54
55 if (spi_freq % val)
56 dev_warn(&indio_dev->dev,