releases/4.19.31/drm-amd-display-don-t-call-dm_pp_-function-from-an-fpu-block.patch

   1 From 59d3191f14dc18881fec1172c7096b7863622803 Mon Sep 17 00:00:00 2001
   2 From: Harry Wentland <harry.wentland@amd.com>
   3 Date: Wed, 30 Jan 2019 15:45:18 -0500
   4 Subject: drm/amd/display: don't call dm_pp_ function from an fpu block
   5
   6 From: Harry Wentland <harry.wentland@amd.com>
   7
   8 commit 59d3191f14dc18881fec1172c7096b7863622803 upstream.
   9
  10 Powerplay functions called from dm_pp_* functions tend to do a
  11 mutex_lock which isn't safe to do inside a kernel_fpu_begin/end block as
  12 those will disable/enable preemption.
  13
  14 Rearrange the dm_pp_get_clock_levels_by_type_with_voltage calls to make
  15 sure they happen outside of kernel_fpu_begin/end.
  16
  17 Cc: stable@vger.kernel.org
  18 Acked-by: Alex Deucher <alexander.deucher@amd.com>
  19 Signed-off-by: Harry Wentland <harry.wentland@amd.com>
  20 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
  21 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  22
  23 ---
  24  drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c |    8 ++++++--
  25  1 file changed, 6 insertions(+), 2 deletions(-)
  26
  27 --- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
  28 +++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
  29 @@ -1347,12 +1347,12 @@ void dcn_bw_update_from_pplib(struct dc
  30         struct dm_pp_clock_levels_with_voltage fclks = {0}, dcfclks = {0};
  31         bool res;
  32
  33 -       kernel_fpu_begin();
  34 -
  35         /* TODO: This is not the proper way to obtain fabric_and_dram_bandwidth, should be min(fclk, memclk) */
  36         res = dm_pp_get_clock_levels_by_type_with_voltage(
  37                         ctx, DM_PP_CLOCK_TYPE_FCLK, &fclks);
  38
  39 +       kernel_fpu_begin();
  40 +
  41         if (res)
  42                 res = verify_clock_values(&fclks);
  43
  44 @@ -1371,9 +1371,13 @@ void dcn_bw_update_from_pplib(struct dc
  45         } else
  46                 BREAK_TO_DEBUGGER();
  47
  48 +       kernel_fpu_end();
  49 +
  50         res = dm_pp_get_clock_levels_by_type_with_voltage(
  51                         ctx, DM_PP_CLOCK_TYPE_DCFCLK, &dcfclks);
  52
  53 +       kernel_fpu_begin();
  54 +
  55         if (res)
  56                 res = verify_clock_values(&dcfclks);
  57