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1 From 38ee2243aff928af588b2c25995b006f533d3963 Mon Sep 17 00:00:00 2001
2 From: Stephane Eranian <eranian@google.com>
3 Date: Wed, 6 Mar 2019 11:50:48 -0800
4 Subject: perf/x86/intel: Fix handling of wakeup_events for multi-entry PEBS
5
6 [ Upstream commit 583feb08e7f7ac9d533b446882eb3a54737a6dbb ]
7
8 When an event is programmed with attr.wakeup_events=N (N>0), it means
9 the caller is interested in getting a user level notification after
10 N samples have been recorded in the kernel sampling buffer.
11
12 With precise events on Intel processors, the kernel uses PEBS.
13 The kernel tries minimize sampling overhead by verifying
14 if the event configuration is compatible with multi-entry PEBS mode.
15 If so, the kernel is notified only when the buffer has reached its threshold.
16 Other PEBS operates in single-entry mode, the kenrel is notified for each
17 PEBS sample.
18
19 The problem is that the current implementation look at frequency
20 mode and event sample_type but ignores the wakeup_events field. Thus,
21 it may not be possible to receive a notification after each precise event.
22
23 This patch fixes this problem by disabling multi-entry PEBS if wakeup_events
24 is non-zero.
25
26 Signed-off-by: Stephane Eranian <eranian@google.com>
27 Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
28 Reviewed-by: Andi Kleen <ak@linux.intel.com>
29 Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
30 Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
31 Cc: Jiri Olsa <jolsa@redhat.com>
32 Cc: Linus Torvalds <torvalds@linux-foundation.org>
33 Cc: Peter Zijlstra <peterz@infradead.org>
34 Cc: Thomas Gleixner <tglx@linutronix.de>
35 Cc: Vince Weaver <vincent.weaver@maine.edu>
36 Cc: kan.liang@intel.com
37 Link: https://lkml.kernel.org/r/20190306195048.189514-1-eranian@google.com
38 Signed-off-by: Ingo Molnar <mingo@kernel.org>
39 Signed-off-by: Sasha Levin <sashal@kernel.org>
40 ---
41 arch/x86/events/intel/core.c | 2 +-
42 1 file changed, 1 insertion(+), 1 deletion(-)
43
44 diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
45 index 3dd204d1dd194..26432ee4590e3 100644
46 --- a/arch/x86/events/intel/core.c
47 +++ b/arch/x86/events/intel/core.c
48 @@ -3068,7 +3068,7 @@ static int intel_pmu_hw_config(struct perf_event *event)
49 return ret;
50
51 if (event->attr.precise_ip) {
52 - if (!event->attr.freq) {
53 + if (!(event->attr.freq || event->attr.wakeup_events)) {
54 event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD;
55 if (!(event->attr.sample_type &
56 ~intel_pmu_large_pebs_flags(event)))
57 --
58 2.20.1
59