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[thirdparty/kernel/stable-queue.git] / releases / 4.19.43 / 0002-x86-cpu-Sanitize-FAM6_ATOM-naming.patch
1 From 1d26b9133628763d70154bca61a16cf195fb9af9 Mon Sep 17 00:00:00 2001
2 From: Peter Zijlstra <peterz@infradead.org>
3 Date: Tue, 7 Aug 2018 10:17:27 -0700
4 Subject: [PATCH 02/30] x86/cpu: Sanitize FAM6_ATOM naming
5
6 commit f2c4db1bd80720cd8cb2a5aa220d9bc9f374f04e upstream
7
8 Going primarily by:
9
10 https://en.wikipedia.org/wiki/List_of_Intel_Atom_microprocessors
11
12 with additional information gleaned from other related pages; notably:
13
14 - Bonnell shrink was called Saltwell
15 - Moorefield is the Merriefield refresh which makes it Airmont
16
17 The general naming scheme is: FAM6_ATOM_UARCH_SOCTYPE
18
19 for i in `git grep -l FAM6_ATOM` ; do
20 sed -i -e 's/ATOM_PINEVIEW/ATOM_BONNELL/g' \
21 -e 's/ATOM_LINCROFT/ATOM_BONNELL_MID/' \
22 -e 's/ATOM_PENWELL/ATOM_SALTWELL_MID/g' \
23 -e 's/ATOM_CLOVERVIEW/ATOM_SALTWELL_TABLET/g' \
24 -e 's/ATOM_CEDARVIEW/ATOM_SALTWELL/g' \
25 -e 's/ATOM_SILVERMONT1/ATOM_SILVERMONT/g' \
26 -e 's/ATOM_SILVERMONT2/ATOM_SILVERMONT_X/g' \
27 -e 's/ATOM_MERRIFIELD/ATOM_SILVERMONT_MID/g' \
28 -e 's/ATOM_MOOREFIELD/ATOM_AIRMONT_MID/g' \
29 -e 's/ATOM_DENVERTON/ATOM_GOLDMONT_X/g' \
30 -e 's/ATOM_GEMINI_LAKE/ATOM_GOLDMONT_PLUS/g' ${i}
31 done
32
33 Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
34 Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
35 Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
36 Cc: Jiri Olsa <jolsa@redhat.com>
37 Cc: Linus Torvalds <torvalds@linux-foundation.org>
38 Cc: Peter Zijlstra <peterz@infradead.org>
39 Cc: Stephane Eranian <eranian@google.com>
40 Cc: Thomas Gleixner <tglx@linutronix.de>
41 Cc: Vince Weaver <vincent.weaver@maine.edu>
42 Cc: dave.hansen@linux.intel.com
43 Cc: len.brown@intel.com
44 Signed-off-by: Ingo Molnar <mingo@kernel.org>
45 Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
46 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
47 ---
48 arch/x86/events/intel/core.c | 20 ++++----
49 arch/x86/events/intel/cstate.c | 8 ++--
50 arch/x86/events/intel/rapl.c | 4 +-
51 arch/x86/events/msr.c | 8 ++--
52 arch/x86/include/asm/intel-family.h | 33 ++++++-------
53 arch/x86/kernel/cpu/common.c | 28 +++++------
54 arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 4 +-
55 arch/x86/kernel/tsc.c | 2 +-
56 arch/x86/kernel/tsc_msr.c | 10 ++--
57 arch/x86/platform/atom/punit_atom_debug.c | 4 +-
58 .../intel-mid/device_libs/platform_bt.c | 2 +-
59 drivers/acpi/acpi_lpss.c | 2 +-
60 drivers/acpi/x86/utils.c | 2 +-
61 drivers/cpufreq/intel_pstate.c | 4 +-
62 drivers/edac/pnd2_edac.c | 2 +-
63 drivers/idle/intel_idle.c | 18 ++++----
64 drivers/mmc/host/sdhci-acpi.c | 2 +-
65 drivers/pci/pci-mid.c | 4 +-
66 drivers/platform/x86/intel_int0002_vgpio.c | 2 +-
67 drivers/platform/x86/intel_mid_powerbtn.c | 4 +-
68 .../platform/x86/intel_telemetry_debugfs.c | 2 +-
69 drivers/platform/x86/intel_telemetry_pltdrv.c | 2 +-
70 drivers/powercap/intel_rapl.c | 10 ++--
71 drivers/thermal/intel_soc_dts_thermal.c | 2 +-
72 sound/soc/intel/boards/bytcr_rt5651.c | 2 +-
73 tools/power/x86/turbostat/turbostat.c | 46 +++++++++----------
74 26 files changed, 115 insertions(+), 112 deletions(-)
75
76 diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
77 index f9958ad4d335..a759e59990fb 100644
78 --- a/arch/x86/events/intel/core.c
79 +++ b/arch/x86/events/intel/core.c
80 @@ -4132,11 +4132,11 @@ __init int intel_pmu_init(void)
81 name = "nehalem";
82 break;
83
84 - case INTEL_FAM6_ATOM_PINEVIEW:
85 - case INTEL_FAM6_ATOM_LINCROFT:
86 - case INTEL_FAM6_ATOM_PENWELL:
87 - case INTEL_FAM6_ATOM_CLOVERVIEW:
88 - case INTEL_FAM6_ATOM_CEDARVIEW:
89 + case INTEL_FAM6_ATOM_BONNELL:
90 + case INTEL_FAM6_ATOM_BONNELL_MID:
91 + case INTEL_FAM6_ATOM_SALTWELL:
92 + case INTEL_FAM6_ATOM_SALTWELL_MID:
93 + case INTEL_FAM6_ATOM_SALTWELL_TABLET:
94 memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
95 sizeof(hw_cache_event_ids));
96
97 @@ -4149,9 +4149,11 @@ __init int intel_pmu_init(void)
98 name = "bonnell";
99 break;
100
101 - case INTEL_FAM6_ATOM_SILVERMONT1:
102 - case INTEL_FAM6_ATOM_SILVERMONT2:
103 + case INTEL_FAM6_ATOM_SILVERMONT:
104 + case INTEL_FAM6_ATOM_SILVERMONT_X:
105 + case INTEL_FAM6_ATOM_SILVERMONT_MID:
106 case INTEL_FAM6_ATOM_AIRMONT:
107 + case INTEL_FAM6_ATOM_AIRMONT_MID:
108 memcpy(hw_cache_event_ids, slm_hw_cache_event_ids,
109 sizeof(hw_cache_event_ids));
110 memcpy(hw_cache_extra_regs, slm_hw_cache_extra_regs,
111 @@ -4170,7 +4172,7 @@ __init int intel_pmu_init(void)
112 break;
113
114 case INTEL_FAM6_ATOM_GOLDMONT:
115 - case INTEL_FAM6_ATOM_DENVERTON:
116 + case INTEL_FAM6_ATOM_GOLDMONT_X:
117 memcpy(hw_cache_event_ids, glm_hw_cache_event_ids,
118 sizeof(hw_cache_event_ids));
119 memcpy(hw_cache_extra_regs, glm_hw_cache_extra_regs,
120 @@ -4196,7 +4198,7 @@ __init int intel_pmu_init(void)
121 name = "goldmont";
122 break;
123
124 - case INTEL_FAM6_ATOM_GEMINI_LAKE:
125 + case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
126 memcpy(hw_cache_event_ids, glp_hw_cache_event_ids,
127 sizeof(hw_cache_event_ids));
128 memcpy(hw_cache_extra_regs, glp_hw_cache_extra_regs,
129 diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
130 index 6eb76106c469..56194c571299 100644
131 --- a/arch/x86/events/intel/cstate.c
132 +++ b/arch/x86/events/intel/cstate.c
133 @@ -559,8 +559,8 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
134
135 X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_ULT, hswult_cstates),
136
137 - X86_CSTATES_MODEL(INTEL_FAM6_ATOM_SILVERMONT1, slm_cstates),
138 - X86_CSTATES_MODEL(INTEL_FAM6_ATOM_SILVERMONT2, slm_cstates),
139 + X86_CSTATES_MODEL(INTEL_FAM6_ATOM_SILVERMONT, slm_cstates),
140 + X86_CSTATES_MODEL(INTEL_FAM6_ATOM_SILVERMONT_X, slm_cstates),
141 X86_CSTATES_MODEL(INTEL_FAM6_ATOM_AIRMONT, slm_cstates),
142
143 X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_CORE, snb_cstates),
144 @@ -581,9 +581,9 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
145 X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNM, knl_cstates),
146
147 X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT, glm_cstates),
148 - X86_CSTATES_MODEL(INTEL_FAM6_ATOM_DENVERTON, glm_cstates),
149 + X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT_X, glm_cstates),
150
151 - X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GEMINI_LAKE, glm_cstates),
152 + X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT_PLUS, glm_cstates),
153 { },
154 };
155 MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);
156 diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c
157 index 32f3e9423e99..91039ffed633 100644
158 --- a/arch/x86/events/intel/rapl.c
159 +++ b/arch/x86/events/intel/rapl.c
160 @@ -777,9 +777,9 @@ static const struct x86_cpu_id rapl_cpu_match[] __initconst = {
161 X86_RAPL_MODEL_MATCH(INTEL_FAM6_CANNONLAKE_MOBILE, skl_rapl_init),
162
163 X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT, hsw_rapl_init),
164 - X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_DENVERTON, hsw_rapl_init),
165 + X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT_X, hsw_rapl_init),
166
167 - X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GEMINI_LAKE, hsw_rapl_init),
168 + X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT_PLUS, hsw_rapl_init),
169 {},
170 };
171
172 diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
173 index b4771a6ddbc1..1b9f85abf9bc 100644
174 --- a/arch/x86/events/msr.c
175 +++ b/arch/x86/events/msr.c
176 @@ -69,14 +69,14 @@ static bool test_intel(int idx)
177 case INTEL_FAM6_BROADWELL_GT3E:
178 case INTEL_FAM6_BROADWELL_X:
179
180 - case INTEL_FAM6_ATOM_SILVERMONT1:
181 - case INTEL_FAM6_ATOM_SILVERMONT2:
182 + case INTEL_FAM6_ATOM_SILVERMONT:
183 + case INTEL_FAM6_ATOM_SILVERMONT_X:
184 case INTEL_FAM6_ATOM_AIRMONT:
185
186 case INTEL_FAM6_ATOM_GOLDMONT:
187 - case INTEL_FAM6_ATOM_DENVERTON:
188 + case INTEL_FAM6_ATOM_GOLDMONT_X:
189
190 - case INTEL_FAM6_ATOM_GEMINI_LAKE:
191 + case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
192
193 case INTEL_FAM6_XEON_PHI_KNL:
194 case INTEL_FAM6_XEON_PHI_KNM:
195 diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
196 index 0ad25cc895ae..058b1a1994c4 100644
197 --- a/arch/x86/include/asm/intel-family.h
198 +++ b/arch/x86/include/asm/intel-family.h
199 @@ -8,9 +8,6 @@
200 * The "_X" parts are generally the EP and EX Xeons, or the
201 * "Extreme" ones, like Broadwell-E.
202 *
203 - * Things ending in "2" are usually because we have no better
204 - * name for them. There's no processor called "SILVERMONT2".
205 - *
206 * While adding a new CPUID for a new microarchitecture, add a new
207 * group to keep logically sorted out in chronological order. Within
208 * that group keep the CPUID for the variants sorted by model number.
209 @@ -59,19 +56,23 @@
210
211 /* "Small Core" Processors (Atom) */
212
213 -#define INTEL_FAM6_ATOM_PINEVIEW 0x1C
214 -#define INTEL_FAM6_ATOM_LINCROFT 0x26
215 -#define INTEL_FAM6_ATOM_PENWELL 0x27
216 -#define INTEL_FAM6_ATOM_CLOVERVIEW 0x35
217 -#define INTEL_FAM6_ATOM_CEDARVIEW 0x36
218 -#define INTEL_FAM6_ATOM_SILVERMONT1 0x37 /* BayTrail/BYT / Valleyview */
219 -#define INTEL_FAM6_ATOM_SILVERMONT2 0x4D /* Avaton/Rangely */
220 -#define INTEL_FAM6_ATOM_AIRMONT 0x4C /* CherryTrail / Braswell */
221 -#define INTEL_FAM6_ATOM_MERRIFIELD 0x4A /* Tangier */
222 -#define INTEL_FAM6_ATOM_MOOREFIELD 0x5A /* Anniedale */
223 -#define INTEL_FAM6_ATOM_GOLDMONT 0x5C
224 -#define INTEL_FAM6_ATOM_DENVERTON 0x5F /* Goldmont Microserver */
225 -#define INTEL_FAM6_ATOM_GEMINI_LAKE 0x7A
226 +#define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */
227 +#define INTEL_FAM6_ATOM_BONNELL_MID 0x26 /* Silverthorne, Lincroft */
228 +
229 +#define INTEL_FAM6_ATOM_SALTWELL 0x36 /* Cedarview */
230 +#define INTEL_FAM6_ATOM_SALTWELL_MID 0x27 /* Penwell */
231 +#define INTEL_FAM6_ATOM_SALTWELL_TABLET 0x35 /* Cloverview */
232 +
233 +#define INTEL_FAM6_ATOM_SILVERMONT 0x37 /* Bay Trail, Valleyview */
234 +#define INTEL_FAM6_ATOM_SILVERMONT_X 0x4D /* Avaton, Rangely */
235 +#define INTEL_FAM6_ATOM_SILVERMONT_MID 0x4A /* Merriefield */
236 +
237 +#define INTEL_FAM6_ATOM_AIRMONT 0x4C /* Cherry Trail, Braswell */
238 +#define INTEL_FAM6_ATOM_AIRMONT_MID 0x5A /* Moorefield */
239 +
240 +#define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */
241 +#define INTEL_FAM6_ATOM_GOLDMONT_X 0x5F /* Denverton */
242 +#define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */
243
244 /* Xeon Phi */
245
246 diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
247 index 44c4ef3d989b..10e5ccfa9278 100644
248 --- a/arch/x86/kernel/cpu/common.c
249 +++ b/arch/x86/kernel/cpu/common.c
250 @@ -949,11 +949,11 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
251 }
252
253 static const __initconst struct x86_cpu_id cpu_no_speculation[] = {
254 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CEDARVIEW, X86_FEATURE_ANY },
255 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CLOVERVIEW, X86_FEATURE_ANY },
256 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_LINCROFT, X86_FEATURE_ANY },
257 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PENWELL, X86_FEATURE_ANY },
258 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PINEVIEW, X86_FEATURE_ANY },
259 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SALTWELL, X86_FEATURE_ANY },
260 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SALTWELL_TABLET, X86_FEATURE_ANY },
261 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_BONNELL_MID, X86_FEATURE_ANY },
262 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SALTWELL_MID, X86_FEATURE_ANY },
263 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_BONNELL, X86_FEATURE_ANY },
264 { X86_VENDOR_CENTAUR, 5 },
265 { X86_VENDOR_INTEL, 5 },
266 { X86_VENDOR_NSC, 5 },
267 @@ -968,10 +968,10 @@ static const __initconst struct x86_cpu_id cpu_no_meltdown[] = {
268
269 /* Only list CPUs which speculate but are non susceptible to SSB */
270 static const __initconst struct x86_cpu_id cpu_no_spec_store_bypass[] = {
271 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 },
272 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT },
273 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },
274 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT2 },
275 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_MERRIFIELD },
276 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT_X },
277 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT_MID },
278 { X86_VENDOR_INTEL, 6, INTEL_FAM6_CORE_YONAH },
279 { X86_VENDOR_INTEL, 6, INTEL_FAM6_XEON_PHI_KNL },
280 { X86_VENDOR_INTEL, 6, INTEL_FAM6_XEON_PHI_KNM },
281 @@ -984,14 +984,14 @@ static const __initconst struct x86_cpu_id cpu_no_spec_store_bypass[] = {
282
283 static const __initconst struct x86_cpu_id cpu_no_l1tf[] = {
284 /* in addition to cpu_no_speculation */
285 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 },
286 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT2 },
287 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT },
288 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT_X },
289 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },
290 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_MERRIFIELD },
291 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_MOOREFIELD },
292 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT_MID },
293 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT_MID },
294 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_GOLDMONT },
295 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_DENVERTON },
296 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_GEMINI_LAKE },
297 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_GOLDMONT_X },
298 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_GOLDMONT_PLUS },
299 { X86_VENDOR_INTEL, 6, INTEL_FAM6_XEON_PHI_KNL },
300 { X86_VENDOR_INTEL, 6, INTEL_FAM6_XEON_PHI_KNM },
301 {}
302 diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c
303 index f8c260d522ca..912d53939f4f 100644
304 --- a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c
305 +++ b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c
306 @@ -91,7 +91,7 @@ static u64 get_prefetch_disable_bits(void)
307 */
308 return 0xF;
309 case INTEL_FAM6_ATOM_GOLDMONT:
310 - case INTEL_FAM6_ATOM_GEMINI_LAKE:
311 + case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
312 /*
313 * SDM defines bits of MSR_MISC_FEATURE_CONTROL register
314 * as:
315 @@ -995,7 +995,7 @@ static int measure_cycles_perf_fn(void *_plr)
316
317 switch (boot_cpu_data.x86_model) {
318 case INTEL_FAM6_ATOM_GOLDMONT:
319 - case INTEL_FAM6_ATOM_GEMINI_LAKE:
320 + case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
321 l2_hit_bits = (0x52ULL << 16) | (0x2 << 8) | 0xd1;
322 l2_miss_bits = (0x52ULL << 16) | (0x10 << 8) | 0xd1;
323 break;
324 diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
325 index 6d5dc5dabfd7..03b7529333a6 100644
326 --- a/arch/x86/kernel/tsc.c
327 +++ b/arch/x86/kernel/tsc.c
328 @@ -636,7 +636,7 @@ unsigned long native_calibrate_tsc(void)
329 case INTEL_FAM6_KABYLAKE_DESKTOP:
330 crystal_khz = 24000; /* 24.0 MHz */
331 break;
332 - case INTEL_FAM6_ATOM_DENVERTON:
333 + case INTEL_FAM6_ATOM_GOLDMONT_X:
334 crystal_khz = 25000; /* 25.0 MHz */
335 break;
336 case INTEL_FAM6_ATOM_GOLDMONT:
337 diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
338 index 27ef714d886c..3d0e9aeea7c8 100644
339 --- a/arch/x86/kernel/tsc_msr.c
340 +++ b/arch/x86/kernel/tsc_msr.c
341 @@ -59,12 +59,12 @@ static const struct freq_desc freq_desc_ann = {
342 };
343
344 static const struct x86_cpu_id tsc_msr_cpu_ids[] = {
345 - INTEL_CPU_FAM6(ATOM_PENWELL, freq_desc_pnw),
346 - INTEL_CPU_FAM6(ATOM_CLOVERVIEW, freq_desc_clv),
347 - INTEL_CPU_FAM6(ATOM_SILVERMONT1, freq_desc_byt),
348 + INTEL_CPU_FAM6(ATOM_SALTWELL_MID, freq_desc_pnw),
349 + INTEL_CPU_FAM6(ATOM_SALTWELL_TABLET, freq_desc_clv),
350 + INTEL_CPU_FAM6(ATOM_SILVERMONT, freq_desc_byt),
351 + INTEL_CPU_FAM6(ATOM_SILVERMONT_MID, freq_desc_tng),
352 INTEL_CPU_FAM6(ATOM_AIRMONT, freq_desc_cht),
353 - INTEL_CPU_FAM6(ATOM_MERRIFIELD, freq_desc_tng),
354 - INTEL_CPU_FAM6(ATOM_MOOREFIELD, freq_desc_ann),
355 + INTEL_CPU_FAM6(ATOM_AIRMONT_MID, freq_desc_ann),
356 {}
357 };
358
359 diff --git a/arch/x86/platform/atom/punit_atom_debug.c b/arch/x86/platform/atom/punit_atom_debug.c
360 index 034813d4ab1e..41dae0f0d898 100644
361 --- a/arch/x86/platform/atom/punit_atom_debug.c
362 +++ b/arch/x86/platform/atom/punit_atom_debug.c
363 @@ -143,8 +143,8 @@ static void punit_dbgfs_unregister(void)
364 (kernel_ulong_t)&drv_data }
365
366 static const struct x86_cpu_id intel_punit_cpu_ids[] = {
367 - ICPU(INTEL_FAM6_ATOM_SILVERMONT1, punit_device_byt),
368 - ICPU(INTEL_FAM6_ATOM_MERRIFIELD, punit_device_tng),
369 + ICPU(INTEL_FAM6_ATOM_SILVERMONT, punit_device_byt),
370 + ICPU(INTEL_FAM6_ATOM_SILVERMONT_MID, punit_device_tng),
371 ICPU(INTEL_FAM6_ATOM_AIRMONT, punit_device_cht),
372 {}
373 };
374 diff --git a/arch/x86/platform/intel-mid/device_libs/platform_bt.c b/arch/x86/platform/intel-mid/device_libs/platform_bt.c
375 index 5a0483e7bf66..31dce781364c 100644
376 --- a/arch/x86/platform/intel-mid/device_libs/platform_bt.c
377 +++ b/arch/x86/platform/intel-mid/device_libs/platform_bt.c
378 @@ -68,7 +68,7 @@ static struct bt_sfi_data tng_bt_sfi_data __initdata = {
379 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (kernel_ulong_t)&ddata }
380
381 static const struct x86_cpu_id bt_sfi_cpu_ids[] = {
382 - ICPU(INTEL_FAM6_ATOM_MERRIFIELD, tng_bt_sfi_data),
383 + ICPU(INTEL_FAM6_ATOM_SILVERMONT_MID, tng_bt_sfi_data),
384 {}
385 };
386
387 diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
388 index 969bf8d515c0..c651e206d796 100644
389 --- a/drivers/acpi/acpi_lpss.c
390 +++ b/drivers/acpi/acpi_lpss.c
391 @@ -292,7 +292,7 @@ static const struct lpss_device_desc bsw_spi_dev_desc = {
392 #define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
393
394 static const struct x86_cpu_id lpss_cpu_ids[] = {
395 - ICPU(INTEL_FAM6_ATOM_SILVERMONT1), /* Valleyview, Bay Trail */
396 + ICPU(INTEL_FAM6_ATOM_SILVERMONT), /* Valleyview, Bay Trail */
397 ICPU(INTEL_FAM6_ATOM_AIRMONT), /* Braswell, Cherry Trail */
398 {}
399 };
400 diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c
401 index 06c31ec3cc70..9a8e286dd86f 100644
402 --- a/drivers/acpi/x86/utils.c
403 +++ b/drivers/acpi/x86/utils.c
404 @@ -54,7 +54,7 @@ static const struct always_present_id always_present_ids[] = {
405 * Bay / Cherry Trail PWM directly poked by GPU driver in win10,
406 * but Linux uses a separate PWM driver, harmless if not used.
407 */
408 - ENTRY("80860F09", "1", ICPU(INTEL_FAM6_ATOM_SILVERMONT1), {}),
409 + ENTRY("80860F09", "1", ICPU(INTEL_FAM6_ATOM_SILVERMONT), {}),
410 ENTRY("80862288", "1", ICPU(INTEL_FAM6_ATOM_AIRMONT), {}),
411 /*
412 * The INT0002 device is necessary to clear wakeup interrupt sources
413 diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
414 index a005711f909e..29f25d5d65e0 100644
415 --- a/drivers/cpufreq/intel_pstate.c
416 +++ b/drivers/cpufreq/intel_pstate.c
417 @@ -1779,7 +1779,7 @@ static const struct pstate_funcs knl_funcs = {
418 static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
419 ICPU(INTEL_FAM6_SANDYBRIDGE, core_funcs),
420 ICPU(INTEL_FAM6_SANDYBRIDGE_X, core_funcs),
421 - ICPU(INTEL_FAM6_ATOM_SILVERMONT1, silvermont_funcs),
422 + ICPU(INTEL_FAM6_ATOM_SILVERMONT, silvermont_funcs),
423 ICPU(INTEL_FAM6_IVYBRIDGE, core_funcs),
424 ICPU(INTEL_FAM6_HASWELL_CORE, core_funcs),
425 ICPU(INTEL_FAM6_BROADWELL_CORE, core_funcs),
426 @@ -1796,7 +1796,7 @@ static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
427 ICPU(INTEL_FAM6_XEON_PHI_KNL, knl_funcs),
428 ICPU(INTEL_FAM6_XEON_PHI_KNM, knl_funcs),
429 ICPU(INTEL_FAM6_ATOM_GOLDMONT, core_funcs),
430 - ICPU(INTEL_FAM6_ATOM_GEMINI_LAKE, core_funcs),
431 + ICPU(INTEL_FAM6_ATOM_GOLDMONT_PLUS, core_funcs),
432 ICPU(INTEL_FAM6_SKYLAKE_X, core_funcs),
433 {}
434 };
435 diff --git a/drivers/edac/pnd2_edac.c b/drivers/edac/pnd2_edac.c
436 index df28b65358d2..903a4f1fadcc 100644
437 --- a/drivers/edac/pnd2_edac.c
438 +++ b/drivers/edac/pnd2_edac.c
439 @@ -1541,7 +1541,7 @@ static struct dunit_ops dnv_ops = {
440
441 static const struct x86_cpu_id pnd2_cpuids[] = {
442 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_GOLDMONT, 0, (kernel_ulong_t)&apl_ops },
443 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_DENVERTON, 0, (kernel_ulong_t)&dnv_ops },
444 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_GOLDMONT_X, 0, (kernel_ulong_t)&dnv_ops },
445 { }
446 };
447 MODULE_DEVICE_TABLE(x86cpu, pnd2_cpuids);
448 diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
449 index b2ccce5fb071..c4bb67ed8da3 100644
450 --- a/drivers/idle/intel_idle.c
451 +++ b/drivers/idle/intel_idle.c
452 @@ -1076,14 +1076,14 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
453 ICPU(INTEL_FAM6_WESTMERE, idle_cpu_nehalem),
454 ICPU(INTEL_FAM6_WESTMERE_EP, idle_cpu_nehalem),
455 ICPU(INTEL_FAM6_NEHALEM_EX, idle_cpu_nehalem),
456 - ICPU(INTEL_FAM6_ATOM_PINEVIEW, idle_cpu_atom),
457 - ICPU(INTEL_FAM6_ATOM_LINCROFT, idle_cpu_lincroft),
458 + ICPU(INTEL_FAM6_ATOM_BONNELL, idle_cpu_atom),
459 + ICPU(INTEL_FAM6_ATOM_BONNELL_MID, idle_cpu_lincroft),
460 ICPU(INTEL_FAM6_WESTMERE_EX, idle_cpu_nehalem),
461 ICPU(INTEL_FAM6_SANDYBRIDGE, idle_cpu_snb),
462 ICPU(INTEL_FAM6_SANDYBRIDGE_X, idle_cpu_snb),
463 - ICPU(INTEL_FAM6_ATOM_CEDARVIEW, idle_cpu_atom),
464 - ICPU(INTEL_FAM6_ATOM_SILVERMONT1, idle_cpu_byt),
465 - ICPU(INTEL_FAM6_ATOM_MERRIFIELD, idle_cpu_tangier),
466 + ICPU(INTEL_FAM6_ATOM_SALTWELL, idle_cpu_atom),
467 + ICPU(INTEL_FAM6_ATOM_SILVERMONT, idle_cpu_byt),
468 + ICPU(INTEL_FAM6_ATOM_SILVERMONT_MID, idle_cpu_tangier),
469 ICPU(INTEL_FAM6_ATOM_AIRMONT, idle_cpu_cht),
470 ICPU(INTEL_FAM6_IVYBRIDGE, idle_cpu_ivb),
471 ICPU(INTEL_FAM6_IVYBRIDGE_X, idle_cpu_ivt),
472 @@ -1091,7 +1091,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
473 ICPU(INTEL_FAM6_HASWELL_X, idle_cpu_hsw),
474 ICPU(INTEL_FAM6_HASWELL_ULT, idle_cpu_hsw),
475 ICPU(INTEL_FAM6_HASWELL_GT3E, idle_cpu_hsw),
476 - ICPU(INTEL_FAM6_ATOM_SILVERMONT2, idle_cpu_avn),
477 + ICPU(INTEL_FAM6_ATOM_SILVERMONT_X, idle_cpu_avn),
478 ICPU(INTEL_FAM6_BROADWELL_CORE, idle_cpu_bdw),
479 ICPU(INTEL_FAM6_BROADWELL_GT3E, idle_cpu_bdw),
480 ICPU(INTEL_FAM6_BROADWELL_X, idle_cpu_bdw),
481 @@ -1104,8 +1104,8 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
482 ICPU(INTEL_FAM6_XEON_PHI_KNL, idle_cpu_knl),
483 ICPU(INTEL_FAM6_XEON_PHI_KNM, idle_cpu_knl),
484 ICPU(INTEL_FAM6_ATOM_GOLDMONT, idle_cpu_bxt),
485 - ICPU(INTEL_FAM6_ATOM_GEMINI_LAKE, idle_cpu_bxt),
486 - ICPU(INTEL_FAM6_ATOM_DENVERTON, idle_cpu_dnv),
487 + ICPU(INTEL_FAM6_ATOM_GOLDMONT_PLUS, idle_cpu_bxt),
488 + ICPU(INTEL_FAM6_ATOM_GOLDMONT_X, idle_cpu_dnv),
489 {}
490 };
491
492 @@ -1322,7 +1322,7 @@ static void intel_idle_state_table_update(void)
493 ivt_idle_state_table_update();
494 break;
495 case INTEL_FAM6_ATOM_GOLDMONT:
496 - case INTEL_FAM6_ATOM_GEMINI_LAKE:
497 + case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
498 bxt_idle_state_table_update();
499 break;
500 case INTEL_FAM6_SKYLAKE_DESKTOP:
501 diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c
502 index c61109f7b793..57c1ec322e42 100644
503 --- a/drivers/mmc/host/sdhci-acpi.c
504 +++ b/drivers/mmc/host/sdhci-acpi.c
505 @@ -247,7 +247,7 @@ static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
506 static bool sdhci_acpi_byt(void)
507 {
508 static const struct x86_cpu_id byt[] = {
509 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 },
510 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT },
511 {}
512 };
513
514 diff --git a/drivers/pci/pci-mid.c b/drivers/pci/pci-mid.c
515 index 314e135014dc..30fbe2ea6eab 100644
516 --- a/drivers/pci/pci-mid.c
517 +++ b/drivers/pci/pci-mid.c
518 @@ -62,8 +62,8 @@ static const struct pci_platform_pm_ops mid_pci_platform_pm = {
519 * arch/x86/platform/intel-mid/pwr.c.
520 */
521 static const struct x86_cpu_id lpss_cpu_ids[] = {
522 - ICPU(INTEL_FAM6_ATOM_PENWELL),
523 - ICPU(INTEL_FAM6_ATOM_MERRIFIELD),
524 + ICPU(INTEL_FAM6_ATOM_SALTWELL_MID),
525 + ICPU(INTEL_FAM6_ATOM_SILVERMONT_MID),
526 {}
527 };
528
529 diff --git a/drivers/platform/x86/intel_int0002_vgpio.c b/drivers/platform/x86/intel_int0002_vgpio.c
530 index a473dc51b18d..e89ad4964dc1 100644
531 --- a/drivers/platform/x86/intel_int0002_vgpio.c
532 +++ b/drivers/platform/x86/intel_int0002_vgpio.c
533 @@ -60,7 +60,7 @@ static const struct x86_cpu_id int0002_cpu_ids[] = {
534 /*
535 * Limit ourselves to Cherry Trail for now, until testing shows we
536 * need to handle the INT0002 device on Baytrail too.
537 - * ICPU(INTEL_FAM6_ATOM_SILVERMONT1), * Valleyview, Bay Trail *
538 + * ICPU(INTEL_FAM6_ATOM_SILVERMONT), * Valleyview, Bay Trail *
539 */
540 ICPU(INTEL_FAM6_ATOM_AIRMONT), /* Braswell, Cherry Trail */
541 {}
542 diff --git a/drivers/platform/x86/intel_mid_powerbtn.c b/drivers/platform/x86/intel_mid_powerbtn.c
543 index d79fbf924b13..5ad44204a9c3 100644
544 --- a/drivers/platform/x86/intel_mid_powerbtn.c
545 +++ b/drivers/platform/x86/intel_mid_powerbtn.c
546 @@ -125,8 +125,8 @@ static const struct mid_pb_ddata mrfld_ddata = {
547 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (kernel_ulong_t)&ddata }
548
549 static const struct x86_cpu_id mid_pb_cpu_ids[] = {
550 - ICPU(INTEL_FAM6_ATOM_PENWELL, mfld_ddata),
551 - ICPU(INTEL_FAM6_ATOM_MERRIFIELD, mrfld_ddata),
552 + ICPU(INTEL_FAM6_ATOM_SALTWELL_MID, mfld_ddata),
553 + ICPU(INTEL_FAM6_ATOM_SILVERMONT_MID, mrfld_ddata),
554 {}
555 };
556
557 diff --git a/drivers/platform/x86/intel_telemetry_debugfs.c b/drivers/platform/x86/intel_telemetry_debugfs.c
558 index 1423fa8710fd..b998d7da97fb 100644
559 --- a/drivers/platform/x86/intel_telemetry_debugfs.c
560 +++ b/drivers/platform/x86/intel_telemetry_debugfs.c
561 @@ -320,7 +320,7 @@ static struct telemetry_debugfs_conf telem_apl_debugfs_conf = {
562
563 static const struct x86_cpu_id telemetry_debugfs_cpu_ids[] = {
564 TELEM_DEBUGFS_CPU(INTEL_FAM6_ATOM_GOLDMONT, telem_apl_debugfs_conf),
565 - TELEM_DEBUGFS_CPU(INTEL_FAM6_ATOM_GEMINI_LAKE, telem_apl_debugfs_conf),
566 + TELEM_DEBUGFS_CPU(INTEL_FAM6_ATOM_GOLDMONT_PLUS, telem_apl_debugfs_conf),
567 {}
568 };
569
570 diff --git a/drivers/platform/x86/intel_telemetry_pltdrv.c b/drivers/platform/x86/intel_telemetry_pltdrv.c
571 index 2f889d6c270e..fcc6bee51a42 100644
572 --- a/drivers/platform/x86/intel_telemetry_pltdrv.c
573 +++ b/drivers/platform/x86/intel_telemetry_pltdrv.c
574 @@ -192,7 +192,7 @@ static struct telemetry_plt_config telem_glk_config = {
575
576 static const struct x86_cpu_id telemetry_cpu_ids[] = {
577 TELEM_CPU(INTEL_FAM6_ATOM_GOLDMONT, telem_apl_config),
578 - TELEM_CPU(INTEL_FAM6_ATOM_GEMINI_LAKE, telem_glk_config),
579 + TELEM_CPU(INTEL_FAM6_ATOM_GOLDMONT_PLUS, telem_glk_config),
580 {}
581 };
582
583 diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl.c
584 index 295d8dcba48c..8cbfcce57a06 100644
585 --- a/drivers/powercap/intel_rapl.c
586 +++ b/drivers/powercap/intel_rapl.c
587 @@ -1164,13 +1164,13 @@ static const struct x86_cpu_id rapl_ids[] __initconst = {
588 RAPL_CPU(INTEL_FAM6_KABYLAKE_DESKTOP, rapl_defaults_core),
589 RAPL_CPU(INTEL_FAM6_CANNONLAKE_MOBILE, rapl_defaults_core),
590
591 - RAPL_CPU(INTEL_FAM6_ATOM_SILVERMONT1, rapl_defaults_byt),
592 + RAPL_CPU(INTEL_FAM6_ATOM_SILVERMONT, rapl_defaults_byt),
593 RAPL_CPU(INTEL_FAM6_ATOM_AIRMONT, rapl_defaults_cht),
594 - RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD, rapl_defaults_tng),
595 - RAPL_CPU(INTEL_FAM6_ATOM_MOOREFIELD, rapl_defaults_ann),
596 + RAPL_CPU(INTEL_FAM6_ATOM_SILVERMONT_MID, rapl_defaults_tng),
597 + RAPL_CPU(INTEL_FAM6_ATOM_AIRMONT_MID, rapl_defaults_ann),
598 RAPL_CPU(INTEL_FAM6_ATOM_GOLDMONT, rapl_defaults_core),
599 - RAPL_CPU(INTEL_FAM6_ATOM_GEMINI_LAKE, rapl_defaults_core),
600 - RAPL_CPU(INTEL_FAM6_ATOM_DENVERTON, rapl_defaults_core),
601 + RAPL_CPU(INTEL_FAM6_ATOM_GOLDMONT_PLUS, rapl_defaults_core),
602 + RAPL_CPU(INTEL_FAM6_ATOM_GOLDMONT_X, rapl_defaults_core),
603
604 RAPL_CPU(INTEL_FAM6_XEON_PHI_KNL, rapl_defaults_hsw_server),
605 RAPL_CPU(INTEL_FAM6_XEON_PHI_KNM, rapl_defaults_hsw_server),
606 diff --git a/drivers/thermal/intel_soc_dts_thermal.c b/drivers/thermal/intel_soc_dts_thermal.c
607 index 1e47511a6bd5..d748527d7a38 100644
608 --- a/drivers/thermal/intel_soc_dts_thermal.c
609 +++ b/drivers/thermal/intel_soc_dts_thermal.c
610 @@ -45,7 +45,7 @@ static irqreturn_t soc_irq_thread_fn(int irq, void *dev_data)
611 }
612
613 static const struct x86_cpu_id soc_thermal_ids[] = {
614 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1, 0,
615 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT, 0,
616 BYT_SOC_DTS_APIC_IRQ},
617 {}
618 };
619 diff --git a/sound/soc/intel/boards/bytcr_rt5651.c b/sound/soc/intel/boards/bytcr_rt5651.c
620 index b74bbee111c6..c6c8d20be1d2 100644
621 --- a/sound/soc/intel/boards/bytcr_rt5651.c
622 +++ b/sound/soc/intel/boards/bytcr_rt5651.c
623 @@ -787,7 +787,7 @@ static struct snd_soc_card byt_rt5651_card = {
624 };
625
626 static const struct x86_cpu_id baytrail_cpu_ids[] = {
627 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 }, /* Valleyview */
628 + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT }, /* Valleyview */
629 {}
630 };
631
632 diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
633 index 83964f796edb..fbb53c952b73 100644
634 --- a/tools/power/x86/turbostat/turbostat.c
635 +++ b/tools/power/x86/turbostat/turbostat.c
636 @@ -2082,7 +2082,7 @@ int has_turbo_ratio_group_limits(int family, int model)
637 switch (model) {
638 case INTEL_FAM6_ATOM_GOLDMONT:
639 case INTEL_FAM6_SKYLAKE_X:
640 - case INTEL_FAM6_ATOM_DENVERTON:
641 + case INTEL_FAM6_ATOM_GOLDMONT_X:
642 return 1;
643 }
644 return 0;
645 @@ -3149,9 +3149,9 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
646 pkg_cstate_limits = skx_pkg_cstate_limits;
647 has_misc_feature_control = 1;
648 break;
649 - case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */
650 + case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
651 no_MSR_MISC_PWR_MGMT = 1;
652 - case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */
653 + case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */
654 pkg_cstate_limits = slv_pkg_cstate_limits;
655 break;
656 case INTEL_FAM6_ATOM_AIRMONT: /* AMT */
657 @@ -3163,8 +3163,8 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
658 pkg_cstate_limits = phi_pkg_cstate_limits;
659 break;
660 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
661 - case INTEL_FAM6_ATOM_GEMINI_LAKE:
662 - case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
663 + case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
664 + case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
665 pkg_cstate_limits = bxt_pkg_cstate_limits;
666 break;
667 default:
668 @@ -3193,9 +3193,9 @@ int has_slv_msrs(unsigned int family, unsigned int model)
669 return 0;
670
671 switch (model) {
672 - case INTEL_FAM6_ATOM_SILVERMONT1:
673 - case INTEL_FAM6_ATOM_MERRIFIELD:
674 - case INTEL_FAM6_ATOM_MOOREFIELD:
675 + case INTEL_FAM6_ATOM_SILVERMONT:
676 + case INTEL_FAM6_ATOM_SILVERMONT_MID:
677 + case INTEL_FAM6_ATOM_AIRMONT_MID:
678 return 1;
679 }
680 return 0;
681 @@ -3207,7 +3207,7 @@ int is_dnv(unsigned int family, unsigned int model)
682 return 0;
683
684 switch (model) {
685 - case INTEL_FAM6_ATOM_DENVERTON:
686 + case INTEL_FAM6_ATOM_GOLDMONT_X:
687 return 1;
688 }
689 return 0;
690 @@ -3724,8 +3724,8 @@ double get_tdp(unsigned int model)
691 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
692
693 switch (model) {
694 - case INTEL_FAM6_ATOM_SILVERMONT1:
695 - case INTEL_FAM6_ATOM_SILVERMONT2:
696 + case INTEL_FAM6_ATOM_SILVERMONT:
697 + case INTEL_FAM6_ATOM_SILVERMONT_X:
698 return 30.0;
699 default:
700 return 135.0;
701 @@ -3791,7 +3791,7 @@ void rapl_probe(unsigned int family, unsigned int model)
702 }
703 break;
704 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
705 - case INTEL_FAM6_ATOM_GEMINI_LAKE:
706 + case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
707 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
708 if (rapl_joules)
709 BIC_PRESENT(BIC_Pkg_J);
710 @@ -3850,8 +3850,8 @@ void rapl_probe(unsigned int family, unsigned int model)
711 BIC_PRESENT(BIC_RAMWatt);
712 }
713 break;
714 - case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */
715 - case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */
716 + case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
717 + case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */
718 do_rapl = RAPL_PKG | RAPL_CORES;
719 if (rapl_joules) {
720 BIC_PRESENT(BIC_Pkg_J);
721 @@ -3861,7 +3861,7 @@ void rapl_probe(unsigned int family, unsigned int model)
722 BIC_PRESENT(BIC_CorWatt);
723 }
724 break;
725 - case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
726 + case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
727 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
728 BIC_PRESENT(BIC_PKG__);
729 BIC_PRESENT(BIC_RAM__);
730 @@ -3884,7 +3884,7 @@ void rapl_probe(unsigned int family, unsigned int model)
731 return;
732
733 rapl_power_units = 1.0 / (1 << (msr & 0xF));
734 - if (model == INTEL_FAM6_ATOM_SILVERMONT1)
735 + if (model == INTEL_FAM6_ATOM_SILVERMONT)
736 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
737 else
738 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
739 @@ -4141,8 +4141,8 @@ int has_snb_msrs(unsigned int family, unsigned int model)
740 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
741 case INTEL_FAM6_SKYLAKE_X: /* SKX */
742 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
743 - case INTEL_FAM6_ATOM_GEMINI_LAKE:
744 - case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
745 + case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
746 + case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
747 return 1;
748 }
749 return 0;
750 @@ -4174,7 +4174,7 @@ int has_hsw_msrs(unsigned int family, unsigned int model)
751 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
752 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
753 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
754 - case INTEL_FAM6_ATOM_GEMINI_LAKE:
755 + case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
756 return 1;
757 }
758 return 0;
759 @@ -4209,8 +4209,8 @@ int is_slm(unsigned int family, unsigned int model)
760 if (!genuine_intel)
761 return 0;
762 switch (model) {
763 - case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */
764 - case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */
765 + case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
766 + case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */
767 return 1;
768 }
769 return 0;
770 @@ -4581,11 +4581,11 @@ void process_cpuid()
771 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
772 crystal_hz = 24000000; /* 24.0 MHz */
773 break;
774 - case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
775 + case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
776 crystal_hz = 25000000; /* 25.0 MHz */
777 break;
778 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
779 - case INTEL_FAM6_ATOM_GEMINI_LAKE:
780 + case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
781 crystal_hz = 19200000; /* 19.2 MHz */
782 break;
783 default:
784 --
785 2.21.0
786
Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/stable-queue.git