releases/4.4.14/sparc64-fix-bootup-regressions-on-some-kconfig-combinations.patch

   1 From foo@baz Mon Jun 20 10:48:29 PDT 2016
   2 From: "David S. Miller" <davem@davemloft.net>
   3 Date: Wed, 27 Apr 2016 17:27:37 -0400
   4 Subject: sparc64: Fix bootup regressions on some Kconfig combinations.
   5
   6 From: "David S. Miller" <davem@davemloft.net>
   7
   8 [ Upstream commit 49fa5230462f9f2c4e97c81356473a6bdf06c422 ]
   9
  10 The system call tracing bug fix mentioned in the Fixes tag
  11 below increased the amount of assembler code in the sequence
  12 of assembler files included by head_64.S
  13
  14 This caused to total set of code to exceed 0x4000 bytes in
  15 size, which overflows the expression in head_64.S that works
  16 to place swapper_tsb at address 0x408000.
  17
  18 When this is violated, the TSB is not properly aligned, and
  19 also the trap table is not aligned properly either.  All of
  20 this together results in failed boots.
  21
  22 So, do two things:
  23
  24 1) Simplify some code by using ba,a instead of ba/nop to get
  25    those bytes back.
  26
  27 2) Add a linker script assertion to make sure that if this
  28    happens again the build will fail.
  29
  30 Fixes: 1a40b95374f6 ("sparc: Fix system call tracing register handling.")
  31 Reported-by: Meelis Roos <mroos@linux.ee>
  32 Reported-by: Joerg Abraham <joerg.abraham@nokia.com>
  33 Signed-off-by: David S. Miller <davem@davemloft.net>
  34 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  35 ---
  36  arch/sparc/kernel/cherrs.S      |   14 +++++---------
  37  arch/sparc/kernel/fpu_traps.S   |   11 +++++------
  38  arch/sparc/kernel/head_64.S     |   24 ++++++++----------------
  39  arch/sparc/kernel/misctrap.S    |   12 ++++--------
  40  arch/sparc/kernel/spiterrs.S    |   18 ++++++------------
  41  arch/sparc/kernel/utrap.S       |    3 +--
  42  arch/sparc/kernel/vmlinux.lds.S |    4 ++++
  43  arch/sparc/kernel/winfixup.S    |    3 +--
  44  8 files changed, 34 insertions(+), 55 deletions(-)
  45
  46 --- a/arch/sparc/kernel/cherrs.S
  47 +++ b/arch/sparc/kernel/cherrs.S
  48 @@ -214,8 +214,7 @@ do_dcpe_tl1_nonfatal:       /* Ok we may use i
  49         subcc           %g1, %g2, %g1           ! Next cacheline
  50         bge,pt          %icc, 1b
  51          nop
  52 -       ba,pt           %xcc, dcpe_icpe_tl1_common
  53 -        nop
  54 +       ba,a,pt         %xcc, dcpe_icpe_tl1_common
  55
  56  do_dcpe_tl1_fatal:
  57         sethi           %hi(1f), %g7
  58 @@ -224,8 +223,7 @@ do_dcpe_tl1_fatal:
  59         mov             0x2, %o0
  60         call            cheetah_plus_parity_error
  61          add            %sp, PTREGS_OFF, %o1
  62 -       ba,pt           %xcc, rtrap
  63 -        nop
  64 +       ba,a,pt         %xcc, rtrap
  65         .size           do_dcpe_tl1,.-do_dcpe_tl1
  66
  67         .globl          do_icpe_tl1
  68 @@ -259,8 +257,7 @@ do_icpe_tl1_nonfatal:       /* Ok we may use i
  69         subcc           %g1, %g2, %g1
  70         bge,pt          %icc, 1b
  71          nop
  72 -       ba,pt           %xcc, dcpe_icpe_tl1_common
  73 -        nop
  74 +       ba,a,pt         %xcc, dcpe_icpe_tl1_common
  75
  76  do_icpe_tl1_fatal:
  77         sethi           %hi(1f), %g7
  78 @@ -269,8 +266,7 @@ do_icpe_tl1_fatal:
  79         mov             0x3, %o0
  80         call            cheetah_plus_parity_error
  81          add            %sp, PTREGS_OFF, %o1
  82 -       ba,pt           %xcc, rtrap
  83 -        nop
  84 +       ba,a,pt         %xcc, rtrap
  85         .size           do_icpe_tl1,.-do_icpe_tl1
  86
  87         .type           dcpe_icpe_tl1_common,#function
  88 @@ -456,7 +452,7 @@ __cheetah_log_error:
  89          cmp            %g2, 0x63
  90         be              c_cee
  91          nop
  92 -       ba,pt           %xcc, c_deferred
  93 +       ba,a,pt         %xcc, c_deferred
  94         .size           __cheetah_log_error,.-__cheetah_log_error
  95
  96         /* Cheetah FECC trap handling, we get here from tl{0,1}_fecc
  97 --- a/arch/sparc/kernel/fpu_traps.S
  98 +++ b/arch/sparc/kernel/fpu_traps.S
  99 @@ -100,8 +100,8 @@ do_fpdis:
 100         fmuld           %f0, %f2, %f26
 101         faddd           %f0, %f2, %f28
 102         fmuld           %f0, %f2, %f30
 103 -       b,pt            %xcc, fpdis_exit
 104 -        nop
 105 +       ba,a,pt         %xcc, fpdis_exit
 106 +
 107  2:     andcc           %g5, FPRS_DU, %g0
 108         bne,pt          %icc, 3f
 109          fzero          %f32
 110 @@ -144,8 +144,8 @@ do_fpdis:
 111         fmuld           %f32, %f34, %f58
 112         faddd           %f32, %f34, %f60
 113         fmuld           %f32, %f34, %f62
 114 -       ba,pt           %xcc, fpdis_exit
 115 -        nop
 116 +       ba,a,pt         %xcc, fpdis_exit
 117 +
 118  3:     mov             SECONDARY_CONTEXT, %g3
 119         add             %g6, TI_FPREGS, %g1
 120
 121 @@ -197,8 +197,7 @@ fpdis_exit2:
 122  fp_other_bounce:
 123         call            do_fpother
 124          add            %sp, PTREGS_OFF, %o0
 125 -       ba,pt           %xcc, rtrap
 126 -        nop
 127 +       ba,a,pt         %xcc, rtrap
 128         .size           fp_other_bounce,.-fp_other_bounce
 129
 130         .align          32
 131 --- a/arch/sparc/kernel/head_64.S
 132 +++ b/arch/sparc/kernel/head_64.S
 133 @@ -461,9 +461,8 @@ sun4v_chip_type:
 134         subcc   %g3, 1, %g3
 135         bne,pt  %xcc, 41b
 136         add     %g1, 1, %g1
 137 -       mov     SUN4V_CHIP_SPARC64X, %g4
 138         ba,pt   %xcc, 5f
 139 -       nop
 140 +        mov    SUN4V_CHIP_SPARC64X, %g4
 141
 142  49:
 143         mov     SUN4V_CHIP_UNKNOWN, %g4
 144 @@ -548,8 +547,7 @@ sun4u_init:
 145         stxa            %g0, [%g7] ASI_DMMU
 146         membar  #Sync
 147
 148 -       ba,pt           %xcc, sun4u_continue
 149 -        nop
 150 +       ba,a,pt         %xcc, sun4u_continue
 151
 152  sun4v_init:
 153         /* Set ctx 0 */
 154 @@ -560,14 +558,12 @@ sun4v_init:
 155         mov             SECONDARY_CONTEXT, %g7
 156         stxa            %g0, [%g7] ASI_MMU
 157         membar          #Sync
 158 -       ba,pt           %xcc, niagara_tlb_fixup
 159 -        nop
 160 +       ba,a,pt         %xcc, niagara_tlb_fixup
 161
 162  sun4u_continue:
 163         BRANCH_IF_ANY_CHEETAH(g1, g7, cheetah_tlb_fixup)
 164
 165 -       ba,pt   %xcc, spitfire_tlb_fixup
 166 -        nop
 167 +       ba,a,pt %xcc, spitfire_tlb_fixup
 168
 169  niagara_tlb_fixup:
 170         mov     3, %g2          /* Set TLB type to hypervisor. */
 171 @@ -639,8 +635,7 @@ niagara_patch:
 172         call    hypervisor_patch_cachetlbops
 173          nop
 174
 175 -       ba,pt   %xcc, tlb_fixup_done
 176 -        nop
 177 +       ba,a,pt %xcc, tlb_fixup_done
 178
 179  cheetah_tlb_fixup:
 180         mov     2, %g2          /* Set TLB type to cheetah+. */
 181 @@ -659,8 +654,7 @@ cheetah_tlb_fixup:
 182         call    cheetah_patch_cachetlbops
 183          nop
 184
 185 -       ba,pt   %xcc, tlb_fixup_done
 186 -        nop
 187 +       ba,a,pt %xcc, tlb_fixup_done
 188
 189  spitfire_tlb_fixup:
 190         /* Set TLB type to spitfire. */
 191 @@ -782,8 +776,7 @@ setup_trap_table:
 192         call    %o1
 193          add    %sp, (2047 + 128), %o0
 194
 195 -       ba,pt   %xcc, 2f
 196 -        nop
 197 +       ba,a,pt %xcc, 2f
 198
 199  1:     sethi   %hi(sparc64_ttable_tl0), %o0
 200         set     prom_set_trap_table_name, %g2
 201 @@ -822,8 +815,7 @@ setup_trap_table:
 202
 203         BRANCH_IF_ANY_CHEETAH(o2, o3, 1f)
 204
 205 -       ba,pt   %xcc, 2f
 206 -        nop
 207 +       ba,a,pt %xcc, 2f
 208
 209         /* Disable STICK_INT interrupts. */
 210  1:
 211 --- a/arch/sparc/kernel/misctrap.S
 212 +++ b/arch/sparc/kernel/misctrap.S
 213 @@ -18,8 +18,7 @@ __do_privact:
 214  109:   or              %g7, %lo(109b), %g7
 215         call            do_privact
 216          add            %sp, PTREGS_OFF, %o0
 217 -       ba,pt           %xcc, rtrap
 218 -        nop
 219 +       ba,a,pt         %xcc, rtrap
 220         .size           __do_privact,.-__do_privact
 221
 222         .type           do_mna,#function
 223 @@ -46,8 +45,7 @@ do_mna:
 224         mov             %l5, %o2
 225         call            mem_address_unaligned
 226          add            %sp, PTREGS_OFF, %o0
 227 -       ba,pt           %xcc, rtrap
 228 -        nop
 229 +       ba,a,pt         %xcc, rtrap
 230         .size           do_mna,.-do_mna
 231
 232         .type           do_lddfmna,#function
 233 @@ -65,8 +63,7 @@ do_lddfmna:
 234         mov             %l5, %o2
 235         call            handle_lddfmna
 236          add            %sp, PTREGS_OFF, %o0
 237 -       ba,pt           %xcc, rtrap
 238 -        nop
 239 +       ba,a,pt         %xcc, rtrap
 240         .size           do_lddfmna,.-do_lddfmna
 241
 242         .type           do_stdfmna,#function
 243 @@ -84,8 +81,7 @@ do_stdfmna:
 244         mov             %l5, %o2
 245         call            handle_stdfmna
 246          add            %sp, PTREGS_OFF, %o0
 247 -       ba,pt           %xcc, rtrap
 248 -        nop
 249 +       ba,a,pt         %xcc, rtrap
 250         .size           do_stdfmna,.-do_stdfmna
 251
 252         .type           breakpoint_trap,#function
 253 --- a/arch/sparc/kernel/spiterrs.S
 254 +++ b/arch/sparc/kernel/spiterrs.S
 255 @@ -85,8 +85,7 @@ __spitfire_cee_trap_continue:
 256         ba,pt           %xcc, etraptl1
 257          rd             %pc, %g7
 258
 259 -       ba,pt           %xcc, 2f
 260 -        nop
 261 +       ba,a,pt         %xcc, 2f
 262
 263  1:     ba,pt           %xcc, etrap_irq
 264          rd             %pc, %g7
 265 @@ -100,8 +99,7 @@ __spitfire_cee_trap_continue:
 266         mov             %l5, %o2
 267         call            spitfire_access_error
 268          add            %sp, PTREGS_OFF, %o0
 269 -       ba,pt           %xcc, rtrap
 270 -        nop
 271 +       ba,a,pt         %xcc, rtrap
 272         .size           __spitfire_access_error,.-__spitfire_access_error
 273
 274         /* This is the trap handler entry point for ECC correctable
 275 @@ -179,8 +177,7 @@ __spitfire_data_access_exception_tl1:
 276         mov             %l5, %o2
 277         call            spitfire_data_access_exception_tl1
 278          add            %sp, PTREGS_OFF, %o0
 279 -       ba,pt           %xcc, rtrap
 280 -        nop
 281 +       ba,a,pt         %xcc, rtrap
 282         .size           __spitfire_data_access_exception_tl1,.-__spitfire_data_access_exception_tl1
 283
 284         .type           __spitfire_data_access_exception,#function
 285 @@ -200,8 +197,7 @@ __spitfire_data_access_exception:
 286         mov             %l5, %o2
 287         call            spitfire_data_access_exception
 288          add            %sp, PTREGS_OFF, %o0
 289 -       ba,pt           %xcc, rtrap
 290 -        nop
 291 +       ba,a,pt         %xcc, rtrap
 292         .size           __spitfire_data_access_exception,.-__spitfire_data_access_exception
 293
 294         .type           __spitfire_insn_access_exception_tl1,#function
 295 @@ -220,8 +216,7 @@ __spitfire_insn_access_exception_tl1:
 296         mov             %l5, %o2
 297         call            spitfire_insn_access_exception_tl1
 298          add            %sp, PTREGS_OFF, %o0
 299 -       ba,pt           %xcc, rtrap
 300 -        nop
 301 +       ba,a,pt         %xcc, rtrap
 302         .size           __spitfire_insn_access_exception_tl1,.-__spitfire_insn_access_exception_tl1
 303
 304         .type           __spitfire_insn_access_exception,#function
 305 @@ -240,6 +235,5 @@ __spitfire_insn_access_exception:
 306         mov             %l5, %o2
 307         call            spitfire_insn_access_exception
 308          add            %sp, PTREGS_OFF, %o0
 309 -       ba,pt           %xcc, rtrap
 310 -        nop
 311 +       ba,a,pt         %xcc, rtrap
 312         .size           __spitfire_insn_access_exception,.-__spitfire_insn_access_exception
 313 --- a/arch/sparc/kernel/utrap.S
 314 +++ b/arch/sparc/kernel/utrap.S
 315 @@ -11,8 +11,7 @@ utrap_trap:           /* %g3=handler,%g4=level */
 316         mov             %l4, %o1
 317          call           bad_trap
 318          add            %sp, PTREGS_OFF, %o0
 319 -       ba,pt           %xcc, rtrap
 320 -        nop
 321 +       ba,a,pt         %xcc, rtrap
 322
 323  invoke_utrap:
 324         sllx            %g3, 3, %g3
 325 --- a/arch/sparc/kernel/vmlinux.lds.S
 326 +++ b/arch/sparc/kernel/vmlinux.lds.S
 327 @@ -33,6 +33,10 @@ ENTRY(_start)
 328  jiffies = jiffies_64;
 329  #endif
 330
 331 +#ifdef CONFIG_SPARC64
 332 +ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large")
 333 +#endif
 334 +
 335  SECTIONS
 336  {
 337  #ifdef CONFIG_SPARC64
 338 --- a/arch/sparc/kernel/winfixup.S
 339 +++ b/arch/sparc/kernel/winfixup.S
 340 @@ -32,8 +32,7 @@ fill_fixup:
 341          rd     %pc, %g7
 342         call    do_sparc64_fault
 343          add    %sp, PTREGS_OFF, %o0
 344 -       ba,pt   %xcc, rtrap
 345 -        nop
 346 +       ba,a,pt %xcc, rtrap
 347
 348         /* Be very careful about usage of the trap globals here.
 349          * You cannot touch %g5 as that has the fault information.