releases/4.4.157/ata-libahci-correct-setting-of-devslp-register.patch

   1 From foo@baz Mon Sep 17 12:15:09 CEST 2018
   2 From: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
   3 Date: Mon, 2 Jul 2018 12:01:53 -0700
   4 Subject: ata: libahci: Correct setting of DEVSLP register
   5
   6 From: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
   7
   8 [ Upstream commit 2dbb3ec29a6c069035857a2fc4c24e80e5dfe3cc ]
   9
  10 We have seen that on some platforms, SATA device never show any DEVSLP
  11 residency. This prevent power gating of SATA IP, which prevent system
  12 to transition to low power mode in systems with SLP_S0 aka modern
  13 standby systems. The PHY logic is off only in DEVSLP not in slumber.
  14 Reference:
  15 https://www.intel.com/content/dam/www/public/us/en/documents/datasheets
  16 /332995-skylake-i-o-platform-datasheet-volume-1.pdf
  17 Section 28.7.6.1
  18
  19 Here driver is trying to do read-modify-write the devslp register. But
  20 not resetting the bits for which this driver will modify values (DITO,
  21 MDAT and DETO). So simply reset those bits before updating to new values.
  22
  23 Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
  24 Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
  25 Reviewed-by: Hans de Goede <hdegoede@redhat.com>
  26 Signed-off-by: Tejun Heo <tj@kernel.org>
  27 Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
  28 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  29 ---
  30  drivers/ata/libahci.c |    2 ++
  31  1 file changed, 2 insertions(+)
  32
  33 --- a/drivers/ata/libahci.c
  34 +++ b/drivers/ata/libahci.c
  35 @@ -2113,6 +2113,8 @@ static void ahci_set_aggressive_devslp(s
  36                 deto = 20;
  37         }
  38
  39 +       /* Make dito, mdat, deto bits to 0s */
  40 +       devslp &= ~GENMASK_ULL(24, 2);
  41         devslp |= ((dito << PORT_DEVSLP_DITO_OFFSET) |
  42                    (mdat << PORT_DEVSLP_MDAT_OFFSET) |
  43                    (deto << PORT_DEVSLP_DETO_OFFSET) |