releases/4.4.165/clk-samsung-exynos5420-enable-peris-clocks-for-suspe.patch

   1 From 9a20053e192d010e8194999d392289c76044bb94 Mon Sep 17 00:00:00 2001
   2 From: Marek Szyprowski <m.szyprowski@samsung.com>
   3 Date: Mon, 24 Sep 2018 13:01:20 +0200
   4 Subject: clk: samsung: exynos5420: Enable PERIS clocks for suspend
   5
   6 [ Upstream commit b33228029d842269e17bba591609e83ed422005d ]
   7
   8 Ensure that clocks for core SoC modules (including TZPC0..9 modules)
   9 are enabled for suspend/resume cycle. This fixes suspend/resume
  10 support on Exynos5422-based Odroid XU3/XU4 boards.
  11
  12 Suggested-by: Joonyoung Shim <jy0922.shim@samsung.com>
  13 Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
  14 Signed-off-by: Sylwester Nawrocki <snawrocki@kernel.org>
  15 Signed-off-by: Sasha Levin <sashal@kernel.org>
  16 ---
  17  drivers/clk/samsung/clk-exynos5420.c | 1 +
  18  1 file changed, 1 insertion(+)
  19
  20 diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
  21 index 389af3c15ec4..bde71b07f15e 100644
  22 --- a/drivers/clk/samsung/clk-exynos5420.c
  23 +++ b/drivers/clk/samsung/clk-exynos5420.c
  24 @@ -273,6 +273,7 @@ static const struct samsung_clk_reg_dump exynos5420_set_clksrc[] = {
  25         { .offset = GATE_BUS_TOP,               .value = 0xffffffff, },
  26         { .offset = GATE_BUS_DISP1,             .value = 0xffffffff, },
  27         { .offset = GATE_IP_PERIC,              .value = 0xffffffff, },
  28 +       { .offset = GATE_IP_PERIS,              .value = 0xffffffff, },
  29  };
  30
  31  static int exynos5420_clk_suspend(void)
  32 --
  33 2.17.1
  34