releases/4.4.180/gpu-ipu-v3-dp-fix-csc-handling.patch

   1 From 93821c5c04f86cebb7862e203394bfb812dcd3ee Mon Sep 17 00:00:00 2001
   2 From: Lucas Stach <l.stach@pengutronix.de>
   3 Date: Fri, 12 Apr 2019 17:59:40 +0200
   4 Subject: gpu: ipu-v3: dp: fix CSC handling
   5
   6 [ Upstream commit d4fad0a426c6e26f48c9a7cdd21a7fe9c198d645 ]
   7
   8 Initialize the flow input colorspaces to unknown and reset to that value
   9 when the channel gets disabled. This avoids the state getting mixed up
  10 with a previous mode.
  11
  12 Also keep the CSC settings for the background flow intact when disabling
  13 the foreground flow.
  14
  15 Root-caused-by: Jonathan Marek <jonathan@marek.ca>
  16 Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
  17 Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
  18 Signed-off-by: Sasha Levin <sashal@kernel.org>
  19 ---
  20  drivers/gpu/ipu-v3/ipu-dp.c |   12 +++++++++---
  21  1 file changed, 9 insertions(+), 3 deletions(-)
  22
  23 --- a/drivers/gpu/ipu-v3/ipu-dp.c
  24 +++ b/drivers/gpu/ipu-v3/ipu-dp.c
  25 @@ -195,7 +195,8 @@ int ipu_dp_setup_channel(struct ipu_dp *
  26                 ipu_dp_csc_init(flow, flow->foreground.in_cs, flow->out_cs,
  27                                 DP_COM_CONF_CSC_DEF_BOTH);
  28         } else {
  29 -               if (flow->foreground.in_cs == flow->out_cs)
  30 +               if (flow->foreground.in_cs == IPUV3_COLORSPACE_UNKNOWN ||
  31 +                   flow->foreground.in_cs == flow->out_cs)
  32                         /*
  33                          * foreground identical to output, apply color
  34                          * conversion on background
  35 @@ -261,6 +262,8 @@ void ipu_dp_disable_channel(struct ipu_d
  36         struct ipu_dp_priv *priv = flow->priv;
  37         u32 reg, csc;
  38
  39 +       dp->in_cs = IPUV3_COLORSPACE_UNKNOWN;
  40 +
  41         if (!dp->foreground)
  42                 return;
  43
  44 @@ -268,8 +271,9 @@ void ipu_dp_disable_channel(struct ipu_d
  45
  46         reg = readl(flow->base + DP_COM_CONF);
  47         csc = reg & DP_COM_CONF_CSC_DEF_MASK;
  48 -       if (csc == DP_COM_CONF_CSC_DEF_FG)
  49 -               reg &= ~DP_COM_CONF_CSC_DEF_MASK;
  50 +       reg &= ~DP_COM_CONF_CSC_DEF_MASK;
  51 +       if (csc == DP_COM_CONF_CSC_DEF_BOTH || csc == DP_COM_CONF_CSC_DEF_BG)
  52 +               reg |= DP_COM_CONF_CSC_DEF_BG;
  53
  54         reg &= ~DP_COM_CONF_FG_EN;
  55         writel(reg, flow->base + DP_COM_CONF);
  56 @@ -350,6 +354,8 @@ int ipu_dp_init(struct ipu_soc *ipu, str
  57         mutex_init(&priv->mutex);
  58
  59         for (i = 0; i < IPUV3_NUM_FLOWS; i++) {
  60 +               priv->flow[i].background.in_cs = IPUV3_COLORSPACE_UNKNOWN;
  61 +               priv->flow[i].foreground.in_cs = IPUV3_COLORSPACE_UNKNOWN;
  62                 priv->flow[i].foreground.foreground = true;
  63                 priv->flow[i].base = priv->base + ipu_dp_flow_base[i];
  64                 priv->flow[i].priv = priv;