releases/4.4.180/x86-microcode-update-the-new-microcode-revision-unconditionally.patch

   1 From foo@baz Tue 14 May 2019 08:29:35 PM CEST
   2 From: Filippo Sironi <sironi@amazon.de>
   3 Date: Tue, 31 Jul 2018 17:29:30 +0200
   4 Subject: x86/microcode: Update the new microcode revision unconditionally
   5
   6 From: Filippo Sironi <sironi@amazon.de>
   7
   8 commit 8da38ebaad23fe1b0c4a205438676f6356607cfc upstream.
   9
  10 Handle the case where microcode gets loaded on the BSP's hyperthread
  11 sibling first and the boot_cpu_data's microcode revision doesn't get
  12 updated because of early exit due to the siblings sharing a microcode
  13 engine.
  14
  15 For that, simply write the updated revision on all CPUs unconditionally.
  16
  17 Signed-off-by: Filippo Sironi <sironi@amazon.de>
  18 Signed-off-by: Borislav Petkov <bp@suse.de>
  19 Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
  20 Cc: prarit@redhat.com
  21 Link: http://lkml.kernel.org/r/1533050970-14385-1-git-send-email-sironi@amazon.de
  22 [bwh: Backported to 4.4:
  23  - Keep returning 0 on success
  24  - Adjust context]
  25 Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
  26 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  27 ---
  28  arch/x86/kernel/cpu/microcode/amd.c   |   20 ++++++++++----------
  29  arch/x86/kernel/cpu/microcode/intel.c |   10 ++++------
  30  2 files changed, 14 insertions(+), 16 deletions(-)
  31
  32 --- a/arch/x86/kernel/cpu/microcode/amd.c
  33 +++ b/arch/x86/kernel/cpu/microcode/amd.c
  34 @@ -695,26 +695,26 @@ int apply_microcode_amd(int cpu)
  35                 return -1;
  36
  37         /* need to apply patch? */
  38 -       if (rev >= mc_amd->hdr.patch_id) {
  39 -               c->microcode = rev;
  40 -               uci->cpu_sig.rev = rev;
  41 -               return 0;
  42 -       }
  43 +       if (rev >= mc_amd->hdr.patch_id)
  44 +               goto out;
  45
  46         if (__apply_microcode_amd(mc_amd)) {
  47                 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
  48                         cpu, mc_amd->hdr.patch_id);
  49                 return -1;
  50         }
  51 -       pr_info("CPU%d: new patch_level=0x%08x\n", cpu,
  52 -               mc_amd->hdr.patch_id);
  53
  54 -       uci->cpu_sig.rev = mc_amd->hdr.patch_id;
  55 -       c->microcode = mc_amd->hdr.patch_id;
  56 +       rev = mc_amd->hdr.patch_id;
  57 +
  58 +       pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
  59 +
  60 +out:
  61 +       uci->cpu_sig.rev = rev;
  62 +       c->microcode     = rev;
  63
  64         /* Update boot_cpu_data's revision too, if we're on the BSP: */
  65         if (c->cpu_index == boot_cpu_data.cpu_index)
  66 -               boot_cpu_data.microcode = mc_amd->hdr.patch_id;
  67 +               boot_cpu_data.microcode = rev;
  68
  69         return 0;
  70  }
  71 --- a/arch/x86/kernel/cpu/microcode/intel.c
  72 +++ b/arch/x86/kernel/cpu/microcode/intel.c
  73 @@ -878,11 +878,8 @@ static int apply_microcode_intel(int cpu
  74          * already.
  75          */
  76         rev = intel_get_microcode_revision();
  77 -       if (rev >= mc_intel->hdr.rev) {
  78 -               uci->cpu_sig.rev = rev;
  79 -               c->microcode = rev;
  80 -               return 0;
  81 -       }
  82 +       if (rev >= mc_intel->hdr.rev)
  83 +               goto out;
  84
  85         /* write microcode via MSR 0x79 */
  86         wrmsr(MSR_IA32_UCODE_WRITE,
  87 @@ -902,8 +899,9 @@ static int apply_microcode_intel(int cpu
  88                 mc_intel->hdr.date >> 24,
  89                 (mc_intel->hdr.date >> 16) & 0xff);
  90
  91 +out:
  92         uci->cpu_sig.rev = rev;
  93 -       c->microcode = rev;
  94 +       c->microcode     = rev;
  95
  96         /* Update boot_cpu_data's revision too, if we're on the BSP: */
  97         if (c->cpu_index == boot_cpu_data.cpu_index)