releases/4.7.7/spi-sh-msiof-avoid-invalid-clock-generator-parameters.patch

   1 From c3ccf357c3d75bd2924e049b6a991f7c0c111068 Mon Sep 17 00:00:00 2001
   2 From: Geert Uytterhoeven <geert+renesas@glider.be>
   3 Date: Fri, 5 Aug 2016 10:17:52 +0200
   4 Subject: spi: sh-msiof: Avoid invalid clock generator parameters
   5
   6 From: Geert Uytterhoeven <geert+renesas@glider.be>
   7
   8 commit c3ccf357c3d75bd2924e049b6a991f7c0c111068 upstream.
   9
  10 The conversion from a look-up table to a calculation for clock generator
  11 parameters forgot to take into account that BRDV x 1/1 is valid only if
  12 BRPS is x 1/1 or x 1/2, leading to undefined behavior (e.g. arbitrary
  13 clock rates).
  14
  15 This limitation is documented for the MSIOF module in all supported
  16 SH/R-Mobile and R-Car Gen2/Gen3 ARM SoCs.
  17
  18 Tested on r8a7791/koelsch and r8a7795/salvator-x.
  19
  20 Fixes: 65d5665bb260b034 ("spi: sh-msiof: Update calculation of frequency dividing")
  21 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
  22 Signed-off-by: Mark Brown <broonie@kernel.org>
  23 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  24
  25 ---
  26  drivers/spi/spi-sh-msiof.c |    3 +++
  27  1 file changed, 3 insertions(+)
  28
  29 --- a/drivers/spi/spi-sh-msiof.c
  30 +++ b/drivers/spi/spi-sh-msiof.c
  31 @@ -263,6 +263,9 @@ static void sh_msiof_spi_set_clk_regs(st
  32
  33         for (k = 0; k < ARRAY_SIZE(sh_msiof_spi_div_table); k++) {
  34                 brps = DIV_ROUND_UP(div, sh_msiof_spi_div_table[k].div);
  35 +               /* SCR_BRDV_DIV_1 is valid only if BRPS is x 1/1 or x 1/2 */
  36 +               if (sh_msiof_spi_div_table[k].div == 1 && brps > 2)
  37 +                       continue;
  38                 if (brps <= 32) /* max of brdv is 32 */
  39                         break;
  40         }