1 From 6d80594936914e798b1b54b3bfe4bd68d8418966 Mon Sep 17 00:00:00 2001
2 From: Vladimir Murzin <vladimir.murzin@arm.com>
3 Date: Mon, 24 Apr 2017 10:40:48 +0100
4 Subject: ARM: 8670/1: V7M: Do not corrupt vector table around v7m_invalidate_l1 call
6 From: Vladimir Murzin <vladimir.murzin@arm.com>
8 commit 6d80594936914e798b1b54b3bfe4bd68d8418966 upstream.
10 We save/restore registers around v7m_invalidate_l1 to address pointed
11 by r12, which is vector table, so the first eight entries are
12 overwritten with a garbage. We already have stack setup at that stage,
13 so use it to save/restore register.
15 Fixes: 6a8146f420be ("ARM: 8609/1: V7M: Add support for the Cortex-M7 processor")
16 Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
17 Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
18 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
21 arch/arm/mm/proc-v7m.S | 4 ++--
22 1 file changed, 2 insertions(+), 2 deletions(-)
24 --- a/arch/arm/mm/proc-v7m.S
25 +++ b/arch/arm/mm/proc-v7m.S
26 @@ -147,10 +147,10 @@ __v7m_setup_cont:
28 @ Configure caches (if implemented)
30 - stmneia r12, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6
31 + stmneia sp, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6
32 blne v7m_invalidate_l1
33 teq r8, #0 @ re-evalutae condition
34 - ldmneia r12, {r0-r6, lr}
35 + ldmneia sp, {r0-r6, lr}
37 @ Configure the System Control Register to ensure 8-byte stack alignment
38 @ Note the STKALIGN bit is either RW or RAO.