releases/5.5.4/arm64-dts-marvell-clearfog-gt-8k-fix-switch-cpu-port-node.patch

   1 From 62bba54d99407aedfe9b0a02e72e23c06e2b0116 Mon Sep 17 00:00:00 2001
   2 From: Baruch Siach <baruch@tkos.co.il>
   3 Date: Thu, 19 Dec 2019 12:28:45 +0200
   4 Subject: arm64: dts: marvell: clearfog-gt-8k: fix switch cpu port node
   5
   6 From: Baruch Siach <baruch@tkos.co.il>
   7
   8 commit 62bba54d99407aedfe9b0a02e72e23c06e2b0116 upstream.
   9
  10 Explicitly set the switch cpu (upstream) port phy-mode and managed
  11 properties. This fixes the Marvell 88E6141 switch serdes configuration
  12 with the recently enabled phylink layer.
  13
  14 Fixes: a6120833272c ("arm64: dts: add support for SolidRun Clearfog GT 8K")
  15 Reported-by: Denis Odintsov <d.odintsov@traviangames.com>
  16 Signed-off-by: Baruch Siach <baruch@tkos.co.il>
  17 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
  18 Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
  19 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  20
  21 ---
  22  arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts |    2 ++
  23  1 file changed, 2 insertions(+)
  24
  25 --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
  26 +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
  27 @@ -408,6 +408,8 @@
  28                                 reg = <5>;
  29                                 label = "cpu";
  30                                 ethernet = <&cp1_eth2>;
  31 +                               phy-mode = "2500base-x";
  32 +                               managed = "in-band-status";
  33                         };
  34                 };
  35