releases/6.6.26/drm-i915-gt-do-not-generate-the-command-streamer-for-all-the-ccs.patch

   1 From ea315f98e5d6d3191b74beb0c3e5fc16081d517c Mon Sep 17 00:00:00 2001
   2 From: Andi Shyti <andi.shyti@linux.intel.com>
   3 Date: Thu, 28 Mar 2024 08:34:04 +0100
   4 Subject: drm/i915/gt: Do not generate the command streamer for all the CCS
   5
   6 From: Andi Shyti <andi.shyti@linux.intel.com>
   7
   8 commit ea315f98e5d6d3191b74beb0c3e5fc16081d517c upstream.
   9
  10 We want a fixed load CCS balancing consisting in all slices
  11 sharing one single user engine. For this reason do not create the
  12 intel_engine_cs structure with its dedicated command streamer for
  13 CCS slices beyond the first.
  14
  15 Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
  16 Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
  17 Cc: Chris Wilson <chris.p.wilson@linux.intel.com>
  18 Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
  19 Cc: Matt Roper <matthew.d.roper@intel.com>
  20 Cc: <stable@vger.kernel.org> # v6.2+
  21 Acked-by: Michal Mrozek <michal.mrozek@intel.com>
  22 Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
  23 Link: https://patchwork.freedesktop.org/patch/msgid/20240328073409.674098-3-andi.shyti@linux.intel.com
  24 (cherry picked from commit c7a5aa4e57f88470313a8277eb299b221b86e3b1)
  25 Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
  26 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  27 ---
  28  drivers/gpu/drm/i915/gt/intel_engine_cs.c |   17 +++++++++++++++++
  29  1 file changed, 17 insertions(+)
  30
  31 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
  32 +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
  33 @@ -912,6 +912,23 @@ static intel_engine_mask_t init_engine_m
  34                 info->engine_mask &= ~BIT(GSC0);
  35         }
  36
  37 +       /*
  38 +        * Do not create the command streamer for CCS slices beyond the first.
  39 +        * All the workload submitted to the first engine will be shared among
  40 +        * all the slices.
  41 +        *
  42 +        * Once the user will be allowed to customize the CCS mode, then this
  43 +        * check needs to be removed.
  44 +        */
  45 +       if (IS_DG2(gt->i915)) {
  46 +               u8 first_ccs = __ffs(CCS_MASK(gt));
  47 +
  48 +               /* Mask off all the CCS engine */
  49 +               info->engine_mask &= ~GENMASK(CCS3, CCS0);
  50 +               /* Put back in the first CCS engine */
  51 +               info->engine_mask |= BIT(_CCS(first_ccs));
  52 +       }
  53 +
  54         return info->engine_mask;
  55  }
  56