releases/6.6.26/spi-s3c64xx-define-a-magic-value.patch

   1 From e1a06b0606f0656407722c40cebc1a8eab88ab24 Mon Sep 17 00:00:00 2001
   2 From: Sasha Levin <sashal@kernel.org>
   3 Date: Fri, 16 Feb 2024 07:05:45 +0000
   4 Subject: spi: s3c64xx: define a magic value
   5
   6 From: Tudor Ambarus <tudor.ambarus@linaro.org>
   7
   8 [ Upstream commit ff8faa8a5c0f4c2da797cd22a163ee3cc8823b13 ]
   9
  10 Define a magic value, it will be used in the next patch as well.
  11
  12 Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
  13 Link: https://msgid.link/r/20240216070555.2483977-3-tudor.ambarus@linaro.org
  14 Signed-off-by: Mark Brown <broonie@kernel.org>
  15 Stable-dep-of: a3d3eab627bb ("spi: s3c64xx: Use DMA mode from fifo size")
  16 Signed-off-by: Sasha Levin <sashal@kernel.org>
  17 ---
  18  drivers/spi/spi-s3c64xx.c | 4 +++-
  19  1 file changed, 3 insertions(+), 1 deletion(-)
  20
  21 diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
  22 index 29e99410c9716..3da940e6299f0 100644
  23 --- a/drivers/spi/spi-s3c64xx.c
  24 +++ b/drivers/spi/spi-s3c64xx.c
  25 @@ -76,6 +76,7 @@
  26  #define S3C64XX_SPI_INT_RX_FIFORDY_EN          (1<<1)
  27  #define S3C64XX_SPI_INT_TX_FIFORDY_EN          (1<<0)
  28
  29 +#define S3C64XX_SPI_ST_TX_FIFO_LVL_SHIFT       6
  30  #define S3C64XX_SPI_ST_RX_OVERRUN_ERR          (1<<5)
  31  #define S3C64XX_SPI_ST_RX_UNDERRUN_ERR         (1<<4)
  32  #define S3C64XX_SPI_ST_TX_OVERRUN_ERR          (1<<3)
  33 @@ -106,7 +107,8 @@
  34  #define FIFO_LVL_MASK(i) ((i)->port_conf->fifo_lvl_mask[i->port_id])
  35  #define S3C64XX_SPI_ST_TX_DONE(v, i) (((v) & \
  36                                 (1 << (i)->port_conf->tx_st_done)) ? 1 : 0)
  37 -#define TX_FIFO_LVL(v, i) (((v) >> 6) & FIFO_LVL_MASK(i))
  38 +#define TX_FIFO_LVL(v, i) (((v) >> S3C64XX_SPI_ST_TX_FIFO_LVL_SHIFT) & \
  39 +                          FIFO_LVL_MASK(i))
  40  #define RX_FIFO_LVL(v, i) (((v) >> (i)->port_conf->rx_lvl_offset) & \
  41                                         FIFO_LVL_MASK(i))
  42  #define FIFO_DEPTH(i) ((FIFO_LVL_MASK(i) >> 1) + 1)
  43 --
  44 2.43.0
  45