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[thirdparty/binutils-gdb.git] / sim / arm / armos.c
1 /* armos.c -- ARMulator OS interface: ARM6 Instruction Emulator.
2 Copyright (C) 1994 Advanced RISC Machines Ltd.
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
17
18 /* This file contains a model of Demon, ARM Ltd's Debug Monitor,
19 including all the SWI's required to support the C library. The code in
20 it is not really for the faint-hearted (especially the abort handling
21 code), but it is a complete example. Defining NOOS will disable all the
22 fun, and definign VAILDATE will define SWI 1 to enter SVC mode, and SWI
23 0x11 to halt the emulator. */
24
25 #include "config.h"
26 #include "ansidecl.h"
27
28 #include <time.h>
29 #include <errno.h>
30 #include <string.h>
31 #include <fcntl.h>
32
33 #ifndef O_RDONLY
34 #define O_RDONLY 0
35 #endif
36 #ifndef O_WRONLY
37 #define O_WRONLY 1
38 #endif
39 #ifndef O_RDWR
40 #define O_RDWR 2
41 #endif
42 #ifndef O_BINARY
43 #define O_BINARY 0
44 #endif
45
46 #ifdef __STDC__
47 #define unlink(s) remove(s)
48 #endif
49
50 #ifdef HAVE_UNISTD_H
51 #include <unistd.h> /* For SEEK_SET etc. */
52 #endif
53
54 #ifdef __riscos
55 extern int _fisatty (FILE *);
56 #define isatty_(f) _fisatty(f)
57 #else
58 #ifdef __ZTC__
59 #include <io.h>
60 #define isatty_(f) isatty((f)->_file)
61 #else
62 #ifdef macintosh
63 #include <ioctl.h>
64 #define isatty_(f) (~ioctl ((f)->_file, FIOINTERACTIVE, NULL))
65 #else
66 #define isatty_(f) isatty (fileno (f))
67 #endif
68 #endif
69 #endif
70
71 #include "armdefs.h"
72 #include "armos.h"
73 #include "armemu.h"
74
75 #ifndef NOOS
76 #ifndef VALIDATE
77 /* #ifndef ASIM */
78 #include "armfpe.h"
79 /* #endif */
80 #endif
81 #endif
82
83 /* For RDIError_BreakpointReached. */
84 #include "dbg_rdi.h"
85
86 #include "callback.h"
87 extern host_callback *sim_callback;
88
89 extern unsigned ARMul_OSInit (ARMul_State *);
90 extern void ARMul_OSExit (ARMul_State *);
91 extern unsigned ARMul_OSHandleSWI (ARMul_State *, ARMword);
92 extern unsigned ARMul_OSException (ARMul_State *, ARMword, ARMword);
93 extern ARMword ARMul_OSLastErrorP (ARMul_State *);
94 extern ARMword ARMul_Debug (ARMul_State *, ARMword, ARMword);
95
96 #define BUFFERSIZE 4096
97 #ifndef FOPEN_MAX
98 #define FOPEN_MAX 64
99 #endif
100 #define UNIQUETEMPS 256
101
102 /* OS private Information. */
103
104 struct OSblock
105 {
106 ARMword Time0;
107 ARMword ErrorP;
108 ARMword ErrorNo;
109 FILE *FileTable[FOPEN_MAX];
110 char FileFlags[FOPEN_MAX];
111 char *tempnames[UNIQUETEMPS];
112 };
113
114 #define NOOP 0
115 #define BINARY 1
116 #define READOP 2
117 #define WRITEOP 4
118
119 #ifdef macintosh
120 #define FIXCRLF(t,c) ((t & BINARY) ? \
121 c : \
122 ((c == '\n' || c == '\r' ) ? (c ^ 7) : c) \
123 )
124 #else
125 #define FIXCRLF(t,c) c
126 #endif
127
128 static ARMword softvectorcode[] =
129 {
130 /* Basic: swi tidyexception + event; mov pc, lr;
131 ldmia r11,{r11,pc}; swi generateexception + event. */
132 0xef000090, 0xe1a0e00f, 0xe89b8800, 0xef000080, /* Reset */
133 0xef000091, 0xe1a0e00f, 0xe89b8800, 0xef000081, /* Undef */
134 0xef000092, 0xe1a0e00f, 0xe89b8800, 0xef000082, /* SWI */
135 0xef000093, 0xe1a0e00f, 0xe89b8800, 0xef000083, /* Prefetch abort */
136 0xef000094, 0xe1a0e00f, 0xe89b8800, 0xef000084, /* Data abort */
137 0xef000095, 0xe1a0e00f, 0xe89b8800, 0xef000085, /* Address exception */
138 0xef000096, 0xe1a0e00f, 0xe89b8800, 0xef000086, /* IRQ */
139 0xef000097, 0xe1a0e00f, 0xe89b8800, 0xef000087, /* FIQ */
140 0xef000098, 0xe1a0e00f, 0xe89b8800, 0xef000088, /* Error */
141 0xe1a0f00e /* Default handler */
142 };
143
144 /* Time for the Operating System to initialise itself. */
145
146 unsigned
147 ARMul_OSInit (ARMul_State * state)
148 {
149 #ifndef NOOS
150 #ifndef VALIDATE
151 ARMword instr, i, j;
152 struct OSblock *OSptr = (struct OSblock *) state->OSptr;
153
154 if (state->OSptr == NULL)
155 {
156 state->OSptr = (unsigned char *) malloc (sizeof (struct OSblock));
157 if (state->OSptr == NULL)
158 {
159 perror ("OS Memory");
160 exit (15);
161 }
162 }
163
164 OSptr = (struct OSblock *) state->OSptr;
165 OSptr->ErrorP = 0;
166 state->Reg[13] = ADDRSUPERSTACK; /* Set up a stack for the current mode... */
167 ARMul_SetReg (state, SVC32MODE, 13, ADDRSUPERSTACK);/* ...and for supervisor mode... */
168 ARMul_SetReg (state, ABORT32MODE, 13, ADDRSUPERSTACK);/* ...and for abort 32 mode... */
169 ARMul_SetReg (state, UNDEF32MODE, 13, ADDRSUPERSTACK);/* ...and for undef 32 mode... */
170 ARMul_SetReg (state, SYSTEMMODE, 13, ADDRSUPERSTACK);/* ...and for system mode. */
171 instr = 0xe59ff000 | (ADDRSOFTVECTORS - 8); /* Load pc from soft vector */
172
173 for (i = ARMul_ResetV; i <= ARMFIQV; i += 4)
174 /* Write hardware vectors. */
175 ARMul_WriteWord (state, i, instr);
176
177 SWI_vector_installed = 0;
178
179 for (i = ARMul_ResetV; i <= ARMFIQV + 4; i += 4)
180 {
181 ARMul_WriteWord (state, ADDRSOFTVECTORS + i, SOFTVECTORCODE + i * 4);
182 ARMul_WriteWord (state, ADDRSOFHANDLERS + 2 * i + 4L,
183 SOFTVECTORCODE + sizeof (softvectorcode) - 4L);
184 }
185
186 for (i = 0; i < sizeof (softvectorcode); i += 4)
187 ARMul_WriteWord (state, SOFTVECTORCODE + i, softvectorcode[i / 4]);
188
189 for (i = 0; i < FOPEN_MAX; i++)
190 OSptr->FileTable[i] = NULL;
191
192 for (i = 0; i < UNIQUETEMPS; i++)
193 OSptr->tempnames[i] = NULL;
194
195 ARMul_ConsolePrint (state, ", Demon 1.01");
196
197 /* #ifndef ASIM */
198
199 /* Install FPE. */
200 for (i = 0; i < fpesize; i += 4)
201 /* Copy the code. */
202 ARMul_WriteWord (state, FPESTART + i, fpecode[i >> 2]);
203
204 for (i = FPESTART + fpesize;; i -= 4)
205 {
206 /* Reverse the error strings. */
207 if ((j = ARMul_ReadWord (state, i)) == 0xffffffff)
208 break;
209 if (state->bigendSig && j < 0x80000000)
210 {
211 /* It's part of the string so swap it. */
212 j = ((j >> 0x18) & 0x000000ff) |
213 ((j >> 0x08) & 0x0000ff00) |
214 ((j << 0x08) & 0x00ff0000) | ((j << 0x18) & 0xff000000);
215 ARMul_WriteWord (state, i, j);
216 }
217 }
218
219 /* Copy old illegal instr vector. */
220 ARMul_WriteWord (state, FPEOLDVECT, ARMul_ReadWord (state, 4));
221 /* Install new vector. */
222 ARMul_WriteWord (state, 4, FPENEWVECT (ARMul_ReadWord (state, i - 4)));
223 ARMul_ConsolePrint (state, ", FPE");
224
225 /* #endif ASIM */
226 #endif /* VALIDATE */
227 #endif /* NOOS */
228
229 return TRUE;
230 }
231
232 void
233 ARMul_OSExit (ARMul_State * state)
234 {
235 free ((char *) state->OSptr);
236 }
237
238
239 /* Return the last Operating System Error. */
240
241 ARMword ARMul_OSLastErrorP (ARMul_State * state)
242 {
243 return ((struct OSblock *) state->OSptr)->ErrorP;
244 }
245
246 static int translate_open_mode[] =
247 {
248 O_RDONLY, /* "r" */
249 O_RDONLY + O_BINARY, /* "rb" */
250 O_RDWR, /* "r+" */
251 O_RDWR + O_BINARY, /* "r+b" */
252 O_WRONLY + O_CREAT + O_TRUNC, /* "w" */
253 O_WRONLY + O_BINARY + O_CREAT + O_TRUNC, /* "wb" */
254 O_RDWR + O_CREAT + O_TRUNC, /* "w+" */
255 O_RDWR + O_BINARY + O_CREAT + O_TRUNC, /* "w+b" */
256 O_WRONLY + O_APPEND + O_CREAT, /* "a" */
257 O_WRONLY + O_BINARY + O_APPEND + O_CREAT, /* "ab" */
258 O_RDWR + O_APPEND + O_CREAT, /* "a+" */
259 O_RDWR + O_BINARY + O_APPEND + O_CREAT /* "a+b" */
260 };
261
262 static void
263 SWIWrite0 (ARMul_State * state, ARMword addr)
264 {
265 ARMword temp;
266 struct OSblock *OSptr = (struct OSblock *) state->OSptr;
267
268 while ((temp = ARMul_SafeReadByte (state, addr++)) != 0)
269 (void) sim_callback->write_stdout (sim_callback, (char *) &temp, 1);
270
271 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
272 }
273
274 static void
275 WriteCommandLineTo (ARMul_State * state, ARMword addr)
276 {
277 ARMword temp;
278 char *cptr = state->CommandLine;
279
280 if (cptr == NULL)
281 cptr = "\0";
282 do
283 {
284 temp = (ARMword) * cptr++;
285 ARMul_SafeWriteByte (state, addr++, temp);
286 }
287 while (temp != 0);
288 }
289
290 static void
291 SWIopen (ARMul_State * state, ARMword name, ARMword SWIflags)
292 {
293 struct OSblock *OSptr = (struct OSblock *) state->OSptr;
294 char dummy[2000];
295 int flags;
296 int i;
297
298 for (i = 0; (dummy[i] = ARMul_SafeReadByte (state, name + i)); i++)
299 ;
300
301 /* Now we need to decode the Demon open mode. */
302 flags = translate_open_mode[SWIflags];
303
304 /* Filename ":tt" is special: it denotes stdin/out. */
305 if (strcmp (dummy, ":tt") == 0)
306 {
307 if (flags == O_RDONLY) /* opening tty "r" */
308 state->Reg[0] = 0; /* stdin */
309 else
310 state->Reg[0] = 1; /* stdout */
311 }
312 else
313 {
314 state->Reg[0] = sim_callback->open (sim_callback, dummy, flags);
315 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
316 }
317 }
318
319 static void
320 SWIread (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
321 {
322 struct OSblock *OSptr = (struct OSblock *) state->OSptr;
323 int res;
324 int i;
325 char *local = malloc (len);
326
327 if (local == NULL)
328 {
329 sim_callback->printf_filtered
330 (sim_callback,
331 "sim: Unable to read 0x%ulx bytes - out of memory\n",
332 len);
333 return;
334 }
335
336 res = sim_callback->read (sim_callback, f, local, len);
337 if (res > 0)
338 for (i = 0; i < res; i++)
339 ARMul_SafeWriteByte (state, ptr + i, local[i]);
340
341 free (local);
342 state->Reg[0] = res == -1 ? -1 : len - res;
343 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
344 }
345
346 static void
347 SWIwrite (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
348 {
349 struct OSblock *OSptr = (struct OSblock *) state->OSptr;
350 int res;
351 ARMword i;
352 char *local = malloc (len);
353
354 if (local == NULL)
355 {
356 sim_callback->printf_filtered
357 (sim_callback,
358 "sim: Unable to write 0x%lx bytes - out of memory\n",
359 (long) len);
360 return;
361 }
362
363 for (i = 0; i < len; i++)
364 local[i] = ARMul_SafeReadByte (state, ptr + i);
365
366 res = sim_callback->write (sim_callback, f, local, len);
367 state->Reg[0] = res == -1 ? -1 : len - res;
368 free (local);
369
370 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
371 }
372
373 static void
374 SWIflen (ARMul_State * state, ARMword fh)
375 {
376 struct OSblock *OSptr = (struct OSblock *) state->OSptr;
377 ARMword addr;
378
379 if (fh == 0 || fh > FOPEN_MAX)
380 {
381 OSptr->ErrorNo = EBADF;
382 state->Reg[0] = -1L;
383 return;
384 }
385
386 addr = sim_callback->lseek (sim_callback, fh, 0, SEEK_CUR);
387
388 state->Reg[0] = sim_callback->lseek (sim_callback, fh, 0L, SEEK_END);
389 (void) sim_callback->lseek (sim_callback, fh, addr, SEEK_SET);
390
391 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
392 }
393
394 /* The emulator calls this routine when a SWI instruction is encuntered.
395 The parameter passed is the SWI number (lower 24 bits of the instruction). */
396
397 unsigned
398 ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
399 {
400 ARMword addr;
401 ARMword temp;
402 ARMword saved_number = 0;
403 struct OSblock * OSptr = (struct OSblock *) state->OSptr;
404
405 /* Intel do not want DEMON SWI support. */
406 if (state->is_XScale)
407 switch (number)
408 {
409 case SWI_Read:
410 case SWI_Write:
411 case SWI_Open:
412 case SWI_Clock:
413 case SWI_Time:
414 case SWI_Close:
415 case SWI_Flen:
416 case SWI_Exit:
417 case SWI_Seek:
418 case SWI_WriteC:
419 case SWI_Write0:
420 case SWI_GetErrno:
421 case SWI_GetEnv:
422 saved_number = number;
423 number = -1;
424 default:
425 break;
426 }
427
428 switch (number)
429 {
430 case SWI_Read:
431 SWIread (state, state->Reg[0], state->Reg[1], state->Reg[2]);
432 break;
433
434 case SWI_Write:
435 SWIwrite (state, state->Reg[0], state->Reg[1], state->Reg[2]);
436 break;
437
438 case SWI_Open:
439 SWIopen (state, state->Reg[0], state->Reg[1]);
440 break;
441
442 case SWI_Clock:
443 /* Return number of centi-seconds. */
444 state->Reg[0] =
445 #ifdef CLOCKS_PER_SEC
446 (CLOCKS_PER_SEC >= 100)
447 ? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
448 : (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
449 #else
450 /* Presume unix... clock() returns microseconds. */
451 (ARMword) (clock () / 10000);
452 #endif
453 OSptr->ErrorNo = errno;
454 break;
455
456 case SWI_Time:
457 state->Reg[0] = (ARMword) sim_callback->time (sim_callback, NULL);
458 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
459 break;
460
461 case SWI_Close:
462 state->Reg[0] = sim_callback->close (sim_callback, state->Reg[0]);
463 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
464 break;
465
466 case SWI_Flen:
467 SWIflen (state, state->Reg[0]);
468 break;
469
470 case SWI_Exit:
471 state->Emulate = FALSE;
472 break;
473
474 case SWI_Seek:
475 /* We must return non-zero for failure. */
476 state->Reg[0] = -1 >= sim_callback->lseek (sim_callback, state->Reg[0], state->Reg[1], SEEK_SET);
477 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
478 break;
479
480 case SWI_WriteC:
481 {
482 char tmp = state->Reg[0];
483 (void) sim_callback->write_stdout (sim_callback, &tmp, 1);
484 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
485 }
486 break;
487
488 case SWI_Write0:
489 SWIWrite0 (state, state->Reg[0]);
490 break;
491
492 case SWI_GetErrno:
493 state->Reg[0] = OSptr->ErrorNo;
494 break;
495
496 case SWI_GetEnv:
497 state->Reg[0] = ADDRCMDLINE;
498 if (state->MemSize)
499 state->Reg[1] = state->MemSize;
500 else
501 state->Reg[1] = ADDRUSERSTACK;
502
503 WriteCommandLineTo (state, state->Reg[0]);
504 break;
505
506 case SWI_Breakpoint:
507 state->EndCondition = RDIError_BreakpointReached;
508 state->Emulate = FALSE;
509 break;
510
511 /* Handle Angel SWIs as well as Demon ones. */
512 case AngelSWI_ARM:
513 case AngelSWI_Thumb:
514 /* R1 is almost always a parameter block. */
515 addr = state->Reg[1];
516 /* R0 is a reason code. */
517 switch (state->Reg[0])
518 {
519 /* Unimplemented reason codes. */
520 case AngelSWI_Reason_ReadC:
521 case AngelSWI_Reason_IsTTY:
522 case AngelSWI_Reason_TmpNam:
523 case AngelSWI_Reason_Remove:
524 case AngelSWI_Reason_Rename:
525 case AngelSWI_Reason_System:
526 case AngelSWI_Reason_EnterSVC:
527 default:
528 state->Emulate = FALSE;
529 return FALSE;
530
531 case AngelSWI_Reason_Clock:
532 /* Return number of centi-seconds. */
533 state->Reg[0] =
534 #ifdef CLOCKS_PER_SEC
535 (CLOCKS_PER_SEC >= 100)
536 ? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
537 : (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
538 #else
539 /* Presume unix... clock() returns microseconds. */
540 (ARMword) (clock () / 10000);
541 #endif
542 OSptr->ErrorNo = errno;
543 break;
544
545 case AngelSWI_Reason_Time:
546 state->Reg[0] = (ARMword) sim_callback->time (sim_callback, NULL);
547 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
548 break;
549
550 case AngelSWI_Reason_WriteC:
551 {
552 char tmp = ARMul_SafeReadByte (state, addr);
553 (void) sim_callback->write_stdout (sim_callback, &tmp, 1);
554 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
555 }
556 /* Fall thgrough. */
557
558 case AngelSWI_Reason_Write0:
559 SWIWrite0 (state, addr);
560 break;
561
562 case AngelSWI_Reason_Close:
563 state->Reg[0] = sim_callback->close (sim_callback, ARMul_ReadWord (state, addr));
564 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
565 break;
566
567 case AngelSWI_Reason_Seek:
568 state->Reg[0] = -1 >= sim_callback->lseek (sim_callback, ARMul_ReadWord (state, addr),
569 ARMul_ReadWord (state, addr + 4),
570 SEEK_SET);
571 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
572 break;
573
574 case AngelSWI_Reason_FLen:
575 SWIflen (state, ARMul_ReadWord (state, addr));
576 break;
577
578 case AngelSWI_Reason_GetCmdLine:
579 WriteCommandLineTo (state, ARMul_ReadWord (state, addr));
580 break;
581
582 case AngelSWI_Reason_HeapInfo:
583 /* R1 is a pointer to a pointer. */
584 addr = ARMul_ReadWord (state, addr);
585
586 /* Pick up the right memory limit. */
587 if (state->MemSize)
588 temp = state->MemSize;
589 else
590 temp = ADDRUSERSTACK;
591
592 ARMul_WriteWord (state, addr, 0); /* Heap base. */
593 ARMul_WriteWord (state, addr + 4, temp); /* Heap limit. */
594 ARMul_WriteWord (state, addr + 8, temp); /* Stack base. */
595 ARMul_WriteWord (state, addr + 12, temp); /* Stack limit. */
596 break;
597
598 case AngelSWI_Reason_ReportException:
599 if (state->Reg[1] == ADP_Stopped_ApplicationExit)
600 state->Reg[0] = 0;
601 else
602 state->Reg[0] = -1;
603 state->Emulate = FALSE;
604 break;
605
606 case ADP_Stopped_ApplicationExit:
607 state->Reg[0] = 0;
608 state->Emulate = FALSE;
609 break;
610
611 case ADP_Stopped_RunTimeError:
612 state->Reg[0] = -1;
613 state->Emulate = FALSE;
614 break;
615
616 case AngelSWI_Reason_Errno:
617 state->Reg[0] = OSptr->ErrorNo;
618 break;
619
620 case AngelSWI_Reason_Open:
621 SWIopen (state,
622 ARMul_ReadWord (state, addr),
623 ARMul_ReadWord (state, addr + 4));
624 break;
625
626 case AngelSWI_Reason_Read:
627 SWIread (state,
628 ARMul_ReadWord (state, addr),
629 ARMul_ReadWord (state, addr + 4),
630 ARMul_ReadWord (state, addr + 8));
631 break;
632
633 case AngelSWI_Reason_Write:
634 SWIwrite (state,
635 ARMul_ReadWord (state, addr),
636 ARMul_ReadWord (state, addr + 4),
637 ARMul_ReadWord (state, addr + 8));
638 break;
639 }
640
641 case 0x90:
642 case 0x91:
643 case 0x92:
644 /* These are used by the FPE code. */
645 break;
646
647 case 0x180001: /* RedBoot's Syscall SWI in ARM mode. */
648 switch (state->Reg[0])
649 {
650 /* These numbers are defined in libgloss/syscall.h
651 but the simulator should not be dependend upon
652 libgloss being installed. */
653 case 1: /* Exit. */
654 state->Emulate = FALSE;
655 return TRUE;
656
657 case 2: /* Open. */
658 SWIopen (state, state->Reg[1], state->Reg[2]);
659 return TRUE;
660
661 case 3: /* Close. */
662 state->Reg[0] = sim_callback->close (sim_callback, state->Reg[1]);
663 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
664 return TRUE;
665
666 case 4: /* Read. */
667 SWIread (state, state->Reg[1], state->Reg[2], state->Reg[3]);
668 return TRUE;
669
670 case 5: /* Write. */
671 SWIwrite (state, state->Reg[1], state->Reg[2], state->Reg[3]);
672 return TRUE;
673
674 case 6: /* Lseek. */
675 state->Reg[0] = sim_callback->lseek (sim_callback,
676 state->Reg[1],
677 state->Reg[2],
678 state->Reg[3]);
679 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
680 return TRUE;
681
682 case 17: /* Utime. */
683 state->Reg[0] = (ARMword) sim_callback->time (sim_callback,
684 (long *) state->Reg[1]);
685 OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
686 return TRUE;
687
688 case 7: /* Unlink. */
689 case 8: /* Getpid. */
690 case 9: /* Kill. */
691 case 10: /* Fstat. */
692 case 11: /* Sbrk. */
693 case 12: /* Argvlen. */
694 case 13: /* Argv. */
695 case 14: /* ChDir. */
696 case 15: /* Stat. */
697 case 16: /* Chmod. */
698 case 18: /* Time. */
699 sim_callback->printf_filtered
700 (sim_callback,
701 "sim: unhandled RedBoot syscall '%d' encountered - ignoring\n",
702 state->Reg[0]);
703 return FALSE;
704
705 default:
706 sim_callback->printf_filtered
707 (sim_callback,
708 "sim: unknown RedBoot syscall '%d' encountered - ignoring\n",
709 state->Reg[0]);
710 return FALSE;
711 }
712 return TRUE;
713
714 default:
715 /* If there is a SWI vector installed use it. */
716 if (state->is_XScale && saved_number != -1)
717 number = saved_number;
718
719 if (SWI_vector_installed && number != SWI_Breakpoint)
720 {
721 ARMword cpsr;
722 ARMword i_size;
723
724 cpsr = ARMul_GetCPSR (state);
725 i_size = INSN_SIZE;
726
727 ARMul_SetSPSR (state, SVC32MODE, cpsr);
728
729 cpsr &= ~0xbf;
730 cpsr |= SVC32MODE | 0x80;
731 ARMul_SetCPSR (state, cpsr);
732
733 state->RegBank[SVCBANK][14] = state->Reg[14] = state->Reg[15] - i_size;
734 state->NextInstr = RESUME;
735 state->Reg[15] = state->pc = ARMSWIV;
736 FLUSHPIPE;
737 }
738 else
739 {
740 sim_callback->printf_filtered
741 (sim_callback,
742 "sim: unknown SWI encountered - %x - ignoring\n",
743 number);
744 return FALSE;
745 }
746 }
747
748 return TRUE;
749 }
750
751 #ifndef NOOS
752 #ifndef ASIM
753
754 /* The emulator calls this routine when an Exception occurs. The second
755 parameter is the address of the relevant exception vector. Returning
756 FALSE from this routine causes the trap to be taken, TRUE causes it to
757 be ignored (so set state->Emulate to FALSE!). */
758
759 unsigned
760 ARMul_OSException (ARMul_State * state ATTRIBUTE_UNUSED,
761 ARMword vector ATTRIBUTE_UNUSED,
762 ARMword pc ATTRIBUTE_UNUSED)
763 {
764 return FALSE;
765 }
766
767 #endif
768 #endif /* NOOS */
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