1 /* This file is part of the program psim.
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 #error "N must be #defined"
28 /* NOTE: see end of file for #undef of these macros */
29 #define unsigned_N XCONCAT2(unsigned_,N)
30 #define T2H_N XCONCAT2(T2H_,N)
31 #define H2T_N XCONCAT2(H2T_,N)
33 #define sim_core_read_aligned_N XCONCAT2(sim_core_read_aligned_,N)
34 #define sim_core_write_aligned_N XCONCAT2(sim_core_write_aligned_,N)
35 #define sim_core_read_unaligned_N XCONCAT2(sim_core_read_unaligned_,N)
36 #define sim_core_write_unaligned_N XCONCAT2(sim_core_write_unaligned_,N)
37 #define sim_core_trace_N XCONCAT2(sim_core_trace_,N)
40 /* TAGS: sim_core_trace_1 sim_core_trace_2 */
41 /* TAGS: sim_core_trace_4 sim_core_trace_8 */
42 /* TAGS: sim_core_trace_6 sim_core_trace_word */
45 sim_core_trace_N (sim_cpu
*cpu
,
53 trace_printf (CPU_STATE (cpu
), cpu
,
54 "sim-n-core.h:%d: %s-%d %s:0x%08lx -> 0x%08lx%08lx%08lx%08lx\n",
56 transfer
, sizeof (unsigned_N
),
57 sim_core_map_to_str (map
),
59 (unsigned long) V4_16 (val
, 0),
60 (unsigned long) V4_16 (val
, 1),
61 (unsigned long) V4_16 (val
, 2),
62 (unsigned long) V4_16 (val
, 3));
65 trace_printf (CPU_STATE (cpu
), cpu
,
66 "sim-n-core.h:%d: %s-%d %s:0x%08lx -> 0x%08lx%08lx\n",
68 transfer
, sizeof (unsigned_N
),
69 sim_core_map_to_str (map
),
71 (unsigned long) V4_8 (val
, 0),
72 (unsigned long) V4_8 (val
, 1));
75 trace_printf (CPU_STATE (cpu
), cpu
,
76 "sim-n-core.h:%d: %s-%d %s:0x%08lx -> 0x%0*lx\n",
78 transfer
, sizeof (unsigned_N
),
79 sim_core_map_to_str (map
),
81 sizeof (unsigned_N
) * 2,
87 /* TAGS: sim_core_read_aligned_1 sim_core_read_aligned_2 */
88 /* TAGS: sim_core_read_aligned_4 sim_core_read_aligned_8 */
89 /* TAGS: sim_core_read_aligned_16 sim_core_read_aligned_word */
91 INLINE_SIM_CORE(unsigned_N
)
92 sim_core_read_aligned_N(sim_cpu
*cpu
,
97 sim_cpu_core
*cpu_core
= CPU_CORE (cpu
);
98 sim_core_common
*core
= &cpu_core
->common
;
100 sim_core_mapping
*mapping
;
102 #if WITH_XOR_ENDIAN != 0
104 addr
= xaddr
^ cpu_core
->xor[(sizeof(unsigned_N
) - 1) % WITH_XOR_ENDIAN
];
108 mapping
= sim_core_find_mapping (core
, map
,
112 1 /*abort*/, cpu
, cia
);
114 if (WITH_CALLBACK_MEMORY
&& mapping
->device
!= NULL
) {
116 if (device_io_read_buffer (mapping
->device
,
120 sizeof (unsigned_N
)) != sizeof (unsigned_N
))
121 device_error (mapping
->device
, "internal error - %s - io_read_buffer should not fail",
122 XSTRING (sim_core_read_aligned_N
));
127 val
= T2H_N (*(unsigned_N
*) sim_core_translate (mapping
, addr
));
128 PROFILE_COUNT_CORE (cpu
, addr
, sizeof (unsigned_N
), map
);
129 if (TRACE_P (cpu
, TRACE_CORE_IDX
))
130 sim_core_trace_N (cpu
, __LINE__
, "read", map
, addr
, val
);
134 /* TAGS: sim_core_read_unaligned_1 sim_core_read_unaligned_2 */
135 /* TAGS: sim_core_read_unaligned_4 sim_core_read_unaligned_8 */
136 /* TAGS: sim_core_read_unaligned_16 sim_core_read_unaligned_word */
138 INLINE_SIM_CORE(unsigned_N
)
139 sim_core_read_unaligned_N(sim_cpu
*cpu
,
144 int alignment
= sizeof (unsigned_N
) - 1;
145 /* if hardwired to forced alignment just do it */
146 if (WITH_ALIGNMENT
== FORCED_ALIGNMENT
)
147 return sim_core_read_aligned_N (cpu
, cia
, map
, addr
& ~alignment
);
148 else if ((addr
& alignment
) == 0)
149 return sim_core_read_aligned_N (cpu
, cia
, map
, addr
);
151 switch (CURRENT_ALIGNMENT
)
153 case STRICT_ALIGNMENT
:
154 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
,
155 sizeof (unsigned_N
), addr
,
156 read_transfer
, sim_core_unaligned_signal
);
157 case NONSTRICT_ALIGNMENT
:
160 if (sim_core_xor_read_buffer (CPU_STATE (cpu
), cpu
, map
, &val
, addr
,
162 != sizeof(unsigned_N
))
163 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
,
164 sizeof (unsigned_N
), addr
,
165 read_transfer
, sim_core_unaligned_signal
);
167 PROFILE_COUNT_CORE (cpu
, addr
, sizeof (unsigned_N
), map
);
170 case FORCED_ALIGNMENT
:
171 return sim_core_read_aligned_N (cpu
, cia
, map
, addr
& ~alignment
);
172 case MIXED_ALIGNMENT
:
173 sim_engine_abort (CPU_STATE (cpu
), cpu
, cia
,
174 "internal error - %s - mixed alignment",
175 XSTRING (sim_core_read_unaligned_N
));
177 sim_engine_abort (CPU_STATE (cpu
), cpu
, cia
,
178 "internal error - %s - bad switch",
179 XSTRING (sim_core_read_unaligned_N
));
183 /* TAGS: sim_core_write_aligned_1 sim_core_write_aligned_2 */
184 /* TAGS: sim_core_write_aligned_4 sim_core_write_aligned_8 */
185 /* TAGS: sim_core_write_aligned_16 sim_core_write_aligned_word */
187 INLINE_SIM_CORE(void)
188 sim_core_write_aligned_N(sim_cpu
*cpu
,
194 sim_cpu_core
*cpu_core
= CPU_CORE (cpu
);
195 sim_core_common
*core
= &cpu_core
->common
;
196 sim_core_mapping
*mapping
;
198 #if WITH_XOR_ENDIAN != 0
200 addr
= xaddr
^ cpu_core
->xor[(sizeof(unsigned_N
) - 1) % WITH_XOR_ENDIAN
];
204 mapping
= sim_core_find_mapping(core
, map
,
208 1 /*abort*/, cpu
, cia
);
210 if (WITH_CALLBACK_MEMORY
&& mapping
->device
!= NULL
) {
211 unsigned_N data
= H2T_N (val
);
212 if (device_io_write_buffer (mapping
->device
,
216 sizeof (unsigned_N
), /* nr_bytes */
218 cia
) != sizeof (unsigned_N
))
219 device_error (mapping
->device
, "internal error - %s - io_write_buffer should not fail",
220 XSTRING (sim_core_write_aligned_N
));
224 *(unsigned_N
*) sim_core_translate (mapping
, addr
) = H2T_N (val
);
225 PROFILE_COUNT_CORE (cpu
, addr
, sizeof (unsigned_N
), map
);
226 if (TRACE_P (cpu
, TRACE_CORE_IDX
))
227 sim_core_trace_N (cpu
, __LINE__
, "write", map
, addr
, val
);
230 /* TAGS: sim_core_write_unaligned_1 sim_core_write_unaligned_2 */
231 /* TAGS: sim_core_write_unaligned_4 sim_core_write_unaligned_8 */
232 /* TAGS: sim_core_write_unaligned_16 sim_core_write_unaligned_word */
234 INLINE_SIM_CORE(void)
235 sim_core_write_unaligned_N(sim_cpu
*cpu
,
241 int alignment
= sizeof (unsigned_N
) - 1;
242 /* if hardwired to forced alignment just do it */
243 if (WITH_ALIGNMENT
== FORCED_ALIGNMENT
)
244 sim_core_write_aligned_N (cpu
, cia
, map
, addr
& ~alignment
, val
);
245 else if ((addr
& alignment
) == 0)
246 sim_core_write_aligned_N (cpu
, cia
, map
, addr
, val
);
248 switch (CURRENT_ALIGNMENT
)
250 case STRICT_ALIGNMENT
:
251 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
,
252 sizeof (unsigned_N
), addr
,
253 write_transfer
, sim_core_unaligned_signal
);
255 case NONSTRICT_ALIGNMENT
:
257 unsigned_N val
= H2T_N (val
);
258 if (sim_core_xor_write_buffer (CPU_STATE (cpu
), cpu
, map
, &val
, addr
,
260 != sizeof(unsigned_N
))
261 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
,
262 sizeof (unsigned_N
), addr
,
263 write_transfer
, sim_core_unaligned_signal
);
264 PROFILE_COUNT_CORE (cpu
, addr
, sizeof (unsigned_N
), map
);
267 case FORCED_ALIGNMENT
:
268 sim_core_write_aligned_N (cpu
, cia
, map
, addr
& ~alignment
, val
);
270 case MIXED_ALIGNMENT
:
271 sim_engine_abort (CPU_STATE (cpu
), cpu
, cia
,
272 "internal error - %s - mixed alignment",
273 XSTRING (sim_core_write_unaligned_N
));
276 sim_engine_abort (CPU_STATE (cpu
), cpu
, cia
,
277 "internal error - %s - bad switch",
278 XSTRING (sim_core_write_unaligned_N
));
284 /* NOTE: see start of file for #define of these macros */
288 #undef sim_core_read_aligned_N
289 #undef sim_core_write_aligned_N
290 #undef sim_core_read_unaligned_N
291 #undef sim_core_write_unaligned_N
292 #undef sim_core_trace_N