1 # Makefile template for Configure for the CRIS simulator, based on a mix
2 # of the ones for m32r and i960.
4 # Copyright (C) 2004-2021 Free Software Foundation, Inc.
5 # Contributed by Axis Communications.
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 3 of the License, or
10 # (at your option) any later version.
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
17 # You should have received a copy of the GNU General Public License
18 # along with this program. If not, see <http://www.gnu.org/licenses/>.
20 ## COMMON_PRE_CONFIG_FRAG
22 CRISV10F_OBJS
= crisv10f.o cpuv10.o decodev10.o modelv10.o mloopv10f.o
23 CRISV32F_OBJS
= crisv32f.o cpuv32.o decodev32.o modelv32.o mloopv32f.o
26 $(SIM_NEW_COMMON_OBJS
) \
27 cgen-utils.o cgen-trace.o cgen-scache.o \
34 # Extra headers included by sim-main.h.
35 # FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS.
37 $(CGEN_INCLUDE_DEPS
) $(srccom
)/cgen-ops.h \
38 arch.h cpuall.h cris-sim.h engv10.h engv32.h
40 SIM_EXTRA_CLEAN
= cris-clean
42 # Code doesn't build cleanly yet.
45 ## COMMON_POST_CONFIG_FRAG
49 # rvdummy is just used for testing. It does nothing if
50 # --enable-sim-hardware isn't active.
54 check: rvdummy
$(EXEEXT
)
56 rvdummy
$(EXEEXT
): rvdummy.o
$(EXTRA_LIBDEPS
)
57 $(CC
) $(ALL_CFLAGS
) -o rvdummy
$(EXEEXT
) rvdummy.o
$(EXTRA_LIBS
)
59 rvdummy.o
: rvdummy.c
$(remote_sim_h
) $(callback_h
)
63 CRISV10F_INCLUDE_DEPS
= \
64 $(CGEN_MAIN_CPU_DEPS
) \
65 cpuv10.h decodev10.h engv10.h
67 # FIXME: What is mono and what does "Use of `mono' is wip" mean (other
68 # than the apparent; some "mono" feature is work in progress)?
69 mloopv10f.c engv10.h
: stamp-v10fmloop
70 stamp-v10fmloop
: $(srcdir)/..
/common
/genmloop.sh mloop.in Makefile
71 $(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
72 -mono
-no-fast
-pbb
-switch semcrisv10f-switch.c \
73 -cpu crisv10f
-infile
$(srcdir)/mloop.in
74 $(SHELL
) $(srcroot
)/move-if-change eng.hin engv10.h
75 $(SHELL
) $(srcroot
)/move-if-change mloop.cin mloopv10f.c
80 CRISV32F_INCLUDE_DEPS
= \
81 $(CGEN_MAIN_CPU_DEPS
) \
82 cpuv32.h decodev32.h engv32.h
84 # FIXME: What is mono and what does "Use of `mono' is wip" mean (other
85 # than the apparent; some "mono" feature is work in progress)?
86 mloopv32f.c engv32.h
: stamp-v32fmloop
87 # We depend on stamp-v10fmloop to get serialization to avoid
88 # racing with it for the same temporary file-names when "make -j".
89 stamp-v32fmloop
: stamp-v10fmloop
$(srcdir)/..
/common
/genmloop.sh mloop.in Makefile
90 $(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
91 -mono
-no-fast
-pbb
-switch semcrisv32f-switch.c \
92 -cpu crisv32f
-infile
$(srcdir)/mloop.in
93 $(SHELL
) $(srcroot
)/move-if-change eng.hin engv32.h
94 $(SHELL
) $(srcroot
)/move-if-change mloop.cin mloopv32f.c
99 rm -f mloopv
$${v}f.c engv
$${v}.h stamp-v
$${v}fmloop
; \
100 rm -f stamp-v
$${v}fcpu
; \
105 # Useful when making CGEN-generated files manually, without --enable-cgen-maint.
106 stamps
: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu
108 stamp-arch
: $(CGEN_READ_SCM
) $(CGEN_ARCH_SCM
) $(CPU_DIR
)/cris.cpu Makefile
109 $(MAKE
) cgen-arch
$(CGEN_FLAGS_TO_PASS
) mach
=crisv10
,crisv32 \
110 archfile
=$(CPU_DIR
)/cris.cpu \
111 FLAGS
="with-scache with-profile=fn"
113 arch.h arch.c cpuall.h
: $(CGEN_MAINT
) stamp-arch
115 # The sed-hack is supposed to be temporary, until we get CGEN to emit it.
116 stamp-v10fcpu
: $(CGEN_READ_SCM
) $(CGEN_CPU_SCM
) $(CGEN_DECODE_SCM
) $(CPU_DIR
)/cris.cpu Makefile
117 $(MAKE
) cgen-cpu-decode
$(CGEN_FLAGS_TO_PASS
) \
118 archfile
=$(CPU_DIR
)/cris.cpu \
119 cpu
=crisv10f mach
=crisv10 SUFFIX
=v10 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"
120 $(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/semv10-switch.c
$(srcdir)/semcrisv10f-switch.c
121 sed
-ne
'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev10.c
> decodev10.c.tmp
122 mv decodev10.c.tmp
$(srcdir)/decodev10.c
124 cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h
: $(CGEN_MAINT
) stamp-v10fcpu
126 stamp-v32fcpu
: $(CGEN_READ_SCM
) $(CGEN_CPU_SCM
) $(CGEN_DECODE_SCM
) $(CPU_DIR
)/cris.cpu Makefile
127 $(MAKE
) cgen-cpu-decode
$(CGEN_FLAGS_TO_PASS
) \
128 archfile
=$(CPU_DIR
)/cris.cpu \
129 cpu
=crisv32f mach
=crisv32 SUFFIX
=v32 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"
130 $(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/semv32-switch.c
$(srcdir)/semcrisv32f-switch.c
131 sed
-ne
'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev32.c
> decodev32.c.tmp
132 mv decodev32.c.tmp
$(srcdir)/decodev32.c
134 cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h
: $(CGEN_MAINT
) stamp-v32fcpu