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1 /* Simulator model support for crisv10f.
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
4
5 Copyright 1996-2005 Free Software Foundation, Inc.
6
7 This file is part of the GNU simulators.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23 */
24
25 #define WANT_CPU crisv10f
26 #define WANT_CPU_CRISV10F
27
28 #include "sim-main.h"
29
30 /* The profiling data is recorded here, but is accessed via the profiling
31 mechanism. After all, this is information for profiling. */
32
33 #if WITH_PROFILE_MODEL_P
34
35 /* Model handlers for each insn. */
36
37 static int
38 model_crisv10_nop (SIM_CPU *current_cpu, void *sem_arg)
39 {
40 #define FLD(f) abuf->fields.fmt_empty.f
41 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
42 const IDESC * UNUSED idesc = abuf->idesc;
43 int cycles = 0;
44 {
45 int referenced = 0;
46 int UNUSED insn_referenced = abuf->written;
47 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
48 }
49 return cycles;
50 #undef FLD
51 }
52
53 static int
54 model_crisv10_move_b_r (SIM_CPU *current_cpu, void *sem_arg)
55 {
56 #define FLD(f) abuf->fields.sfmt_add_b_r.f
57 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
58 const IDESC * UNUSED idesc = abuf->idesc;
59 int cycles = 0;
60 {
61 int referenced = 0;
62 int UNUSED insn_referenced = abuf->written;
63 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
64 }
65 return cycles;
66 #undef FLD
67 }
68
69 static int
70 model_crisv10_move_w_r (SIM_CPU *current_cpu, void *sem_arg)
71 {
72 #define FLD(f) abuf->fields.sfmt_add_b_r.f
73 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
74 const IDESC * UNUSED idesc = abuf->idesc;
75 int cycles = 0;
76 {
77 int referenced = 0;
78 int UNUSED insn_referenced = abuf->written;
79 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
80 }
81 return cycles;
82 #undef FLD
83 }
84
85 static int
86 model_crisv10_move_d_r (SIM_CPU *current_cpu, void *sem_arg)
87 {
88 #define FLD(f) abuf->fields.sfmt_add_b_r.f
89 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
90 const IDESC * UNUSED idesc = abuf->idesc;
91 int cycles = 0;
92 {
93 int referenced = 0;
94 int UNUSED insn_referenced = abuf->written;
95 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
96 }
97 return cycles;
98 #undef FLD
99 }
100
101 static int
102 model_crisv10_movepcr (SIM_CPU *current_cpu, void *sem_arg)
103 {
104 #define FLD(f) abuf->fields.sfmt_moveq.f
105 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
106 const IDESC * UNUSED idesc = abuf->idesc;
107 int cycles = 0;
108 {
109 int referenced = 0;
110 int UNUSED insn_referenced = abuf->written;
111 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
112 }
113 return cycles;
114 #undef FLD
115 }
116
117 static int
118 model_crisv10_moveq (SIM_CPU *current_cpu, void *sem_arg)
119 {
120 #define FLD(f) abuf->fields.sfmt_moveq.f
121 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
122 const IDESC * UNUSED idesc = abuf->idesc;
123 int cycles = 0;
124 {
125 int referenced = 0;
126 int UNUSED insn_referenced = abuf->written;
127 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
128 }
129 return cycles;
130 #undef FLD
131 }
132
133 static int
134 model_crisv10_movs_b_r (SIM_CPU *current_cpu, void *sem_arg)
135 {
136 #define FLD(f) abuf->fields.sfmt_muls_b.f
137 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
138 const IDESC * UNUSED idesc = abuf->idesc;
139 int cycles = 0;
140 {
141 int referenced = 0;
142 int UNUSED insn_referenced = abuf->written;
143 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
144 }
145 return cycles;
146 #undef FLD
147 }
148
149 static int
150 model_crisv10_movs_w_r (SIM_CPU *current_cpu, void *sem_arg)
151 {
152 #define FLD(f) abuf->fields.sfmt_muls_b.f
153 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
154 const IDESC * UNUSED idesc = abuf->idesc;
155 int cycles = 0;
156 {
157 int referenced = 0;
158 int UNUSED insn_referenced = abuf->written;
159 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
160 }
161 return cycles;
162 #undef FLD
163 }
164
165 static int
166 model_crisv10_movu_b_r (SIM_CPU *current_cpu, void *sem_arg)
167 {
168 #define FLD(f) abuf->fields.sfmt_muls_b.f
169 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
170 const IDESC * UNUSED idesc = abuf->idesc;
171 int cycles = 0;
172 {
173 int referenced = 0;
174 int UNUSED insn_referenced = abuf->written;
175 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
176 }
177 return cycles;
178 #undef FLD
179 }
180
181 static int
182 model_crisv10_movu_w_r (SIM_CPU *current_cpu, void *sem_arg)
183 {
184 #define FLD(f) abuf->fields.sfmt_muls_b.f
185 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
186 const IDESC * UNUSED idesc = abuf->idesc;
187 int cycles = 0;
188 {
189 int referenced = 0;
190 int UNUSED insn_referenced = abuf->written;
191 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
192 }
193 return cycles;
194 #undef FLD
195 }
196
197 static int
198 model_crisv10_movecbr (SIM_CPU *current_cpu, void *sem_arg)
199 {
200 #define FLD(f) abuf->fields.sfmt_addcbr.f
201 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
202 const IDESC * UNUSED idesc = abuf->idesc;
203 int cycles = 0;
204 {
205 int referenced = 0;
206 int UNUSED insn_referenced = abuf->written;
207 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
208 }
209 {
210 int referenced = 0;
211 int UNUSED insn_referenced = abuf->written;
212 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
213 }
214 return cycles;
215 #undef FLD
216 }
217
218 static int
219 model_crisv10_movecwr (SIM_CPU *current_cpu, void *sem_arg)
220 {
221 #define FLD(f) abuf->fields.sfmt_addcwr.f
222 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
223 const IDESC * UNUSED idesc = abuf->idesc;
224 int cycles = 0;
225 {
226 int referenced = 0;
227 int UNUSED insn_referenced = abuf->written;
228 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
229 }
230 {
231 int referenced = 0;
232 int UNUSED insn_referenced = abuf->written;
233 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
234 }
235 return cycles;
236 #undef FLD
237 }
238
239 static int
240 model_crisv10_movecdr (SIM_CPU *current_cpu, void *sem_arg)
241 {
242 #define FLD(f) abuf->fields.sfmt_bound_cd.f
243 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
244 const IDESC * UNUSED idesc = abuf->idesc;
245 int cycles = 0;
246 {
247 int referenced = 0;
248 int UNUSED insn_referenced = abuf->written;
249 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
250 }
251 {
252 int referenced = 0;
253 int UNUSED insn_referenced = abuf->written;
254 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
255 }
256 return cycles;
257 #undef FLD
258 }
259
260 static int
261 model_crisv10_movscbr (SIM_CPU *current_cpu, void *sem_arg)
262 {
263 #define FLD(f) abuf->fields.sfmt_bound_cb.f
264 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
265 const IDESC * UNUSED idesc = abuf->idesc;
266 int cycles = 0;
267 {
268 int referenced = 0;
269 int UNUSED insn_referenced = abuf->written;
270 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
271 }
272 {
273 int referenced = 0;
274 int UNUSED insn_referenced = abuf->written;
275 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
276 }
277 return cycles;
278 #undef FLD
279 }
280
281 static int
282 model_crisv10_movscwr (SIM_CPU *current_cpu, void *sem_arg)
283 {
284 #define FLD(f) abuf->fields.sfmt_bound_cw.f
285 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
286 const IDESC * UNUSED idesc = abuf->idesc;
287 int cycles = 0;
288 {
289 int referenced = 0;
290 int UNUSED insn_referenced = abuf->written;
291 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
292 }
293 {
294 int referenced = 0;
295 int UNUSED insn_referenced = abuf->written;
296 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
297 }
298 return cycles;
299 #undef FLD
300 }
301
302 static int
303 model_crisv10_movucbr (SIM_CPU *current_cpu, void *sem_arg)
304 {
305 #define FLD(f) abuf->fields.sfmt_bound_cb.f
306 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
307 const IDESC * UNUSED idesc = abuf->idesc;
308 int cycles = 0;
309 {
310 int referenced = 0;
311 int UNUSED insn_referenced = abuf->written;
312 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
313 }
314 {
315 int referenced = 0;
316 int UNUSED insn_referenced = abuf->written;
317 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
318 }
319 return cycles;
320 #undef FLD
321 }
322
323 static int
324 model_crisv10_movucwr (SIM_CPU *current_cpu, void *sem_arg)
325 {
326 #define FLD(f) abuf->fields.sfmt_bound_cw.f
327 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
328 const IDESC * UNUSED idesc = abuf->idesc;
329 int cycles = 0;
330 {
331 int referenced = 0;
332 int UNUSED insn_referenced = abuf->written;
333 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
334 }
335 {
336 int referenced = 0;
337 int UNUSED insn_referenced = abuf->written;
338 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
339 }
340 return cycles;
341 #undef FLD
342 }
343
344 static int
345 model_crisv10_addq (SIM_CPU *current_cpu, void *sem_arg)
346 {
347 #define FLD(f) abuf->fields.sfmt_addq.f
348 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
349 const IDESC * UNUSED idesc = abuf->idesc;
350 int cycles = 0;
351 {
352 int referenced = 0;
353 int UNUSED insn_referenced = abuf->written;
354 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
355 }
356 return cycles;
357 #undef FLD
358 }
359
360 static int
361 model_crisv10_subq (SIM_CPU *current_cpu, void *sem_arg)
362 {
363 #define FLD(f) abuf->fields.sfmt_addq.f
364 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
365 const IDESC * UNUSED idesc = abuf->idesc;
366 int cycles = 0;
367 {
368 int referenced = 0;
369 int UNUSED insn_referenced = abuf->written;
370 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
371 }
372 return cycles;
373 #undef FLD
374 }
375
376 static int
377 model_crisv10_cmp_r_b_r (SIM_CPU *current_cpu, void *sem_arg)
378 {
379 #define FLD(f) abuf->fields.sfmt_add_b_r.f
380 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
381 const IDESC * UNUSED idesc = abuf->idesc;
382 int cycles = 0;
383 {
384 int referenced = 0;
385 int UNUSED insn_referenced = abuf->written;
386 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
387 }
388 return cycles;
389 #undef FLD
390 }
391
392 static int
393 model_crisv10_cmp_r_w_r (SIM_CPU *current_cpu, void *sem_arg)
394 {
395 #define FLD(f) abuf->fields.sfmt_add_b_r.f
396 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
397 const IDESC * UNUSED idesc = abuf->idesc;
398 int cycles = 0;
399 {
400 int referenced = 0;
401 int UNUSED insn_referenced = abuf->written;
402 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
403 }
404 return cycles;
405 #undef FLD
406 }
407
408 static int
409 model_crisv10_cmp_r_d_r (SIM_CPU *current_cpu, void *sem_arg)
410 {
411 #define FLD(f) abuf->fields.sfmt_add_b_r.f
412 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
413 const IDESC * UNUSED idesc = abuf->idesc;
414 int cycles = 0;
415 {
416 int referenced = 0;
417 int UNUSED insn_referenced = abuf->written;
418 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
419 }
420 return cycles;
421 #undef FLD
422 }
423
424 static int
425 model_crisv10_cmp_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
426 {
427 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
428 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
429 const IDESC * UNUSED idesc = abuf->idesc;
430 int cycles = 0;
431 {
432 int referenced = 0;
433 int UNUSED insn_referenced = abuf->written;
434 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
435 }
436 {
437 int referenced = 0;
438 int UNUSED insn_referenced = abuf->written;
439 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
440 }
441 return cycles;
442 #undef FLD
443 }
444
445 static int
446 model_crisv10_cmp_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
447 {
448 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
449 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
450 const IDESC * UNUSED idesc = abuf->idesc;
451 int cycles = 0;
452 {
453 int referenced = 0;
454 int UNUSED insn_referenced = abuf->written;
455 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
456 }
457 {
458 int referenced = 0;
459 int UNUSED insn_referenced = abuf->written;
460 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
461 }
462 return cycles;
463 #undef FLD
464 }
465
466 static int
467 model_crisv10_cmp_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
468 {
469 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
470 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
471 const IDESC * UNUSED idesc = abuf->idesc;
472 int cycles = 0;
473 {
474 int referenced = 0;
475 int UNUSED insn_referenced = abuf->written;
476 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
477 }
478 {
479 int referenced = 0;
480 int UNUSED insn_referenced = abuf->written;
481 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
482 }
483 return cycles;
484 #undef FLD
485 }
486
487 static int
488 model_crisv10_cmpcbr (SIM_CPU *current_cpu, void *sem_arg)
489 {
490 #define FLD(f) abuf->fields.sfmt_bound_cb.f
491 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
492 const IDESC * UNUSED idesc = abuf->idesc;
493 int cycles = 0;
494 {
495 int referenced = 0;
496 int UNUSED insn_referenced = abuf->written;
497 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
498 }
499 {
500 int referenced = 0;
501 int UNUSED insn_referenced = abuf->written;
502 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
503 }
504 return cycles;
505 #undef FLD
506 }
507
508 static int
509 model_crisv10_cmpcwr (SIM_CPU *current_cpu, void *sem_arg)
510 {
511 #define FLD(f) abuf->fields.sfmt_bound_cw.f
512 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
513 const IDESC * UNUSED idesc = abuf->idesc;
514 int cycles = 0;
515 {
516 int referenced = 0;
517 int UNUSED insn_referenced = abuf->written;
518 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
519 }
520 {
521 int referenced = 0;
522 int UNUSED insn_referenced = abuf->written;
523 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
524 }
525 return cycles;
526 #undef FLD
527 }
528
529 static int
530 model_crisv10_cmpcdr (SIM_CPU *current_cpu, void *sem_arg)
531 {
532 #define FLD(f) abuf->fields.sfmt_bound_cd.f
533 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
534 const IDESC * UNUSED idesc = abuf->idesc;
535 int cycles = 0;
536 {
537 int referenced = 0;
538 int UNUSED insn_referenced = abuf->written;
539 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
540 }
541 {
542 int referenced = 0;
543 int UNUSED insn_referenced = abuf->written;
544 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
545 }
546 return cycles;
547 #undef FLD
548 }
549
550 static int
551 model_crisv10_cmpq (SIM_CPU *current_cpu, void *sem_arg)
552 {
553 #define FLD(f) abuf->fields.sfmt_andq.f
554 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
555 const IDESC * UNUSED idesc = abuf->idesc;
556 int cycles = 0;
557 {
558 int referenced = 0;
559 int UNUSED insn_referenced = abuf->written;
560 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
561 }
562 return cycles;
563 #undef FLD
564 }
565
566 static int
567 model_crisv10_cmps_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
568 {
569 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
570 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
571 const IDESC * UNUSED idesc = abuf->idesc;
572 int cycles = 0;
573 {
574 int referenced = 0;
575 int UNUSED insn_referenced = abuf->written;
576 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
577 }
578 {
579 int referenced = 0;
580 int UNUSED insn_referenced = abuf->written;
581 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
582 }
583 return cycles;
584 #undef FLD
585 }
586
587 static int
588 model_crisv10_cmps_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
589 {
590 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
591 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
592 const IDESC * UNUSED idesc = abuf->idesc;
593 int cycles = 0;
594 {
595 int referenced = 0;
596 int UNUSED insn_referenced = abuf->written;
597 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
598 }
599 {
600 int referenced = 0;
601 int UNUSED insn_referenced = abuf->written;
602 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
603 }
604 return cycles;
605 #undef FLD
606 }
607
608 static int
609 model_crisv10_cmpscbr (SIM_CPU *current_cpu, void *sem_arg)
610 {
611 #define FLD(f) abuf->fields.sfmt_bound_cb.f
612 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
613 const IDESC * UNUSED idesc = abuf->idesc;
614 int cycles = 0;
615 {
616 int referenced = 0;
617 int UNUSED insn_referenced = abuf->written;
618 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
619 }
620 {
621 int referenced = 0;
622 int UNUSED insn_referenced = abuf->written;
623 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
624 }
625 return cycles;
626 #undef FLD
627 }
628
629 static int
630 model_crisv10_cmpscwr (SIM_CPU *current_cpu, void *sem_arg)
631 {
632 #define FLD(f) abuf->fields.sfmt_bound_cw.f
633 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
634 const IDESC * UNUSED idesc = abuf->idesc;
635 int cycles = 0;
636 {
637 int referenced = 0;
638 int UNUSED insn_referenced = abuf->written;
639 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
640 }
641 {
642 int referenced = 0;
643 int UNUSED insn_referenced = abuf->written;
644 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
645 }
646 return cycles;
647 #undef FLD
648 }
649
650 static int
651 model_crisv10_cmpu_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
652 {
653 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
654 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
655 const IDESC * UNUSED idesc = abuf->idesc;
656 int cycles = 0;
657 {
658 int referenced = 0;
659 int UNUSED insn_referenced = abuf->written;
660 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
661 }
662 {
663 int referenced = 0;
664 int UNUSED insn_referenced = abuf->written;
665 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
666 }
667 return cycles;
668 #undef FLD
669 }
670
671 static int
672 model_crisv10_cmpu_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
673 {
674 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
675 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
676 const IDESC * UNUSED idesc = abuf->idesc;
677 int cycles = 0;
678 {
679 int referenced = 0;
680 int UNUSED insn_referenced = abuf->written;
681 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
682 }
683 {
684 int referenced = 0;
685 int UNUSED insn_referenced = abuf->written;
686 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
687 }
688 return cycles;
689 #undef FLD
690 }
691
692 static int
693 model_crisv10_cmpucbr (SIM_CPU *current_cpu, void *sem_arg)
694 {
695 #define FLD(f) abuf->fields.sfmt_bound_cb.f
696 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
697 const IDESC * UNUSED idesc = abuf->idesc;
698 int cycles = 0;
699 {
700 int referenced = 0;
701 int UNUSED insn_referenced = abuf->written;
702 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
703 }
704 {
705 int referenced = 0;
706 int UNUSED insn_referenced = abuf->written;
707 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
708 }
709 return cycles;
710 #undef FLD
711 }
712
713 static int
714 model_crisv10_cmpucwr (SIM_CPU *current_cpu, void *sem_arg)
715 {
716 #define FLD(f) abuf->fields.sfmt_bound_cw.f
717 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
718 const IDESC * UNUSED idesc = abuf->idesc;
719 int cycles = 0;
720 {
721 int referenced = 0;
722 int UNUSED insn_referenced = abuf->written;
723 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
724 }
725 {
726 int referenced = 0;
727 int UNUSED insn_referenced = abuf->written;
728 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
729 }
730 return cycles;
731 #undef FLD
732 }
733
734 static int
735 model_crisv10_move_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
736 {
737 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
738 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
739 const IDESC * UNUSED idesc = abuf->idesc;
740 int cycles = 0;
741 {
742 int referenced = 0;
743 int UNUSED insn_referenced = abuf->written;
744 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
745 }
746 {
747 int referenced = 0;
748 int UNUSED insn_referenced = abuf->written;
749 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
750 }
751 return cycles;
752 #undef FLD
753 }
754
755 static int
756 model_crisv10_move_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
757 {
758 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
759 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
760 const IDESC * UNUSED idesc = abuf->idesc;
761 int cycles = 0;
762 {
763 int referenced = 0;
764 int UNUSED insn_referenced = abuf->written;
765 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
766 }
767 {
768 int referenced = 0;
769 int UNUSED insn_referenced = abuf->written;
770 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
771 }
772 return cycles;
773 #undef FLD
774 }
775
776 static int
777 model_crisv10_move_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
778 {
779 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
780 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
781 const IDESC * UNUSED idesc = abuf->idesc;
782 int cycles = 0;
783 {
784 int referenced = 0;
785 int UNUSED insn_referenced = abuf->written;
786 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
787 }
788 {
789 int referenced = 0;
790 int UNUSED insn_referenced = abuf->written;
791 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
792 }
793 return cycles;
794 #undef FLD
795 }
796
797 static int
798 model_crisv10_movs_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
799 {
800 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
801 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
802 const IDESC * UNUSED idesc = abuf->idesc;
803 int cycles = 0;
804 {
805 int referenced = 0;
806 int UNUSED insn_referenced = abuf->written;
807 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
808 }
809 {
810 int referenced = 0;
811 int UNUSED insn_referenced = abuf->written;
812 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
813 }
814 return cycles;
815 #undef FLD
816 }
817
818 static int
819 model_crisv10_movs_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
820 {
821 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
822 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
823 const IDESC * UNUSED idesc = abuf->idesc;
824 int cycles = 0;
825 {
826 int referenced = 0;
827 int UNUSED insn_referenced = abuf->written;
828 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
829 }
830 {
831 int referenced = 0;
832 int UNUSED insn_referenced = abuf->written;
833 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
834 }
835 return cycles;
836 #undef FLD
837 }
838
839 static int
840 model_crisv10_movu_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
841 {
842 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
843 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
844 const IDESC * UNUSED idesc = abuf->idesc;
845 int cycles = 0;
846 {
847 int referenced = 0;
848 int UNUSED insn_referenced = abuf->written;
849 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
850 }
851 {
852 int referenced = 0;
853 int UNUSED insn_referenced = abuf->written;
854 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
855 }
856 return cycles;
857 #undef FLD
858 }
859
860 static int
861 model_crisv10_movu_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
862 {
863 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
864 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
865 const IDESC * UNUSED idesc = abuf->idesc;
866 int cycles = 0;
867 {
868 int referenced = 0;
869 int UNUSED insn_referenced = abuf->written;
870 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
871 }
872 {
873 int referenced = 0;
874 int UNUSED insn_referenced = abuf->written;
875 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
876 }
877 return cycles;
878 #undef FLD
879 }
880
881 static int
882 model_crisv10_move_r_sprv10 (SIM_CPU *current_cpu, void *sem_arg)
883 {
884 #define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
885 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
886 const IDESC * UNUSED idesc = abuf->idesc;
887 int cycles = 0;
888 {
889 int referenced = 0;
890 int UNUSED insn_referenced = abuf->written;
891 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
892 }
893 return cycles;
894 #undef FLD
895 }
896
897 static int
898 model_crisv10_move_spr_rv10 (SIM_CPU *current_cpu, void *sem_arg)
899 {
900 #define FLD(f) abuf->fields.sfmt_move_spr_rv10.f
901 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
902 const IDESC * UNUSED idesc = abuf->idesc;
903 int cycles = 0;
904 {
905 int referenced = 0;
906 int UNUSED insn_referenced = abuf->written;
907 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
908 }
909 return cycles;
910 #undef FLD
911 }
912
913 static int
914 model_crisv10_ret_type (SIM_CPU *current_cpu, void *sem_arg)
915 {
916 #define FLD(f) abuf->fields.sfmt_move_spr_rv10.f
917 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
918 const IDESC * UNUSED idesc = abuf->idesc;
919 int cycles = 0;
920 {
921 int referenced = 0;
922 int UNUSED insn_referenced = abuf->written;
923 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
924 }
925 return cycles;
926 #undef FLD
927 }
928
929 static int
930 model_crisv10_move_m_sprv10 (SIM_CPU *current_cpu, void *sem_arg)
931 {
932 #define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
933 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
934 const IDESC * UNUSED idesc = abuf->idesc;
935 int cycles = 0;
936 {
937 int referenced = 0;
938 int UNUSED insn_referenced = abuf->written;
939 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
940 }
941 {
942 int referenced = 0;
943 int UNUSED insn_referenced = abuf->written;
944 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
945 }
946 return cycles;
947 #undef FLD
948 }
949
950 static int
951 model_crisv10_move_c_sprv10_p0 (SIM_CPU *current_cpu, void *sem_arg)
952 {
953 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p0.f
954 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
955 const IDESC * UNUSED idesc = abuf->idesc;
956 int cycles = 0;
957 {
958 int referenced = 0;
959 int UNUSED insn_referenced = abuf->written;
960 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
961 }
962 {
963 int referenced = 0;
964 int UNUSED insn_referenced = abuf->written;
965 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
966 }
967 return cycles;
968 #undef FLD
969 }
970
971 static int
972 model_crisv10_move_c_sprv10_p1 (SIM_CPU *current_cpu, void *sem_arg)
973 {
974 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p0.f
975 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
976 const IDESC * UNUSED idesc = abuf->idesc;
977 int cycles = 0;
978 {
979 int referenced = 0;
980 int UNUSED insn_referenced = abuf->written;
981 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
982 }
983 {
984 int referenced = 0;
985 int UNUSED insn_referenced = abuf->written;
986 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
987 }
988 return cycles;
989 #undef FLD
990 }
991
992 static int
993 model_crisv10_move_c_sprv10_p4 (SIM_CPU *current_cpu, void *sem_arg)
994 {
995 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p4.f
996 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
997 const IDESC * UNUSED idesc = abuf->idesc;
998 int cycles = 0;
999 {
1000 int referenced = 0;
1001 int UNUSED insn_referenced = abuf->written;
1002 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
1003 }
1004 {
1005 int referenced = 0;
1006 int UNUSED insn_referenced = abuf->written;
1007 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1008 }
1009 return cycles;
1010 #undef FLD
1011 }
1012
1013 static int
1014 model_crisv10_move_c_sprv10_p5 (SIM_CPU *current_cpu, void *sem_arg)
1015 {
1016 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p4.f
1017 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1018 const IDESC * UNUSED idesc = abuf->idesc;
1019 int cycles = 0;
1020 {
1021 int referenced = 0;
1022 int UNUSED insn_referenced = abuf->written;
1023 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
1024 }
1025 {
1026 int referenced = 0;
1027 int UNUSED insn_referenced = abuf->written;
1028 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1029 }
1030 return cycles;
1031 #undef FLD
1032 }
1033
1034 static int
1035 model_crisv10_move_c_sprv10_p8 (SIM_CPU *current_cpu, void *sem_arg)
1036 {
1037 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
1038 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1039 const IDESC * UNUSED idesc = abuf->idesc;
1040 int cycles = 0;
1041 {
1042 int referenced = 0;
1043 int UNUSED insn_referenced = abuf->written;
1044 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
1045 }
1046 {
1047 int referenced = 0;
1048 int UNUSED insn_referenced = abuf->written;
1049 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1050 }
1051 return cycles;
1052 #undef FLD
1053 }
1054
1055 static int
1056 model_crisv10_move_c_sprv10_p9 (SIM_CPU *current_cpu, void *sem_arg)
1057 {
1058 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
1059 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1060 const IDESC * UNUSED idesc = abuf->idesc;
1061 int cycles = 0;
1062 {
1063 int referenced = 0;
1064 int UNUSED insn_referenced = abuf->written;
1065 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
1066 }
1067 {
1068 int referenced = 0;
1069 int UNUSED insn_referenced = abuf->written;
1070 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1071 }
1072 return cycles;
1073 #undef FLD
1074 }
1075
1076 static int
1077 model_crisv10_move_c_sprv10_p10 (SIM_CPU *current_cpu, void *sem_arg)
1078 {
1079 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
1080 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1081 const IDESC * UNUSED idesc = abuf->idesc;
1082 int cycles = 0;
1083 {
1084 int referenced = 0;
1085 int UNUSED insn_referenced = abuf->written;
1086 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
1087 }
1088 {
1089 int referenced = 0;
1090 int UNUSED insn_referenced = abuf->written;
1091 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1092 }
1093 return cycles;
1094 #undef FLD
1095 }
1096
1097 static int
1098 model_crisv10_move_c_sprv10_p11 (SIM_CPU *current_cpu, void *sem_arg)
1099 {
1100 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
1101 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1102 const IDESC * UNUSED idesc = abuf->idesc;
1103 int cycles = 0;
1104 {
1105 int referenced = 0;
1106 int UNUSED insn_referenced = abuf->written;
1107 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
1108 }
1109 {
1110 int referenced = 0;
1111 int UNUSED insn_referenced = abuf->written;
1112 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1113 }
1114 return cycles;
1115 #undef FLD
1116 }
1117
1118 static int
1119 model_crisv10_move_c_sprv10_p12 (SIM_CPU *current_cpu, void *sem_arg)
1120 {
1121 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
1122 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1123 const IDESC * UNUSED idesc = abuf->idesc;
1124 int cycles = 0;
1125 {
1126 int referenced = 0;
1127 int UNUSED insn_referenced = abuf->written;
1128 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
1129 }
1130 {
1131 int referenced = 0;
1132 int UNUSED insn_referenced = abuf->written;
1133 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1134 }
1135 return cycles;
1136 #undef FLD
1137 }
1138
1139 static int
1140 model_crisv10_move_c_sprv10_p13 (SIM_CPU *current_cpu, void *sem_arg)
1141 {
1142 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
1143 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1144 const IDESC * UNUSED idesc = abuf->idesc;
1145 int cycles = 0;
1146 {
1147 int referenced = 0;
1148 int UNUSED insn_referenced = abuf->written;
1149 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
1150 }
1151 {
1152 int referenced = 0;
1153 int UNUSED insn_referenced = abuf->written;
1154 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1155 }
1156 return cycles;
1157 #undef FLD
1158 }
1159
1160 static int
1161 model_crisv10_move_c_sprv10_p7 (SIM_CPU *current_cpu, void *sem_arg)
1162 {
1163 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
1164 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1165 const IDESC * UNUSED idesc = abuf->idesc;
1166 int cycles = 0;
1167 {
1168 int referenced = 0;
1169 int UNUSED insn_referenced = abuf->written;
1170 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
1171 }
1172 {
1173 int referenced = 0;
1174 int UNUSED insn_referenced = abuf->written;
1175 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1176 }
1177 return cycles;
1178 #undef FLD
1179 }
1180
1181 static int
1182 model_crisv10_move_c_sprv10_p14 (SIM_CPU *current_cpu, void *sem_arg)
1183 {
1184 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
1185 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1186 const IDESC * UNUSED idesc = abuf->idesc;
1187 int cycles = 0;
1188 {
1189 int referenced = 0;
1190 int UNUSED insn_referenced = abuf->written;
1191 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
1192 }
1193 {
1194 int referenced = 0;
1195 int UNUSED insn_referenced = abuf->written;
1196 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1197 }
1198 return cycles;
1199 #undef FLD
1200 }
1201
1202 static int
1203 model_crisv10_move_c_sprv10_p15 (SIM_CPU *current_cpu, void *sem_arg)
1204 {
1205 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
1206 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1207 const IDESC * UNUSED idesc = abuf->idesc;
1208 int cycles = 0;
1209 {
1210 int referenced = 0;
1211 int UNUSED insn_referenced = abuf->written;
1212 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
1213 }
1214 {
1215 int referenced = 0;
1216 int UNUSED insn_referenced = abuf->written;
1217 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1218 }
1219 return cycles;
1220 #undef FLD
1221 }
1222
1223 static int
1224 model_crisv10_move_spr_mv10 (SIM_CPU *current_cpu, void *sem_arg)
1225 {
1226 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
1227 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1228 const IDESC * UNUSED idesc = abuf->idesc;
1229 int cycles = 0;
1230 {
1231 int referenced = 0;
1232 int UNUSED insn_referenced = abuf->written;
1233 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
1234 }
1235 {
1236 int referenced = 0;
1237 int UNUSED insn_referenced = abuf->written;
1238 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1239 }
1240 return cycles;
1241 #undef FLD
1242 }
1243
1244 static int
1245 model_crisv10_sbfs (SIM_CPU *current_cpu, void *sem_arg)
1246 {
1247 #define FLD(f) abuf->fields.fmt_empty.f
1248 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1249 const IDESC * UNUSED idesc = abuf->idesc;
1250 int cycles = 0;
1251 {
1252 int referenced = 0;
1253 int UNUSED insn_referenced = abuf->written;
1254 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
1255 }
1256 return cycles;
1257 #undef FLD
1258 }
1259
1260 static int
1261 model_crisv10_movem_r_m (SIM_CPU *current_cpu, void *sem_arg)
1262 {
1263 #define FLD(f) abuf->fields.sfmt_movem_r_m.f
1264 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1265 const IDESC * UNUSED idesc = abuf->idesc;
1266 int cycles = 0;
1267 {
1268 int referenced = 0;
1269 int UNUSED insn_referenced = abuf->written;
1270 INT in_Rd = -1;
1271 in_Rd = FLD (in_Rd);
1272 referenced |= 1 << 0;
1273 cycles += crisv10f_model_crisv10_u_movem (current_cpu, idesc, 0, referenced, in_Rd);
1274 }
1275 {
1276 int referenced = 0;
1277 int UNUSED insn_referenced = abuf->written;
1278 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1279 }
1280 return cycles;
1281 #undef FLD
1282 }
1283
1284 static int
1285 model_crisv10_movem_m_r (SIM_CPU *current_cpu, void *sem_arg)
1286 {
1287 #define FLD(f) abuf->fields.sfmt_movem_m_r.f
1288 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1289 const IDESC * UNUSED idesc = abuf->idesc;
1290 int cycles = 0;
1291 {
1292 int referenced = 0;
1293 int UNUSED insn_referenced = abuf->written;
1294 INT in_Rd = -1;
1295 in_Rd = FLD (in_Rd);
1296 referenced |= 1 << 0;
1297 cycles += crisv10f_model_crisv10_u_movem (current_cpu, idesc, 0, referenced, in_Rd);
1298 }
1299 {
1300 int referenced = 0;
1301 int UNUSED insn_referenced = abuf->written;
1302 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1303 }
1304 return cycles;
1305 #undef FLD
1306 }
1307
1308 static int
1309 model_crisv10_movem_m_pc (SIM_CPU *current_cpu, void *sem_arg)
1310 {
1311 #define FLD(f) abuf->fields.sfmt_movem_m_r.f
1312 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1313 const IDESC * UNUSED idesc = abuf->idesc;
1314 int cycles = 0;
1315 {
1316 int referenced = 0;
1317 int UNUSED insn_referenced = abuf->written;
1318 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
1319 }
1320 {
1321 int referenced = 0;
1322 int UNUSED insn_referenced = abuf->written;
1323 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1324 }
1325 return cycles;
1326 #undef FLD
1327 }
1328
1329 static int
1330 model_crisv10_add_b_r (SIM_CPU *current_cpu, void *sem_arg)
1331 {
1332 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1333 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1334 const IDESC * UNUSED idesc = abuf->idesc;
1335 int cycles = 0;
1336 {
1337 int referenced = 0;
1338 int UNUSED insn_referenced = abuf->written;
1339 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
1340 }
1341 return cycles;
1342 #undef FLD
1343 }
1344
1345 static int
1346 model_crisv10_add_w_r (SIM_CPU *current_cpu, void *sem_arg)
1347 {
1348 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1349 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1350 const IDESC * UNUSED idesc = abuf->idesc;
1351 int cycles = 0;
1352 {
1353 int referenced = 0;
1354 int UNUSED insn_referenced = abuf->written;
1355 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
1356 }
1357 return cycles;
1358 #undef FLD
1359 }
1360
1361 static int
1362 model_crisv10_add_d_r (SIM_CPU *current_cpu, void *sem_arg)
1363 {
1364 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1365 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1366 const IDESC * UNUSED idesc = abuf->idesc;
1367 int cycles = 0;
1368 {
1369 int referenced = 0;
1370 int UNUSED insn_referenced = abuf->written;
1371 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
1372 }
1373 return cycles;
1374 #undef FLD
1375 }
1376
1377 static int
1378 model_crisv10_add_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
1379 {
1380 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
1381 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1382 const IDESC * UNUSED idesc = abuf->idesc;
1383 int cycles = 0;
1384 {
1385 int referenced = 0;
1386 int UNUSED insn_referenced = abuf->written;
1387 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
1388 }
1389 {
1390 int referenced = 0;
1391 int UNUSED insn_referenced = abuf->written;
1392 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1393 }
1394 return cycles;
1395 #undef FLD
1396 }
1397
1398 static int
1399 model_crisv10_add_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
1400 {
1401 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
1402 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1403 const IDESC * UNUSED idesc = abuf->idesc;
1404 int cycles = 0;
1405 {
1406 int referenced = 0;
1407 int UNUSED insn_referenced = abuf->written;
1408 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
1409 }
1410 {
1411 int referenced = 0;
1412 int UNUSED insn_referenced = abuf->written;
1413 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1414 }
1415 return cycles;
1416 #undef FLD
1417 }
1418
1419 static int
1420 model_crisv10_add_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
1421 {
1422 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
1423 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1424 const IDESC * UNUSED idesc = abuf->idesc;
1425 int cycles = 0;
1426 {
1427 int referenced = 0;
1428 int UNUSED insn_referenced = abuf->written;
1429 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
1430 }
1431 {
1432 int referenced = 0;
1433 int UNUSED insn_referenced = abuf->written;
1434 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1435 }
1436 return cycles;
1437 #undef FLD
1438 }
1439
1440 static int
1441 model_crisv10_addcbr (SIM_CPU *current_cpu, void *sem_arg)
1442 {
1443 #define FLD(f) abuf->fields.sfmt_addcbr.f
1444 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1445 const IDESC * UNUSED idesc = abuf->idesc;
1446 int cycles = 0;
1447 {
1448 int referenced = 0;
1449 int UNUSED insn_referenced = abuf->written;
1450 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
1451 }
1452 {
1453 int referenced = 0;
1454 int UNUSED insn_referenced = abuf->written;
1455 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1456 }
1457 return cycles;
1458 #undef FLD
1459 }
1460
1461 static int
1462 model_crisv10_addcwr (SIM_CPU *current_cpu, void *sem_arg)
1463 {
1464 #define FLD(f) abuf->fields.sfmt_addcwr.f
1465 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1466 const IDESC * UNUSED idesc = abuf->idesc;
1467 int cycles = 0;
1468 {
1469 int referenced = 0;
1470 int UNUSED insn_referenced = abuf->written;
1471 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
1472 }
1473 {
1474 int referenced = 0;
1475 int UNUSED insn_referenced = abuf->written;
1476 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1477 }
1478 return cycles;
1479 #undef FLD
1480 }
1481
1482 static int
1483 model_crisv10_addcdr (SIM_CPU *current_cpu, void *sem_arg)
1484 {
1485 #define FLD(f) abuf->fields.sfmt_addcdr.f
1486 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1487 const IDESC * UNUSED idesc = abuf->idesc;
1488 int cycles = 0;
1489 {
1490 int referenced = 0;
1491 int UNUSED insn_referenced = abuf->written;
1492 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
1493 }
1494 {
1495 int referenced = 0;
1496 int UNUSED insn_referenced = abuf->written;
1497 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1498 }
1499 return cycles;
1500 #undef FLD
1501 }
1502
1503 static int
1504 model_crisv10_addcpc (SIM_CPU *current_cpu, void *sem_arg)
1505 {
1506 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
1507 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1508 const IDESC * UNUSED idesc = abuf->idesc;
1509 int cycles = 0;
1510 {
1511 int referenced = 0;
1512 int UNUSED insn_referenced = abuf->written;
1513 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
1514 }
1515 {
1516 int referenced = 0;
1517 int UNUSED insn_referenced = abuf->written;
1518 cycles += crisv10f_model_crisv10_u_stall (current_cpu, idesc, 1, referenced);
1519 }
1520 {
1521 int referenced = 0;
1522 int UNUSED insn_referenced = abuf->written;
1523 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 2, referenced);
1524 }
1525 return cycles;
1526 #undef FLD
1527 }
1528
1529 static int
1530 model_crisv10_adds_b_r (SIM_CPU *current_cpu, void *sem_arg)
1531 {
1532 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1533 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1534 const IDESC * UNUSED idesc = abuf->idesc;
1535 int cycles = 0;
1536 {
1537 int referenced = 0;
1538 int UNUSED insn_referenced = abuf->written;
1539 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
1540 }
1541 return cycles;
1542 #undef FLD
1543 }
1544
1545 static int
1546 model_crisv10_adds_w_r (SIM_CPU *current_cpu, void *sem_arg)
1547 {
1548 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1549 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1550 const IDESC * UNUSED idesc = abuf->idesc;
1551 int cycles = 0;
1552 {
1553 int referenced = 0;
1554 int UNUSED insn_referenced = abuf->written;
1555 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
1556 }
1557 return cycles;
1558 #undef FLD
1559 }
1560
1561 static int
1562 model_crisv10_adds_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
1563 {
1564 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
1565 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1566 const IDESC * UNUSED idesc = abuf->idesc;
1567 int cycles = 0;
1568 {
1569 int referenced = 0;
1570 int UNUSED insn_referenced = abuf->written;
1571 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
1572 }
1573 {
1574 int referenced = 0;
1575 int UNUSED insn_referenced = abuf->written;
1576 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1577 }
1578 return cycles;
1579 #undef FLD
1580 }
1581
1582 static int
1583 model_crisv10_adds_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
1584 {
1585 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
1586 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1587 const IDESC * UNUSED idesc = abuf->idesc;
1588 int cycles = 0;
1589 {
1590 int referenced = 0;
1591 int UNUSED insn_referenced = abuf->written;
1592 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
1593 }
1594 {
1595 int referenced = 0;
1596 int UNUSED insn_referenced = abuf->written;
1597 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1598 }
1599 return cycles;
1600 #undef FLD
1601 }
1602
1603 static int
1604 model_crisv10_addscbr (SIM_CPU *current_cpu, void *sem_arg)
1605 {
1606 #define FLD(f) abuf->fields.sfmt_addcbr.f
1607 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1608 const IDESC * UNUSED idesc = abuf->idesc;
1609 int cycles = 0;
1610 {
1611 int referenced = 0;
1612 int UNUSED insn_referenced = abuf->written;
1613 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
1614 }
1615 {
1616 int referenced = 0;
1617 int UNUSED insn_referenced = abuf->written;
1618 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1619 }
1620 return cycles;
1621 #undef FLD
1622 }
1623
1624 static int
1625 model_crisv10_addscwr (SIM_CPU *current_cpu, void *sem_arg)
1626 {
1627 #define FLD(f) abuf->fields.sfmt_addcwr.f
1628 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1629 const IDESC * UNUSED idesc = abuf->idesc;
1630 int cycles = 0;
1631 {
1632 int referenced = 0;
1633 int UNUSED insn_referenced = abuf->written;
1634 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
1635 }
1636 {
1637 int referenced = 0;
1638 int UNUSED insn_referenced = abuf->written;
1639 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1640 }
1641 return cycles;
1642 #undef FLD
1643 }
1644
1645 static int
1646 model_crisv10_addspcpc (SIM_CPU *current_cpu, void *sem_arg)
1647 {
1648 #define FLD(f) abuf->fields.fmt_empty.f
1649 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1650 const IDESC * UNUSED idesc = abuf->idesc;
1651 int cycles = 0;
1652 {
1653 int referenced = 0;
1654 int UNUSED insn_referenced = abuf->written;
1655 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
1656 }
1657 {
1658 int referenced = 0;
1659 int UNUSED insn_referenced = abuf->written;
1660 cycles += crisv10f_model_crisv10_u_stall (current_cpu, idesc, 1, referenced);
1661 }
1662 {
1663 int referenced = 0;
1664 int UNUSED insn_referenced = abuf->written;
1665 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 2, referenced);
1666 }
1667 return cycles;
1668 #undef FLD
1669 }
1670
1671 static int
1672 model_crisv10_addu_b_r (SIM_CPU *current_cpu, void *sem_arg)
1673 {
1674 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1675 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1676 const IDESC * UNUSED idesc = abuf->idesc;
1677 int cycles = 0;
1678 {
1679 int referenced = 0;
1680 int UNUSED insn_referenced = abuf->written;
1681 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
1682 }
1683 return cycles;
1684 #undef FLD
1685 }
1686
1687 static int
1688 model_crisv10_addu_w_r (SIM_CPU *current_cpu, void *sem_arg)
1689 {
1690 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1691 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1692 const IDESC * UNUSED idesc = abuf->idesc;
1693 int cycles = 0;
1694 {
1695 int referenced = 0;
1696 int UNUSED insn_referenced = abuf->written;
1697 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
1698 }
1699 return cycles;
1700 #undef FLD
1701 }
1702
1703 static int
1704 model_crisv10_addu_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
1705 {
1706 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
1707 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1708 const IDESC * UNUSED idesc = abuf->idesc;
1709 int cycles = 0;
1710 {
1711 int referenced = 0;
1712 int UNUSED insn_referenced = abuf->written;
1713 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
1714 }
1715 {
1716 int referenced = 0;
1717 int UNUSED insn_referenced = abuf->written;
1718 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1719 }
1720 return cycles;
1721 #undef FLD
1722 }
1723
1724 static int
1725 model_crisv10_addu_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
1726 {
1727 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
1728 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1729 const IDESC * UNUSED idesc = abuf->idesc;
1730 int cycles = 0;
1731 {
1732 int referenced = 0;
1733 int UNUSED insn_referenced = abuf->written;
1734 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
1735 }
1736 {
1737 int referenced = 0;
1738 int UNUSED insn_referenced = abuf->written;
1739 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1740 }
1741 return cycles;
1742 #undef FLD
1743 }
1744
1745 static int
1746 model_crisv10_adducbr (SIM_CPU *current_cpu, void *sem_arg)
1747 {
1748 #define FLD(f) abuf->fields.sfmt_addcbr.f
1749 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1750 const IDESC * UNUSED idesc = abuf->idesc;
1751 int cycles = 0;
1752 {
1753 int referenced = 0;
1754 int UNUSED insn_referenced = abuf->written;
1755 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
1756 }
1757 {
1758 int referenced = 0;
1759 int UNUSED insn_referenced = abuf->written;
1760 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1761 }
1762 return cycles;
1763 #undef FLD
1764 }
1765
1766 static int
1767 model_crisv10_adducwr (SIM_CPU *current_cpu, void *sem_arg)
1768 {
1769 #define FLD(f) abuf->fields.sfmt_addcwr.f
1770 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1771 const IDESC * UNUSED idesc = abuf->idesc;
1772 int cycles = 0;
1773 {
1774 int referenced = 0;
1775 int UNUSED insn_referenced = abuf->written;
1776 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
1777 }
1778 {
1779 int referenced = 0;
1780 int UNUSED insn_referenced = abuf->written;
1781 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1782 }
1783 return cycles;
1784 #undef FLD
1785 }
1786
1787 static int
1788 model_crisv10_sub_b_r (SIM_CPU *current_cpu, void *sem_arg)
1789 {
1790 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1791 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1792 const IDESC * UNUSED idesc = abuf->idesc;
1793 int cycles = 0;
1794 {
1795 int referenced = 0;
1796 int UNUSED insn_referenced = abuf->written;
1797 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
1798 }
1799 return cycles;
1800 #undef FLD
1801 }
1802
1803 static int
1804 model_crisv10_sub_w_r (SIM_CPU *current_cpu, void *sem_arg)
1805 {
1806 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1807 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1808 const IDESC * UNUSED idesc = abuf->idesc;
1809 int cycles = 0;
1810 {
1811 int referenced = 0;
1812 int UNUSED insn_referenced = abuf->written;
1813 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
1814 }
1815 return cycles;
1816 #undef FLD
1817 }
1818
1819 static int
1820 model_crisv10_sub_d_r (SIM_CPU *current_cpu, void *sem_arg)
1821 {
1822 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1823 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1824 const IDESC * UNUSED idesc = abuf->idesc;
1825 int cycles = 0;
1826 {
1827 int referenced = 0;
1828 int UNUSED insn_referenced = abuf->written;
1829 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
1830 }
1831 return cycles;
1832 #undef FLD
1833 }
1834
1835 static int
1836 model_crisv10_sub_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
1837 {
1838 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
1839 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1840 const IDESC * UNUSED idesc = abuf->idesc;
1841 int cycles = 0;
1842 {
1843 int referenced = 0;
1844 int UNUSED insn_referenced = abuf->written;
1845 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
1846 }
1847 {
1848 int referenced = 0;
1849 int UNUSED insn_referenced = abuf->written;
1850 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1851 }
1852 return cycles;
1853 #undef FLD
1854 }
1855
1856 static int
1857 model_crisv10_sub_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
1858 {
1859 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
1860 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1861 const IDESC * UNUSED idesc = abuf->idesc;
1862 int cycles = 0;
1863 {
1864 int referenced = 0;
1865 int UNUSED insn_referenced = abuf->written;
1866 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
1867 }
1868 {
1869 int referenced = 0;
1870 int UNUSED insn_referenced = abuf->written;
1871 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1872 }
1873 return cycles;
1874 #undef FLD
1875 }
1876
1877 static int
1878 model_crisv10_sub_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
1879 {
1880 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
1881 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1882 const IDESC * UNUSED idesc = abuf->idesc;
1883 int cycles = 0;
1884 {
1885 int referenced = 0;
1886 int UNUSED insn_referenced = abuf->written;
1887 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
1888 }
1889 {
1890 int referenced = 0;
1891 int UNUSED insn_referenced = abuf->written;
1892 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1893 }
1894 return cycles;
1895 #undef FLD
1896 }
1897
1898 static int
1899 model_crisv10_subcbr (SIM_CPU *current_cpu, void *sem_arg)
1900 {
1901 #define FLD(f) abuf->fields.sfmt_addcbr.f
1902 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1903 const IDESC * UNUSED idesc = abuf->idesc;
1904 int cycles = 0;
1905 {
1906 int referenced = 0;
1907 int UNUSED insn_referenced = abuf->written;
1908 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
1909 }
1910 {
1911 int referenced = 0;
1912 int UNUSED insn_referenced = abuf->written;
1913 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1914 }
1915 return cycles;
1916 #undef FLD
1917 }
1918
1919 static int
1920 model_crisv10_subcwr (SIM_CPU *current_cpu, void *sem_arg)
1921 {
1922 #define FLD(f) abuf->fields.sfmt_addcwr.f
1923 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1924 const IDESC * UNUSED idesc = abuf->idesc;
1925 int cycles = 0;
1926 {
1927 int referenced = 0;
1928 int UNUSED insn_referenced = abuf->written;
1929 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
1930 }
1931 {
1932 int referenced = 0;
1933 int UNUSED insn_referenced = abuf->written;
1934 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1935 }
1936 return cycles;
1937 #undef FLD
1938 }
1939
1940 static int
1941 model_crisv10_subcdr (SIM_CPU *current_cpu, void *sem_arg)
1942 {
1943 #define FLD(f) abuf->fields.sfmt_addcdr.f
1944 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1945 const IDESC * UNUSED idesc = abuf->idesc;
1946 int cycles = 0;
1947 {
1948 int referenced = 0;
1949 int UNUSED insn_referenced = abuf->written;
1950 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
1951 }
1952 {
1953 int referenced = 0;
1954 int UNUSED insn_referenced = abuf->written;
1955 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
1956 }
1957 return cycles;
1958 #undef FLD
1959 }
1960
1961 static int
1962 model_crisv10_subs_b_r (SIM_CPU *current_cpu, void *sem_arg)
1963 {
1964 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1965 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1966 const IDESC * UNUSED idesc = abuf->idesc;
1967 int cycles = 0;
1968 {
1969 int referenced = 0;
1970 int UNUSED insn_referenced = abuf->written;
1971 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
1972 }
1973 return cycles;
1974 #undef FLD
1975 }
1976
1977 static int
1978 model_crisv10_subs_w_r (SIM_CPU *current_cpu, void *sem_arg)
1979 {
1980 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1981 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1982 const IDESC * UNUSED idesc = abuf->idesc;
1983 int cycles = 0;
1984 {
1985 int referenced = 0;
1986 int UNUSED insn_referenced = abuf->written;
1987 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
1988 }
1989 return cycles;
1990 #undef FLD
1991 }
1992
1993 static int
1994 model_crisv10_subs_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
1995 {
1996 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
1997 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1998 const IDESC * UNUSED idesc = abuf->idesc;
1999 int cycles = 0;
2000 {
2001 int referenced = 0;
2002 int UNUSED insn_referenced = abuf->written;
2003 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2004 }
2005 {
2006 int referenced = 0;
2007 int UNUSED insn_referenced = abuf->written;
2008 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2009 }
2010 return cycles;
2011 #undef FLD
2012 }
2013
2014 static int
2015 model_crisv10_subs_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
2016 {
2017 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2018 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2019 const IDESC * UNUSED idesc = abuf->idesc;
2020 int cycles = 0;
2021 {
2022 int referenced = 0;
2023 int UNUSED insn_referenced = abuf->written;
2024 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2025 }
2026 {
2027 int referenced = 0;
2028 int UNUSED insn_referenced = abuf->written;
2029 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2030 }
2031 return cycles;
2032 #undef FLD
2033 }
2034
2035 static int
2036 model_crisv10_subscbr (SIM_CPU *current_cpu, void *sem_arg)
2037 {
2038 #define FLD(f) abuf->fields.sfmt_addcbr.f
2039 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2040 const IDESC * UNUSED idesc = abuf->idesc;
2041 int cycles = 0;
2042 {
2043 int referenced = 0;
2044 int UNUSED insn_referenced = abuf->written;
2045 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
2046 }
2047 {
2048 int referenced = 0;
2049 int UNUSED insn_referenced = abuf->written;
2050 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2051 }
2052 return cycles;
2053 #undef FLD
2054 }
2055
2056 static int
2057 model_crisv10_subscwr (SIM_CPU *current_cpu, void *sem_arg)
2058 {
2059 #define FLD(f) abuf->fields.sfmt_addcwr.f
2060 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2061 const IDESC * UNUSED idesc = abuf->idesc;
2062 int cycles = 0;
2063 {
2064 int referenced = 0;
2065 int UNUSED insn_referenced = abuf->written;
2066 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
2067 }
2068 {
2069 int referenced = 0;
2070 int UNUSED insn_referenced = abuf->written;
2071 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2072 }
2073 return cycles;
2074 #undef FLD
2075 }
2076
2077 static int
2078 model_crisv10_subu_b_r (SIM_CPU *current_cpu, void *sem_arg)
2079 {
2080 #define FLD(f) abuf->fields.sfmt_add_b_r.f
2081 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2082 const IDESC * UNUSED idesc = abuf->idesc;
2083 int cycles = 0;
2084 {
2085 int referenced = 0;
2086 int UNUSED insn_referenced = abuf->written;
2087 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2088 }
2089 return cycles;
2090 #undef FLD
2091 }
2092
2093 static int
2094 model_crisv10_subu_w_r (SIM_CPU *current_cpu, void *sem_arg)
2095 {
2096 #define FLD(f) abuf->fields.sfmt_add_b_r.f
2097 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2098 const IDESC * UNUSED idesc = abuf->idesc;
2099 int cycles = 0;
2100 {
2101 int referenced = 0;
2102 int UNUSED insn_referenced = abuf->written;
2103 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2104 }
2105 return cycles;
2106 #undef FLD
2107 }
2108
2109 static int
2110 model_crisv10_subu_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
2111 {
2112 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2113 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2114 const IDESC * UNUSED idesc = abuf->idesc;
2115 int cycles = 0;
2116 {
2117 int referenced = 0;
2118 int UNUSED insn_referenced = abuf->written;
2119 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2120 }
2121 {
2122 int referenced = 0;
2123 int UNUSED insn_referenced = abuf->written;
2124 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2125 }
2126 return cycles;
2127 #undef FLD
2128 }
2129
2130 static int
2131 model_crisv10_subu_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
2132 {
2133 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2134 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2135 const IDESC * UNUSED idesc = abuf->idesc;
2136 int cycles = 0;
2137 {
2138 int referenced = 0;
2139 int UNUSED insn_referenced = abuf->written;
2140 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2141 }
2142 {
2143 int referenced = 0;
2144 int UNUSED insn_referenced = abuf->written;
2145 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2146 }
2147 return cycles;
2148 #undef FLD
2149 }
2150
2151 static int
2152 model_crisv10_subucbr (SIM_CPU *current_cpu, void *sem_arg)
2153 {
2154 #define FLD(f) abuf->fields.sfmt_addcbr.f
2155 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2156 const IDESC * UNUSED idesc = abuf->idesc;
2157 int cycles = 0;
2158 {
2159 int referenced = 0;
2160 int UNUSED insn_referenced = abuf->written;
2161 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
2162 }
2163 {
2164 int referenced = 0;
2165 int UNUSED insn_referenced = abuf->written;
2166 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2167 }
2168 return cycles;
2169 #undef FLD
2170 }
2171
2172 static int
2173 model_crisv10_subucwr (SIM_CPU *current_cpu, void *sem_arg)
2174 {
2175 #define FLD(f) abuf->fields.sfmt_addcwr.f
2176 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2177 const IDESC * UNUSED idesc = abuf->idesc;
2178 int cycles = 0;
2179 {
2180 int referenced = 0;
2181 int UNUSED insn_referenced = abuf->written;
2182 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
2183 }
2184 {
2185 int referenced = 0;
2186 int UNUSED insn_referenced = abuf->written;
2187 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2188 }
2189 return cycles;
2190 #undef FLD
2191 }
2192
2193 static int
2194 model_crisv10_addi_b_r (SIM_CPU *current_cpu, void *sem_arg)
2195 {
2196 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2197 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2198 const IDESC * UNUSED idesc = abuf->idesc;
2199 int cycles = 0;
2200 {
2201 int referenced = 0;
2202 int UNUSED insn_referenced = abuf->written;
2203 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2204 }
2205 return cycles;
2206 #undef FLD
2207 }
2208
2209 static int
2210 model_crisv10_addi_w_r (SIM_CPU *current_cpu, void *sem_arg)
2211 {
2212 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2213 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2214 const IDESC * UNUSED idesc = abuf->idesc;
2215 int cycles = 0;
2216 {
2217 int referenced = 0;
2218 int UNUSED insn_referenced = abuf->written;
2219 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2220 }
2221 return cycles;
2222 #undef FLD
2223 }
2224
2225 static int
2226 model_crisv10_addi_d_r (SIM_CPU *current_cpu, void *sem_arg)
2227 {
2228 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2229 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2230 const IDESC * UNUSED idesc = abuf->idesc;
2231 int cycles = 0;
2232 {
2233 int referenced = 0;
2234 int UNUSED insn_referenced = abuf->written;
2235 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2236 }
2237 return cycles;
2238 #undef FLD
2239 }
2240
2241 static int
2242 model_crisv10_neg_b_r (SIM_CPU *current_cpu, void *sem_arg)
2243 {
2244 #define FLD(f) abuf->fields.sfmt_add_b_r.f
2245 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2246 const IDESC * UNUSED idesc = abuf->idesc;
2247 int cycles = 0;
2248 {
2249 int referenced = 0;
2250 int UNUSED insn_referenced = abuf->written;
2251 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2252 }
2253 return cycles;
2254 #undef FLD
2255 }
2256
2257 static int
2258 model_crisv10_neg_w_r (SIM_CPU *current_cpu, void *sem_arg)
2259 {
2260 #define FLD(f) abuf->fields.sfmt_add_b_r.f
2261 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2262 const IDESC * UNUSED idesc = abuf->idesc;
2263 int cycles = 0;
2264 {
2265 int referenced = 0;
2266 int UNUSED insn_referenced = abuf->written;
2267 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2268 }
2269 return cycles;
2270 #undef FLD
2271 }
2272
2273 static int
2274 model_crisv10_neg_d_r (SIM_CPU *current_cpu, void *sem_arg)
2275 {
2276 #define FLD(f) abuf->fields.sfmt_add_b_r.f
2277 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2278 const IDESC * UNUSED idesc = abuf->idesc;
2279 int cycles = 0;
2280 {
2281 int referenced = 0;
2282 int UNUSED insn_referenced = abuf->written;
2283 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2284 }
2285 return cycles;
2286 #undef FLD
2287 }
2288
2289 static int
2290 model_crisv10_test_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
2291 {
2292 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
2293 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2294 const IDESC * UNUSED idesc = abuf->idesc;
2295 int cycles = 0;
2296 {
2297 int referenced = 0;
2298 int UNUSED insn_referenced = abuf->written;
2299 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2300 }
2301 {
2302 int referenced = 0;
2303 int UNUSED insn_referenced = abuf->written;
2304 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2305 }
2306 return cycles;
2307 #undef FLD
2308 }
2309
2310 static int
2311 model_crisv10_test_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
2312 {
2313 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
2314 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2315 const IDESC * UNUSED idesc = abuf->idesc;
2316 int cycles = 0;
2317 {
2318 int referenced = 0;
2319 int UNUSED insn_referenced = abuf->written;
2320 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2321 }
2322 {
2323 int referenced = 0;
2324 int UNUSED insn_referenced = abuf->written;
2325 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2326 }
2327 return cycles;
2328 #undef FLD
2329 }
2330
2331 static int
2332 model_crisv10_test_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
2333 {
2334 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
2335 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2336 const IDESC * UNUSED idesc = abuf->idesc;
2337 int cycles = 0;
2338 {
2339 int referenced = 0;
2340 int UNUSED insn_referenced = abuf->written;
2341 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2342 }
2343 {
2344 int referenced = 0;
2345 int UNUSED insn_referenced = abuf->written;
2346 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2347 }
2348 return cycles;
2349 #undef FLD
2350 }
2351
2352 static int
2353 model_crisv10_move_r_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
2354 {
2355 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2356 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2357 const IDESC * UNUSED idesc = abuf->idesc;
2358 int cycles = 0;
2359 {
2360 int referenced = 0;
2361 int UNUSED insn_referenced = abuf->written;
2362 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2363 }
2364 {
2365 int referenced = 0;
2366 int UNUSED insn_referenced = abuf->written;
2367 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2368 }
2369 return cycles;
2370 #undef FLD
2371 }
2372
2373 static int
2374 model_crisv10_move_r_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
2375 {
2376 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2377 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2378 const IDESC * UNUSED idesc = abuf->idesc;
2379 int cycles = 0;
2380 {
2381 int referenced = 0;
2382 int UNUSED insn_referenced = abuf->written;
2383 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2384 }
2385 {
2386 int referenced = 0;
2387 int UNUSED insn_referenced = abuf->written;
2388 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2389 }
2390 return cycles;
2391 #undef FLD
2392 }
2393
2394 static int
2395 model_crisv10_move_r_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
2396 {
2397 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2398 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2399 const IDESC * UNUSED idesc = abuf->idesc;
2400 int cycles = 0;
2401 {
2402 int referenced = 0;
2403 int UNUSED insn_referenced = abuf->written;
2404 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2405 }
2406 {
2407 int referenced = 0;
2408 int UNUSED insn_referenced = abuf->written;
2409 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2410 }
2411 return cycles;
2412 #undef FLD
2413 }
2414
2415 static int
2416 model_crisv10_muls_b (SIM_CPU *current_cpu, void *sem_arg)
2417 {
2418 #define FLD(f) abuf->fields.sfmt_muls_b.f
2419 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2420 const IDESC * UNUSED idesc = abuf->idesc;
2421 int cycles = 0;
2422 {
2423 int referenced = 0;
2424 int UNUSED insn_referenced = abuf->written;
2425 cycles += crisv10f_model_crisv10_u_multiply (current_cpu, idesc, 0, referenced);
2426 }
2427 {
2428 int referenced = 0;
2429 int UNUSED insn_referenced = abuf->written;
2430 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2431 }
2432 return cycles;
2433 #undef FLD
2434 }
2435
2436 static int
2437 model_crisv10_muls_w (SIM_CPU *current_cpu, void *sem_arg)
2438 {
2439 #define FLD(f) abuf->fields.sfmt_muls_b.f
2440 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2441 const IDESC * UNUSED idesc = abuf->idesc;
2442 int cycles = 0;
2443 {
2444 int referenced = 0;
2445 int UNUSED insn_referenced = abuf->written;
2446 cycles += crisv10f_model_crisv10_u_multiply (current_cpu, idesc, 0, referenced);
2447 }
2448 {
2449 int referenced = 0;
2450 int UNUSED insn_referenced = abuf->written;
2451 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2452 }
2453 return cycles;
2454 #undef FLD
2455 }
2456
2457 static int
2458 model_crisv10_muls_d (SIM_CPU *current_cpu, void *sem_arg)
2459 {
2460 #define FLD(f) abuf->fields.sfmt_muls_b.f
2461 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2462 const IDESC * UNUSED idesc = abuf->idesc;
2463 int cycles = 0;
2464 {
2465 int referenced = 0;
2466 int UNUSED insn_referenced = abuf->written;
2467 cycles += crisv10f_model_crisv10_u_multiply (current_cpu, idesc, 0, referenced);
2468 }
2469 {
2470 int referenced = 0;
2471 int UNUSED insn_referenced = abuf->written;
2472 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2473 }
2474 return cycles;
2475 #undef FLD
2476 }
2477
2478 static int
2479 model_crisv10_mulu_b (SIM_CPU *current_cpu, void *sem_arg)
2480 {
2481 #define FLD(f) abuf->fields.sfmt_muls_b.f
2482 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2483 const IDESC * UNUSED idesc = abuf->idesc;
2484 int cycles = 0;
2485 {
2486 int referenced = 0;
2487 int UNUSED insn_referenced = abuf->written;
2488 cycles += crisv10f_model_crisv10_u_multiply (current_cpu, idesc, 0, referenced);
2489 }
2490 {
2491 int referenced = 0;
2492 int UNUSED insn_referenced = abuf->written;
2493 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2494 }
2495 return cycles;
2496 #undef FLD
2497 }
2498
2499 static int
2500 model_crisv10_mulu_w (SIM_CPU *current_cpu, void *sem_arg)
2501 {
2502 #define FLD(f) abuf->fields.sfmt_muls_b.f
2503 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2504 const IDESC * UNUSED idesc = abuf->idesc;
2505 int cycles = 0;
2506 {
2507 int referenced = 0;
2508 int UNUSED insn_referenced = abuf->written;
2509 cycles += crisv10f_model_crisv10_u_multiply (current_cpu, idesc, 0, referenced);
2510 }
2511 {
2512 int referenced = 0;
2513 int UNUSED insn_referenced = abuf->written;
2514 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2515 }
2516 return cycles;
2517 #undef FLD
2518 }
2519
2520 static int
2521 model_crisv10_mulu_d (SIM_CPU *current_cpu, void *sem_arg)
2522 {
2523 #define FLD(f) abuf->fields.sfmt_muls_b.f
2524 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2525 const IDESC * UNUSED idesc = abuf->idesc;
2526 int cycles = 0;
2527 {
2528 int referenced = 0;
2529 int UNUSED insn_referenced = abuf->written;
2530 cycles += crisv10f_model_crisv10_u_multiply (current_cpu, idesc, 0, referenced);
2531 }
2532 {
2533 int referenced = 0;
2534 int UNUSED insn_referenced = abuf->written;
2535 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2536 }
2537 return cycles;
2538 #undef FLD
2539 }
2540
2541 static int
2542 model_crisv10_mstep (SIM_CPU *current_cpu, void *sem_arg)
2543 {
2544 #define FLD(f) abuf->fields.sfmt_muls_b.f
2545 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2546 const IDESC * UNUSED idesc = abuf->idesc;
2547 int cycles = 0;
2548 {
2549 int referenced = 0;
2550 int UNUSED insn_referenced = abuf->written;
2551 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2552 }
2553 return cycles;
2554 #undef FLD
2555 }
2556
2557 static int
2558 model_crisv10_dstep (SIM_CPU *current_cpu, void *sem_arg)
2559 {
2560 #define FLD(f) abuf->fields.sfmt_muls_b.f
2561 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2562 const IDESC * UNUSED idesc = abuf->idesc;
2563 int cycles = 0;
2564 {
2565 int referenced = 0;
2566 int UNUSED insn_referenced = abuf->written;
2567 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2568 }
2569 return cycles;
2570 #undef FLD
2571 }
2572
2573 static int
2574 model_crisv10_abs (SIM_CPU *current_cpu, void *sem_arg)
2575 {
2576 #define FLD(f) abuf->fields.sfmt_muls_b.f
2577 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2578 const IDESC * UNUSED idesc = abuf->idesc;
2579 int cycles = 0;
2580 {
2581 int referenced = 0;
2582 int UNUSED insn_referenced = abuf->written;
2583 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2584 }
2585 return cycles;
2586 #undef FLD
2587 }
2588
2589 static int
2590 model_crisv10_and_b_r (SIM_CPU *current_cpu, void *sem_arg)
2591 {
2592 #define FLD(f) abuf->fields.sfmt_add_b_r.f
2593 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2594 const IDESC * UNUSED idesc = abuf->idesc;
2595 int cycles = 0;
2596 {
2597 int referenced = 0;
2598 int UNUSED insn_referenced = abuf->written;
2599 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2600 }
2601 return cycles;
2602 #undef FLD
2603 }
2604
2605 static int
2606 model_crisv10_and_w_r (SIM_CPU *current_cpu, void *sem_arg)
2607 {
2608 #define FLD(f) abuf->fields.sfmt_add_b_r.f
2609 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2610 const IDESC * UNUSED idesc = abuf->idesc;
2611 int cycles = 0;
2612 {
2613 int referenced = 0;
2614 int UNUSED insn_referenced = abuf->written;
2615 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2616 }
2617 return cycles;
2618 #undef FLD
2619 }
2620
2621 static int
2622 model_crisv10_and_d_r (SIM_CPU *current_cpu, void *sem_arg)
2623 {
2624 #define FLD(f) abuf->fields.sfmt_add_b_r.f
2625 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2626 const IDESC * UNUSED idesc = abuf->idesc;
2627 int cycles = 0;
2628 {
2629 int referenced = 0;
2630 int UNUSED insn_referenced = abuf->written;
2631 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2632 }
2633 return cycles;
2634 #undef FLD
2635 }
2636
2637 static int
2638 model_crisv10_and_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
2639 {
2640 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2641 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2642 const IDESC * UNUSED idesc = abuf->idesc;
2643 int cycles = 0;
2644 {
2645 int referenced = 0;
2646 int UNUSED insn_referenced = abuf->written;
2647 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2648 }
2649 {
2650 int referenced = 0;
2651 int UNUSED insn_referenced = abuf->written;
2652 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2653 }
2654 return cycles;
2655 #undef FLD
2656 }
2657
2658 static int
2659 model_crisv10_and_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
2660 {
2661 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2662 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2663 const IDESC * UNUSED idesc = abuf->idesc;
2664 int cycles = 0;
2665 {
2666 int referenced = 0;
2667 int UNUSED insn_referenced = abuf->written;
2668 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2669 }
2670 {
2671 int referenced = 0;
2672 int UNUSED insn_referenced = abuf->written;
2673 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2674 }
2675 return cycles;
2676 #undef FLD
2677 }
2678
2679 static int
2680 model_crisv10_and_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
2681 {
2682 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2683 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2684 const IDESC * UNUSED idesc = abuf->idesc;
2685 int cycles = 0;
2686 {
2687 int referenced = 0;
2688 int UNUSED insn_referenced = abuf->written;
2689 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2690 }
2691 {
2692 int referenced = 0;
2693 int UNUSED insn_referenced = abuf->written;
2694 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2695 }
2696 return cycles;
2697 #undef FLD
2698 }
2699
2700 static int
2701 model_crisv10_andcbr (SIM_CPU *current_cpu, void *sem_arg)
2702 {
2703 #define FLD(f) abuf->fields.sfmt_addcbr.f
2704 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2705 const IDESC * UNUSED idesc = abuf->idesc;
2706 int cycles = 0;
2707 {
2708 int referenced = 0;
2709 int UNUSED insn_referenced = abuf->written;
2710 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
2711 }
2712 {
2713 int referenced = 0;
2714 int UNUSED insn_referenced = abuf->written;
2715 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2716 }
2717 return cycles;
2718 #undef FLD
2719 }
2720
2721 static int
2722 model_crisv10_andcwr (SIM_CPU *current_cpu, void *sem_arg)
2723 {
2724 #define FLD(f) abuf->fields.sfmt_addcwr.f
2725 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2726 const IDESC * UNUSED idesc = abuf->idesc;
2727 int cycles = 0;
2728 {
2729 int referenced = 0;
2730 int UNUSED insn_referenced = abuf->written;
2731 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
2732 }
2733 {
2734 int referenced = 0;
2735 int UNUSED insn_referenced = abuf->written;
2736 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2737 }
2738 return cycles;
2739 #undef FLD
2740 }
2741
2742 static int
2743 model_crisv10_andcdr (SIM_CPU *current_cpu, void *sem_arg)
2744 {
2745 #define FLD(f) abuf->fields.sfmt_addcdr.f
2746 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2747 const IDESC * UNUSED idesc = abuf->idesc;
2748 int cycles = 0;
2749 {
2750 int referenced = 0;
2751 int UNUSED insn_referenced = abuf->written;
2752 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
2753 }
2754 {
2755 int referenced = 0;
2756 int UNUSED insn_referenced = abuf->written;
2757 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2758 }
2759 return cycles;
2760 #undef FLD
2761 }
2762
2763 static int
2764 model_crisv10_andq (SIM_CPU *current_cpu, void *sem_arg)
2765 {
2766 #define FLD(f) abuf->fields.sfmt_andq.f
2767 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2768 const IDESC * UNUSED idesc = abuf->idesc;
2769 int cycles = 0;
2770 {
2771 int referenced = 0;
2772 int UNUSED insn_referenced = abuf->written;
2773 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2774 }
2775 return cycles;
2776 #undef FLD
2777 }
2778
2779 static int
2780 model_crisv10_orr_b_r (SIM_CPU *current_cpu, void *sem_arg)
2781 {
2782 #define FLD(f) abuf->fields.sfmt_add_b_r.f
2783 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2784 const IDESC * UNUSED idesc = abuf->idesc;
2785 int cycles = 0;
2786 {
2787 int referenced = 0;
2788 int UNUSED insn_referenced = abuf->written;
2789 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2790 }
2791 return cycles;
2792 #undef FLD
2793 }
2794
2795 static int
2796 model_crisv10_orr_w_r (SIM_CPU *current_cpu, void *sem_arg)
2797 {
2798 #define FLD(f) abuf->fields.sfmt_add_b_r.f
2799 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2800 const IDESC * UNUSED idesc = abuf->idesc;
2801 int cycles = 0;
2802 {
2803 int referenced = 0;
2804 int UNUSED insn_referenced = abuf->written;
2805 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2806 }
2807 return cycles;
2808 #undef FLD
2809 }
2810
2811 static int
2812 model_crisv10_orr_d_r (SIM_CPU *current_cpu, void *sem_arg)
2813 {
2814 #define FLD(f) abuf->fields.sfmt_add_b_r.f
2815 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2816 const IDESC * UNUSED idesc = abuf->idesc;
2817 int cycles = 0;
2818 {
2819 int referenced = 0;
2820 int UNUSED insn_referenced = abuf->written;
2821 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2822 }
2823 return cycles;
2824 #undef FLD
2825 }
2826
2827 static int
2828 model_crisv10_or_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
2829 {
2830 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2831 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2832 const IDESC * UNUSED idesc = abuf->idesc;
2833 int cycles = 0;
2834 {
2835 int referenced = 0;
2836 int UNUSED insn_referenced = abuf->written;
2837 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2838 }
2839 {
2840 int referenced = 0;
2841 int UNUSED insn_referenced = abuf->written;
2842 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2843 }
2844 return cycles;
2845 #undef FLD
2846 }
2847
2848 static int
2849 model_crisv10_or_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
2850 {
2851 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2852 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2853 const IDESC * UNUSED idesc = abuf->idesc;
2854 int cycles = 0;
2855 {
2856 int referenced = 0;
2857 int UNUSED insn_referenced = abuf->written;
2858 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2859 }
2860 {
2861 int referenced = 0;
2862 int UNUSED insn_referenced = abuf->written;
2863 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2864 }
2865 return cycles;
2866 #undef FLD
2867 }
2868
2869 static int
2870 model_crisv10_or_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
2871 {
2872 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2873 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2874 const IDESC * UNUSED idesc = abuf->idesc;
2875 int cycles = 0;
2876 {
2877 int referenced = 0;
2878 int UNUSED insn_referenced = abuf->written;
2879 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
2880 }
2881 {
2882 int referenced = 0;
2883 int UNUSED insn_referenced = abuf->written;
2884 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2885 }
2886 return cycles;
2887 #undef FLD
2888 }
2889
2890 static int
2891 model_crisv10_orcbr (SIM_CPU *current_cpu, void *sem_arg)
2892 {
2893 #define FLD(f) abuf->fields.sfmt_addcbr.f
2894 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2895 const IDESC * UNUSED idesc = abuf->idesc;
2896 int cycles = 0;
2897 {
2898 int referenced = 0;
2899 int UNUSED insn_referenced = abuf->written;
2900 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
2901 }
2902 {
2903 int referenced = 0;
2904 int UNUSED insn_referenced = abuf->written;
2905 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2906 }
2907 return cycles;
2908 #undef FLD
2909 }
2910
2911 static int
2912 model_crisv10_orcwr (SIM_CPU *current_cpu, void *sem_arg)
2913 {
2914 #define FLD(f) abuf->fields.sfmt_addcwr.f
2915 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2916 const IDESC * UNUSED idesc = abuf->idesc;
2917 int cycles = 0;
2918 {
2919 int referenced = 0;
2920 int UNUSED insn_referenced = abuf->written;
2921 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
2922 }
2923 {
2924 int referenced = 0;
2925 int UNUSED insn_referenced = abuf->written;
2926 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2927 }
2928 return cycles;
2929 #undef FLD
2930 }
2931
2932 static int
2933 model_crisv10_orcdr (SIM_CPU *current_cpu, void *sem_arg)
2934 {
2935 #define FLD(f) abuf->fields.sfmt_addcdr.f
2936 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2937 const IDESC * UNUSED idesc = abuf->idesc;
2938 int cycles = 0;
2939 {
2940 int referenced = 0;
2941 int UNUSED insn_referenced = abuf->written;
2942 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
2943 }
2944 {
2945 int referenced = 0;
2946 int UNUSED insn_referenced = abuf->written;
2947 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
2948 }
2949 return cycles;
2950 #undef FLD
2951 }
2952
2953 static int
2954 model_crisv10_orq (SIM_CPU *current_cpu, void *sem_arg)
2955 {
2956 #define FLD(f) abuf->fields.sfmt_andq.f
2957 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2958 const IDESC * UNUSED idesc = abuf->idesc;
2959 int cycles = 0;
2960 {
2961 int referenced = 0;
2962 int UNUSED insn_referenced = abuf->written;
2963 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2964 }
2965 return cycles;
2966 #undef FLD
2967 }
2968
2969 static int
2970 model_crisv10_xor (SIM_CPU *current_cpu, void *sem_arg)
2971 {
2972 #define FLD(f) abuf->fields.sfmt_muls_b.f
2973 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2974 const IDESC * UNUSED idesc = abuf->idesc;
2975 int cycles = 0;
2976 {
2977 int referenced = 0;
2978 int UNUSED insn_referenced = abuf->written;
2979 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2980 }
2981 return cycles;
2982 #undef FLD
2983 }
2984
2985 static int
2986 model_crisv10_swap (SIM_CPU *current_cpu, void *sem_arg)
2987 {
2988 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
2989 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2990 const IDESC * UNUSED idesc = abuf->idesc;
2991 int cycles = 0;
2992 {
2993 int referenced = 0;
2994 int UNUSED insn_referenced = abuf->written;
2995 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
2996 }
2997 return cycles;
2998 #undef FLD
2999 }
3000
3001 static int
3002 model_crisv10_asrr_b_r (SIM_CPU *current_cpu, void *sem_arg)
3003 {
3004 #define FLD(f) abuf->fields.sfmt_add_b_r.f
3005 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3006 const IDESC * UNUSED idesc = abuf->idesc;
3007 int cycles = 0;
3008 {
3009 int referenced = 0;
3010 int UNUSED insn_referenced = abuf->written;
3011 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3012 }
3013 return cycles;
3014 #undef FLD
3015 }
3016
3017 static int
3018 model_crisv10_asrr_w_r (SIM_CPU *current_cpu, void *sem_arg)
3019 {
3020 #define FLD(f) abuf->fields.sfmt_add_b_r.f
3021 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3022 const IDESC * UNUSED idesc = abuf->idesc;
3023 int cycles = 0;
3024 {
3025 int referenced = 0;
3026 int UNUSED insn_referenced = abuf->written;
3027 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3028 }
3029 return cycles;
3030 #undef FLD
3031 }
3032
3033 static int
3034 model_crisv10_asrr_d_r (SIM_CPU *current_cpu, void *sem_arg)
3035 {
3036 #define FLD(f) abuf->fields.sfmt_add_b_r.f
3037 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3038 const IDESC * UNUSED idesc = abuf->idesc;
3039 int cycles = 0;
3040 {
3041 int referenced = 0;
3042 int UNUSED insn_referenced = abuf->written;
3043 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3044 }
3045 return cycles;
3046 #undef FLD
3047 }
3048
3049 static int
3050 model_crisv10_asrq (SIM_CPU *current_cpu, void *sem_arg)
3051 {
3052 #define FLD(f) abuf->fields.sfmt_asrq.f
3053 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3054 const IDESC * UNUSED idesc = abuf->idesc;
3055 int cycles = 0;
3056 {
3057 int referenced = 0;
3058 int UNUSED insn_referenced = abuf->written;
3059 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3060 }
3061 return cycles;
3062 #undef FLD
3063 }
3064
3065 static int
3066 model_crisv10_lsrr_b_r (SIM_CPU *current_cpu, void *sem_arg)
3067 {
3068 #define FLD(f) abuf->fields.sfmt_add_b_r.f
3069 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3070 const IDESC * UNUSED idesc = abuf->idesc;
3071 int cycles = 0;
3072 {
3073 int referenced = 0;
3074 int UNUSED insn_referenced = abuf->written;
3075 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3076 }
3077 return cycles;
3078 #undef FLD
3079 }
3080
3081 static int
3082 model_crisv10_lsrr_w_r (SIM_CPU *current_cpu, void *sem_arg)
3083 {
3084 #define FLD(f) abuf->fields.sfmt_add_b_r.f
3085 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3086 const IDESC * UNUSED idesc = abuf->idesc;
3087 int cycles = 0;
3088 {
3089 int referenced = 0;
3090 int UNUSED insn_referenced = abuf->written;
3091 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3092 }
3093 return cycles;
3094 #undef FLD
3095 }
3096
3097 static int
3098 model_crisv10_lsrr_d_r (SIM_CPU *current_cpu, void *sem_arg)
3099 {
3100 #define FLD(f) abuf->fields.sfmt_add_b_r.f
3101 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3102 const IDESC * UNUSED idesc = abuf->idesc;
3103 int cycles = 0;
3104 {
3105 int referenced = 0;
3106 int UNUSED insn_referenced = abuf->written;
3107 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3108 }
3109 return cycles;
3110 #undef FLD
3111 }
3112
3113 static int
3114 model_crisv10_lsrq (SIM_CPU *current_cpu, void *sem_arg)
3115 {
3116 #define FLD(f) abuf->fields.sfmt_asrq.f
3117 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3118 const IDESC * UNUSED idesc = abuf->idesc;
3119 int cycles = 0;
3120 {
3121 int referenced = 0;
3122 int UNUSED insn_referenced = abuf->written;
3123 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3124 }
3125 return cycles;
3126 #undef FLD
3127 }
3128
3129 static int
3130 model_crisv10_lslr_b_r (SIM_CPU *current_cpu, void *sem_arg)
3131 {
3132 #define FLD(f) abuf->fields.sfmt_add_b_r.f
3133 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3134 const IDESC * UNUSED idesc = abuf->idesc;
3135 int cycles = 0;
3136 {
3137 int referenced = 0;
3138 int UNUSED insn_referenced = abuf->written;
3139 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3140 }
3141 return cycles;
3142 #undef FLD
3143 }
3144
3145 static int
3146 model_crisv10_lslr_w_r (SIM_CPU *current_cpu, void *sem_arg)
3147 {
3148 #define FLD(f) abuf->fields.sfmt_add_b_r.f
3149 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3150 const IDESC * UNUSED idesc = abuf->idesc;
3151 int cycles = 0;
3152 {
3153 int referenced = 0;
3154 int UNUSED insn_referenced = abuf->written;
3155 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3156 }
3157 return cycles;
3158 #undef FLD
3159 }
3160
3161 static int
3162 model_crisv10_lslr_d_r (SIM_CPU *current_cpu, void *sem_arg)
3163 {
3164 #define FLD(f) abuf->fields.sfmt_add_b_r.f
3165 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3166 const IDESC * UNUSED idesc = abuf->idesc;
3167 int cycles = 0;
3168 {
3169 int referenced = 0;
3170 int UNUSED insn_referenced = abuf->written;
3171 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3172 }
3173 return cycles;
3174 #undef FLD
3175 }
3176
3177 static int
3178 model_crisv10_lslq (SIM_CPU *current_cpu, void *sem_arg)
3179 {
3180 #define FLD(f) abuf->fields.sfmt_asrq.f
3181 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3182 const IDESC * UNUSED idesc = abuf->idesc;
3183 int cycles = 0;
3184 {
3185 int referenced = 0;
3186 int UNUSED insn_referenced = abuf->written;
3187 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3188 }
3189 return cycles;
3190 #undef FLD
3191 }
3192
3193 static int
3194 model_crisv10_btst (SIM_CPU *current_cpu, void *sem_arg)
3195 {
3196 #define FLD(f) abuf->fields.sfmt_add_b_r.f
3197 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3198 const IDESC * UNUSED idesc = abuf->idesc;
3199 int cycles = 0;
3200 {
3201 int referenced = 0;
3202 int UNUSED insn_referenced = abuf->written;
3203 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3204 }
3205 return cycles;
3206 #undef FLD
3207 }
3208
3209 static int
3210 model_crisv10_btstq (SIM_CPU *current_cpu, void *sem_arg)
3211 {
3212 #define FLD(f) abuf->fields.sfmt_asrq.f
3213 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3214 const IDESC * UNUSED idesc = abuf->idesc;
3215 int cycles = 0;
3216 {
3217 int referenced = 0;
3218 int UNUSED insn_referenced = abuf->written;
3219 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3220 }
3221 return cycles;
3222 #undef FLD
3223 }
3224
3225 static int
3226 model_crisv10_setf (SIM_CPU *current_cpu, void *sem_arg)
3227 {
3228 #define FLD(f) abuf->fields.sfmt_setf.f
3229 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3230 const IDESC * UNUSED idesc = abuf->idesc;
3231 int cycles = 0;
3232 {
3233 int referenced = 0;
3234 int UNUSED insn_referenced = abuf->written;
3235 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3236 }
3237 return cycles;
3238 #undef FLD
3239 }
3240
3241 static int
3242 model_crisv10_clearf (SIM_CPU *current_cpu, void *sem_arg)
3243 {
3244 #define FLD(f) abuf->fields.sfmt_setf.f
3245 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3246 const IDESC * UNUSED idesc = abuf->idesc;
3247 int cycles = 0;
3248 {
3249 int referenced = 0;
3250 int UNUSED insn_referenced = abuf->written;
3251 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3252 }
3253 return cycles;
3254 #undef FLD
3255 }
3256
3257 static int
3258 model_crisv10_bcc_b (SIM_CPU *current_cpu, void *sem_arg)
3259 {
3260 #define FLD(f) abuf->fields.sfmt_bcc_b.f
3261 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3262 const IDESC * UNUSED idesc = abuf->idesc;
3263 int cycles = 0;
3264 {
3265 int referenced = 0;
3266 int UNUSED insn_referenced = abuf->written;
3267 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3268 }
3269 return cycles;
3270 #undef FLD
3271 }
3272
3273 static int
3274 model_crisv10_ba_b (SIM_CPU *current_cpu, void *sem_arg)
3275 {
3276 #define FLD(f) abuf->fields.sfmt_bcc_b.f
3277 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3278 const IDESC * UNUSED idesc = abuf->idesc;
3279 int cycles = 0;
3280 {
3281 int referenced = 0;
3282 int UNUSED insn_referenced = abuf->written;
3283 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3284 }
3285 return cycles;
3286 #undef FLD
3287 }
3288
3289 static int
3290 model_crisv10_bcc_w (SIM_CPU *current_cpu, void *sem_arg)
3291 {
3292 #define FLD(f) abuf->fields.sfmt_bcc_w.f
3293 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3294 const IDESC * UNUSED idesc = abuf->idesc;
3295 int cycles = 0;
3296 {
3297 int referenced = 0;
3298 int UNUSED insn_referenced = abuf->written;
3299 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
3300 }
3301 {
3302 int referenced = 0;
3303 int UNUSED insn_referenced = abuf->written;
3304 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3305 }
3306 return cycles;
3307 #undef FLD
3308 }
3309
3310 static int
3311 model_crisv10_ba_w (SIM_CPU *current_cpu, void *sem_arg)
3312 {
3313 #define FLD(f) abuf->fields.sfmt_bcc_w.f
3314 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3315 const IDESC * UNUSED idesc = abuf->idesc;
3316 int cycles = 0;
3317 {
3318 int referenced = 0;
3319 int UNUSED insn_referenced = abuf->written;
3320 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
3321 }
3322 {
3323 int referenced = 0;
3324 int UNUSED insn_referenced = abuf->written;
3325 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3326 }
3327 return cycles;
3328 #undef FLD
3329 }
3330
3331 static int
3332 model_crisv10_jump_r (SIM_CPU *current_cpu, void *sem_arg)
3333 {
3334 #define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
3335 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3336 const IDESC * UNUSED idesc = abuf->idesc;
3337 int cycles = 0;
3338 {
3339 int referenced = 0;
3340 int UNUSED insn_referenced = abuf->written;
3341 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3342 }
3343 return cycles;
3344 #undef FLD
3345 }
3346
3347 static int
3348 model_crisv10_jump_m (SIM_CPU *current_cpu, void *sem_arg)
3349 {
3350 #define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
3351 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3352 const IDESC * UNUSED idesc = abuf->idesc;
3353 int cycles = 0;
3354 {
3355 int referenced = 0;
3356 int UNUSED insn_referenced = abuf->written;
3357 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
3358 }
3359 {
3360 int referenced = 0;
3361 int UNUSED insn_referenced = abuf->written;
3362 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3363 }
3364 return cycles;
3365 #undef FLD
3366 }
3367
3368 static int
3369 model_crisv10_jump_c (SIM_CPU *current_cpu, void *sem_arg)
3370 {
3371 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
3372 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3373 const IDESC * UNUSED idesc = abuf->idesc;
3374 int cycles = 0;
3375 {
3376 int referenced = 0;
3377 int UNUSED insn_referenced = abuf->written;
3378 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
3379 }
3380 {
3381 int referenced = 0;
3382 int UNUSED insn_referenced = abuf->written;
3383 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3384 }
3385 return cycles;
3386 #undef FLD
3387 }
3388
3389 static int
3390 model_crisv10_break (SIM_CPU *current_cpu, void *sem_arg)
3391 {
3392 #define FLD(f) abuf->fields.sfmt_break.f
3393 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3394 const IDESC * UNUSED idesc = abuf->idesc;
3395 int cycles = 0;
3396 {
3397 int referenced = 0;
3398 int UNUSED insn_referenced = abuf->written;
3399 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3400 }
3401 return cycles;
3402 #undef FLD
3403 }
3404
3405 static int
3406 model_crisv10_bound_r_b_r (SIM_CPU *current_cpu, void *sem_arg)
3407 {
3408 #define FLD(f) abuf->fields.sfmt_muls_b.f
3409 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3410 const IDESC * UNUSED idesc = abuf->idesc;
3411 int cycles = 0;
3412 {
3413 int referenced = 0;
3414 int UNUSED insn_referenced = abuf->written;
3415 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3416 }
3417 return cycles;
3418 #undef FLD
3419 }
3420
3421 static int
3422 model_crisv10_bound_r_w_r (SIM_CPU *current_cpu, void *sem_arg)
3423 {
3424 #define FLD(f) abuf->fields.sfmt_muls_b.f
3425 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3426 const IDESC * UNUSED idesc = abuf->idesc;
3427 int cycles = 0;
3428 {
3429 int referenced = 0;
3430 int UNUSED insn_referenced = abuf->written;
3431 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3432 }
3433 return cycles;
3434 #undef FLD
3435 }
3436
3437 static int
3438 model_crisv10_bound_r_d_r (SIM_CPU *current_cpu, void *sem_arg)
3439 {
3440 #define FLD(f) abuf->fields.sfmt_muls_b.f
3441 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3442 const IDESC * UNUSED idesc = abuf->idesc;
3443 int cycles = 0;
3444 {
3445 int referenced = 0;
3446 int UNUSED insn_referenced = abuf->written;
3447 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3448 }
3449 return cycles;
3450 #undef FLD
3451 }
3452
3453 static int
3454 model_crisv10_bound_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
3455 {
3456 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
3457 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3458 const IDESC * UNUSED idesc = abuf->idesc;
3459 int cycles = 0;
3460 {
3461 int referenced = 0;
3462 int UNUSED insn_referenced = abuf->written;
3463 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
3464 }
3465 {
3466 int referenced = 0;
3467 int UNUSED insn_referenced = abuf->written;
3468 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3469 }
3470 return cycles;
3471 #undef FLD
3472 }
3473
3474 static int
3475 model_crisv10_bound_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
3476 {
3477 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
3478 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3479 const IDESC * UNUSED idesc = abuf->idesc;
3480 int cycles = 0;
3481 {
3482 int referenced = 0;
3483 int UNUSED insn_referenced = abuf->written;
3484 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
3485 }
3486 {
3487 int referenced = 0;
3488 int UNUSED insn_referenced = abuf->written;
3489 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3490 }
3491 return cycles;
3492 #undef FLD
3493 }
3494
3495 static int
3496 model_crisv10_bound_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
3497 {
3498 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
3499 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3500 const IDESC * UNUSED idesc = abuf->idesc;
3501 int cycles = 0;
3502 {
3503 int referenced = 0;
3504 int UNUSED insn_referenced = abuf->written;
3505 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
3506 }
3507 {
3508 int referenced = 0;
3509 int UNUSED insn_referenced = abuf->written;
3510 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3511 }
3512 return cycles;
3513 #undef FLD
3514 }
3515
3516 static int
3517 model_crisv10_bound_cb (SIM_CPU *current_cpu, void *sem_arg)
3518 {
3519 #define FLD(f) abuf->fields.sfmt_bound_cb.f
3520 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3521 const IDESC * UNUSED idesc = abuf->idesc;
3522 int cycles = 0;
3523 {
3524 int referenced = 0;
3525 int UNUSED insn_referenced = abuf->written;
3526 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
3527 }
3528 {
3529 int referenced = 0;
3530 int UNUSED insn_referenced = abuf->written;
3531 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3532 }
3533 return cycles;
3534 #undef FLD
3535 }
3536
3537 static int
3538 model_crisv10_bound_cw (SIM_CPU *current_cpu, void *sem_arg)
3539 {
3540 #define FLD(f) abuf->fields.sfmt_bound_cw.f
3541 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3542 const IDESC * UNUSED idesc = abuf->idesc;
3543 int cycles = 0;
3544 {
3545 int referenced = 0;
3546 int UNUSED insn_referenced = abuf->written;
3547 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
3548 }
3549 {
3550 int referenced = 0;
3551 int UNUSED insn_referenced = abuf->written;
3552 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3553 }
3554 return cycles;
3555 #undef FLD
3556 }
3557
3558 static int
3559 model_crisv10_bound_cd (SIM_CPU *current_cpu, void *sem_arg)
3560 {
3561 #define FLD(f) abuf->fields.sfmt_bound_cd.f
3562 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3563 const IDESC * UNUSED idesc = abuf->idesc;
3564 int cycles = 0;
3565 {
3566 int referenced = 0;
3567 int UNUSED insn_referenced = abuf->written;
3568 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
3569 }
3570 {
3571 int referenced = 0;
3572 int UNUSED insn_referenced = abuf->written;
3573 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3574 }
3575 return cycles;
3576 #undef FLD
3577 }
3578
3579 static int
3580 model_crisv10_scc (SIM_CPU *current_cpu, void *sem_arg)
3581 {
3582 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
3583 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3584 const IDESC * UNUSED idesc = abuf->idesc;
3585 int cycles = 0;
3586 {
3587 int referenced = 0;
3588 int UNUSED insn_referenced = abuf->written;
3589 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3590 }
3591 return cycles;
3592 #undef FLD
3593 }
3594
3595 static int
3596 model_crisv10_lz (SIM_CPU *current_cpu, void *sem_arg)
3597 {
3598 #define FLD(f) abuf->fields.sfmt_muls_b.f
3599 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3600 const IDESC * UNUSED idesc = abuf->idesc;
3601 int cycles = 0;
3602 {
3603 int referenced = 0;
3604 int UNUSED insn_referenced = abuf->written;
3605 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3606 }
3607 return cycles;
3608 #undef FLD
3609 }
3610
3611 static int
3612 model_crisv10_addoq (SIM_CPU *current_cpu, void *sem_arg)
3613 {
3614 #define FLD(f) abuf->fields.sfmt_addoq.f
3615 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3616 const IDESC * UNUSED idesc = abuf->idesc;
3617 int cycles = 0;
3618 {
3619 int referenced = 0;
3620 int UNUSED insn_referenced = abuf->written;
3621 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3622 }
3623 return cycles;
3624 #undef FLD
3625 }
3626
3627 static int
3628 model_crisv10_bdapqpc (SIM_CPU *current_cpu, void *sem_arg)
3629 {
3630 #define FLD(f) abuf->fields.sfmt_addoq.f
3631 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3632 const IDESC * UNUSED idesc = abuf->idesc;
3633 int cycles = 0;
3634 {
3635 int referenced = 0;
3636 int UNUSED insn_referenced = abuf->written;
3637 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3638 }
3639 return cycles;
3640 #undef FLD
3641 }
3642
3643 static int
3644 model_crisv10_addo_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
3645 {
3646 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
3647 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3648 const IDESC * UNUSED idesc = abuf->idesc;
3649 int cycles = 0;
3650 {
3651 int referenced = 0;
3652 int UNUSED insn_referenced = abuf->written;
3653 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
3654 }
3655 {
3656 int referenced = 0;
3657 int UNUSED insn_referenced = abuf->written;
3658 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3659 }
3660 return cycles;
3661 #undef FLD
3662 }
3663
3664 static int
3665 model_crisv10_addo_m_w_m (SIM_CPU *current_cpu, void *sem_arg)
3666 {
3667 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
3668 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3669 const IDESC * UNUSED idesc = abuf->idesc;
3670 int cycles = 0;
3671 {
3672 int referenced = 0;
3673 int UNUSED insn_referenced = abuf->written;
3674 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
3675 }
3676 {
3677 int referenced = 0;
3678 int UNUSED insn_referenced = abuf->written;
3679 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3680 }
3681 return cycles;
3682 #undef FLD
3683 }
3684
3685 static int
3686 model_crisv10_addo_m_d_m (SIM_CPU *current_cpu, void *sem_arg)
3687 {
3688 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
3689 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3690 const IDESC * UNUSED idesc = abuf->idesc;
3691 int cycles = 0;
3692 {
3693 int referenced = 0;
3694 int UNUSED insn_referenced = abuf->written;
3695 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
3696 }
3697 {
3698 int referenced = 0;
3699 int UNUSED insn_referenced = abuf->written;
3700 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3701 }
3702 return cycles;
3703 #undef FLD
3704 }
3705
3706 static int
3707 model_crisv10_addo_cb (SIM_CPU *current_cpu, void *sem_arg)
3708 {
3709 #define FLD(f) abuf->fields.sfmt_bound_cb.f
3710 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3711 const IDESC * UNUSED idesc = abuf->idesc;
3712 int cycles = 0;
3713 {
3714 int referenced = 0;
3715 int UNUSED insn_referenced = abuf->written;
3716 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
3717 }
3718 {
3719 int referenced = 0;
3720 int UNUSED insn_referenced = abuf->written;
3721 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3722 }
3723 return cycles;
3724 #undef FLD
3725 }
3726
3727 static int
3728 model_crisv10_addo_cw (SIM_CPU *current_cpu, void *sem_arg)
3729 {
3730 #define FLD(f) abuf->fields.sfmt_bound_cw.f
3731 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3732 const IDESC * UNUSED idesc = abuf->idesc;
3733 int cycles = 0;
3734 {
3735 int referenced = 0;
3736 int UNUSED insn_referenced = abuf->written;
3737 cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
3738 }
3739 {
3740 int referenced = 0;
3741 int UNUSED insn_referenced = abuf->written;
3742 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3743 }
3744 return cycles;
3745 #undef FLD
3746 }
3747
3748 static int
3749 model_crisv10_addo_cd (SIM_CPU *current_cpu, void *sem_arg)
3750 {
3751 #define FLD(f) abuf->fields.sfmt_bound_cd.f
3752 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3753 const IDESC * UNUSED idesc = abuf->idesc;
3754 int cycles = 0;
3755 {
3756 int referenced = 0;
3757 int UNUSED insn_referenced = abuf->written;
3758 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
3759 }
3760 {
3761 int referenced = 0;
3762 int UNUSED insn_referenced = abuf->written;
3763 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3764 }
3765 return cycles;
3766 #undef FLD
3767 }
3768
3769 static int
3770 model_crisv10_dip_m (SIM_CPU *current_cpu, void *sem_arg)
3771 {
3772 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
3773 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3774 const IDESC * UNUSED idesc = abuf->idesc;
3775 int cycles = 0;
3776 {
3777 int referenced = 0;
3778 int UNUSED insn_referenced = abuf->written;
3779 cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
3780 }
3781 {
3782 int referenced = 0;
3783 int UNUSED insn_referenced = abuf->written;
3784 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3785 }
3786 return cycles;
3787 #undef FLD
3788 }
3789
3790 static int
3791 model_crisv10_dip_c (SIM_CPU *current_cpu, void *sem_arg)
3792 {
3793 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
3794 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3795 const IDESC * UNUSED idesc = abuf->idesc;
3796 int cycles = 0;
3797 {
3798 int referenced = 0;
3799 int UNUSED insn_referenced = abuf->written;
3800 cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
3801 }
3802 {
3803 int referenced = 0;
3804 int UNUSED insn_referenced = abuf->written;
3805 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
3806 }
3807 return cycles;
3808 #undef FLD
3809 }
3810
3811 static int
3812 model_crisv10_addi_acr_b_r (SIM_CPU *current_cpu, void *sem_arg)
3813 {
3814 #define FLD(f) abuf->fields.sfmt_add_b_r.f
3815 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3816 const IDESC * UNUSED idesc = abuf->idesc;
3817 int cycles = 0;
3818 {
3819 int referenced = 0;
3820 int UNUSED insn_referenced = abuf->written;
3821 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3822 }
3823 return cycles;
3824 #undef FLD
3825 }
3826
3827 static int
3828 model_crisv10_addi_acr_w_r (SIM_CPU *current_cpu, void *sem_arg)
3829 {
3830 #define FLD(f) abuf->fields.sfmt_add_b_r.f
3831 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3832 const IDESC * UNUSED idesc = abuf->idesc;
3833 int cycles = 0;
3834 {
3835 int referenced = 0;
3836 int UNUSED insn_referenced = abuf->written;
3837 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3838 }
3839 return cycles;
3840 #undef FLD
3841 }
3842
3843 static int
3844 model_crisv10_addi_acr_d_r (SIM_CPU *current_cpu, void *sem_arg)
3845 {
3846 #define FLD(f) abuf->fields.sfmt_add_b_r.f
3847 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3848 const IDESC * UNUSED idesc = abuf->idesc;
3849 int cycles = 0;
3850 {
3851 int referenced = 0;
3852 int UNUSED insn_referenced = abuf->written;
3853 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3854 }
3855 return cycles;
3856 #undef FLD
3857 }
3858
3859 static int
3860 model_crisv10_biap_pc_b_r (SIM_CPU *current_cpu, void *sem_arg)
3861 {
3862 #define FLD(f) abuf->fields.sfmt_addoq.f
3863 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3864 const IDESC * UNUSED idesc = abuf->idesc;
3865 int cycles = 0;
3866 {
3867 int referenced = 0;
3868 int UNUSED insn_referenced = abuf->written;
3869 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3870 }
3871 return cycles;
3872 #undef FLD
3873 }
3874
3875 static int
3876 model_crisv10_biap_pc_w_r (SIM_CPU *current_cpu, void *sem_arg)
3877 {
3878 #define FLD(f) abuf->fields.sfmt_addoq.f
3879 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3880 const IDESC * UNUSED idesc = abuf->idesc;
3881 int cycles = 0;
3882 {
3883 int referenced = 0;
3884 int UNUSED insn_referenced = abuf->written;
3885 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3886 }
3887 return cycles;
3888 #undef FLD
3889 }
3890
3891 static int
3892 model_crisv10_biap_pc_d_r (SIM_CPU *current_cpu, void *sem_arg)
3893 {
3894 #define FLD(f) abuf->fields.sfmt_addoq.f
3895 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3896 const IDESC * UNUSED idesc = abuf->idesc;
3897 int cycles = 0;
3898 {
3899 int referenced = 0;
3900 int UNUSED insn_referenced = abuf->written;
3901 cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 0, referenced);
3902 }
3903 return cycles;
3904 #undef FLD
3905 }
3906
3907 /* We assume UNIT_NONE == 0 because the tables don't always terminate
3908 entries with it. */
3909
3910 /* Model timing data for `crisv10'. */
3911
3912 static const INSN_TIMING crisv10_timing[] = {
3913 { CRISV10F_INSN_X_INVALID, 0, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3914 { CRISV10F_INSN_X_AFTER, 0, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3915 { CRISV10F_INSN_X_BEFORE, 0, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3916 { CRISV10F_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3917 { CRISV10F_INSN_X_CHAIN, 0, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3918 { CRISV10F_INSN_X_BEGIN, 0, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3919 { CRISV10F_INSN_NOP, model_crisv10_nop, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3920 { CRISV10F_INSN_MOVE_B_R, model_crisv10_move_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3921 { CRISV10F_INSN_MOVE_W_R, model_crisv10_move_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3922 { CRISV10F_INSN_MOVE_D_R, model_crisv10_move_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3923 { CRISV10F_INSN_MOVEPCR, model_crisv10_movepcr, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3924 { CRISV10F_INSN_MOVEQ, model_crisv10_moveq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3925 { CRISV10F_INSN_MOVS_B_R, model_crisv10_movs_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3926 { CRISV10F_INSN_MOVS_W_R, model_crisv10_movs_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3927 { CRISV10F_INSN_MOVU_B_R, model_crisv10_movu_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3928 { CRISV10F_INSN_MOVU_W_R, model_crisv10_movu_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3929 { CRISV10F_INSN_MOVECBR, model_crisv10_movecbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3930 { CRISV10F_INSN_MOVECWR, model_crisv10_movecwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3931 { CRISV10F_INSN_MOVECDR, model_crisv10_movecdr, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3932 { CRISV10F_INSN_MOVSCBR, model_crisv10_movscbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3933 { CRISV10F_INSN_MOVSCWR, model_crisv10_movscwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3934 { CRISV10F_INSN_MOVUCBR, model_crisv10_movucbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3935 { CRISV10F_INSN_MOVUCWR, model_crisv10_movucwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3936 { CRISV10F_INSN_ADDQ, model_crisv10_addq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3937 { CRISV10F_INSN_SUBQ, model_crisv10_subq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3938 { CRISV10F_INSN_CMP_R_B_R, model_crisv10_cmp_r_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3939 { CRISV10F_INSN_CMP_R_W_R, model_crisv10_cmp_r_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3940 { CRISV10F_INSN_CMP_R_D_R, model_crisv10_cmp_r_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3941 { CRISV10F_INSN_CMP_M_B_M, model_crisv10_cmp_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3942 { CRISV10F_INSN_CMP_M_W_M, model_crisv10_cmp_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3943 { CRISV10F_INSN_CMP_M_D_M, model_crisv10_cmp_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3944 { CRISV10F_INSN_CMPCBR, model_crisv10_cmpcbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3945 { CRISV10F_INSN_CMPCWR, model_crisv10_cmpcwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3946 { CRISV10F_INSN_CMPCDR, model_crisv10_cmpcdr, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3947 { CRISV10F_INSN_CMPQ, model_crisv10_cmpq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3948 { CRISV10F_INSN_CMPS_M_B_M, model_crisv10_cmps_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3949 { CRISV10F_INSN_CMPS_M_W_M, model_crisv10_cmps_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3950 { CRISV10F_INSN_CMPSCBR, model_crisv10_cmpscbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3951 { CRISV10F_INSN_CMPSCWR, model_crisv10_cmpscwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3952 { CRISV10F_INSN_CMPU_M_B_M, model_crisv10_cmpu_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3953 { CRISV10F_INSN_CMPU_M_W_M, model_crisv10_cmpu_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3954 { CRISV10F_INSN_CMPUCBR, model_crisv10_cmpucbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3955 { CRISV10F_INSN_CMPUCWR, model_crisv10_cmpucwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3956 { CRISV10F_INSN_MOVE_M_B_M, model_crisv10_move_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3957 { CRISV10F_INSN_MOVE_M_W_M, model_crisv10_move_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3958 { CRISV10F_INSN_MOVE_M_D_M, model_crisv10_move_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3959 { CRISV10F_INSN_MOVS_M_B_M, model_crisv10_movs_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3960 { CRISV10F_INSN_MOVS_M_W_M, model_crisv10_movs_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3961 { CRISV10F_INSN_MOVU_M_B_M, model_crisv10_movu_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3962 { CRISV10F_INSN_MOVU_M_W_M, model_crisv10_movu_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3963 { CRISV10F_INSN_MOVE_R_SPRV10, model_crisv10_move_r_sprv10, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3964 { CRISV10F_INSN_MOVE_SPR_RV10, model_crisv10_move_spr_rv10, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3965 { CRISV10F_INSN_RET_TYPE, model_crisv10_ret_type, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3966 { CRISV10F_INSN_MOVE_M_SPRV10, model_crisv10_move_m_sprv10, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3967 { CRISV10F_INSN_MOVE_C_SPRV10_P0, model_crisv10_move_c_sprv10_p0, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3968 { CRISV10F_INSN_MOVE_C_SPRV10_P1, model_crisv10_move_c_sprv10_p1, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3969 { CRISV10F_INSN_MOVE_C_SPRV10_P4, model_crisv10_move_c_sprv10_p4, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3970 { CRISV10F_INSN_MOVE_C_SPRV10_P5, model_crisv10_move_c_sprv10_p5, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3971 { CRISV10F_INSN_MOVE_C_SPRV10_P8, model_crisv10_move_c_sprv10_p8, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3972 { CRISV10F_INSN_MOVE_C_SPRV10_P9, model_crisv10_move_c_sprv10_p9, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3973 { CRISV10F_INSN_MOVE_C_SPRV10_P10, model_crisv10_move_c_sprv10_p10, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3974 { CRISV10F_INSN_MOVE_C_SPRV10_P11, model_crisv10_move_c_sprv10_p11, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3975 { CRISV10F_INSN_MOVE_C_SPRV10_P12, model_crisv10_move_c_sprv10_p12, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3976 { CRISV10F_INSN_MOVE_C_SPRV10_P13, model_crisv10_move_c_sprv10_p13, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3977 { CRISV10F_INSN_MOVE_C_SPRV10_P7, model_crisv10_move_c_sprv10_p7, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3978 { CRISV10F_INSN_MOVE_C_SPRV10_P14, model_crisv10_move_c_sprv10_p14, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3979 { CRISV10F_INSN_MOVE_C_SPRV10_P15, model_crisv10_move_c_sprv10_p15, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3980 { CRISV10F_INSN_MOVE_SPR_MV10, model_crisv10_move_spr_mv10, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3981 { CRISV10F_INSN_SBFS, model_crisv10_sbfs, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3982 { CRISV10F_INSN_MOVEM_R_M, model_crisv10_movem_r_m, { { (int) UNIT_CRISV10_U_MOVEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3983 { CRISV10F_INSN_MOVEM_M_R, model_crisv10_movem_m_r, { { (int) UNIT_CRISV10_U_MOVEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3984 { CRISV10F_INSN_MOVEM_M_PC, model_crisv10_movem_m_pc, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3985 { CRISV10F_INSN_ADD_B_R, model_crisv10_add_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3986 { CRISV10F_INSN_ADD_W_R, model_crisv10_add_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3987 { CRISV10F_INSN_ADD_D_R, model_crisv10_add_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3988 { CRISV10F_INSN_ADD_M_B_M, model_crisv10_add_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3989 { CRISV10F_INSN_ADD_M_W_M, model_crisv10_add_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3990 { CRISV10F_INSN_ADD_M_D_M, model_crisv10_add_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3991 { CRISV10F_INSN_ADDCBR, model_crisv10_addcbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3992 { CRISV10F_INSN_ADDCWR, model_crisv10_addcwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3993 { CRISV10F_INSN_ADDCDR, model_crisv10_addcdr, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3994 { CRISV10F_INSN_ADDCPC, model_crisv10_addcpc, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_STALL, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3995 { CRISV10F_INSN_ADDS_B_R, model_crisv10_adds_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3996 { CRISV10F_INSN_ADDS_W_R, model_crisv10_adds_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3997 { CRISV10F_INSN_ADDS_M_B_M, model_crisv10_adds_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3998 { CRISV10F_INSN_ADDS_M_W_M, model_crisv10_adds_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
3999 { CRISV10F_INSN_ADDSCBR, model_crisv10_addscbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4000 { CRISV10F_INSN_ADDSCWR, model_crisv10_addscwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4001 { CRISV10F_INSN_ADDSPCPC, model_crisv10_addspcpc, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_STALL, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4002 { CRISV10F_INSN_ADDU_B_R, model_crisv10_addu_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4003 { CRISV10F_INSN_ADDU_W_R, model_crisv10_addu_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4004 { CRISV10F_INSN_ADDU_M_B_M, model_crisv10_addu_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4005 { CRISV10F_INSN_ADDU_M_W_M, model_crisv10_addu_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4006 { CRISV10F_INSN_ADDUCBR, model_crisv10_adducbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4007 { CRISV10F_INSN_ADDUCWR, model_crisv10_adducwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4008 { CRISV10F_INSN_SUB_B_R, model_crisv10_sub_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4009 { CRISV10F_INSN_SUB_W_R, model_crisv10_sub_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4010 { CRISV10F_INSN_SUB_D_R, model_crisv10_sub_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4011 { CRISV10F_INSN_SUB_M_B_M, model_crisv10_sub_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4012 { CRISV10F_INSN_SUB_M_W_M, model_crisv10_sub_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4013 { CRISV10F_INSN_SUB_M_D_M, model_crisv10_sub_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4014 { CRISV10F_INSN_SUBCBR, model_crisv10_subcbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4015 { CRISV10F_INSN_SUBCWR, model_crisv10_subcwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4016 { CRISV10F_INSN_SUBCDR, model_crisv10_subcdr, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4017 { CRISV10F_INSN_SUBS_B_R, model_crisv10_subs_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4018 { CRISV10F_INSN_SUBS_W_R, model_crisv10_subs_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4019 { CRISV10F_INSN_SUBS_M_B_M, model_crisv10_subs_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4020 { CRISV10F_INSN_SUBS_M_W_M, model_crisv10_subs_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4021 { CRISV10F_INSN_SUBSCBR, model_crisv10_subscbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4022 { CRISV10F_INSN_SUBSCWR, model_crisv10_subscwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4023 { CRISV10F_INSN_SUBU_B_R, model_crisv10_subu_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4024 { CRISV10F_INSN_SUBU_W_R, model_crisv10_subu_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4025 { CRISV10F_INSN_SUBU_M_B_M, model_crisv10_subu_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4026 { CRISV10F_INSN_SUBU_M_W_M, model_crisv10_subu_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4027 { CRISV10F_INSN_SUBUCBR, model_crisv10_subucbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4028 { CRISV10F_INSN_SUBUCWR, model_crisv10_subucwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4029 { CRISV10F_INSN_ADDI_B_R, model_crisv10_addi_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4030 { CRISV10F_INSN_ADDI_W_R, model_crisv10_addi_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4031 { CRISV10F_INSN_ADDI_D_R, model_crisv10_addi_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4032 { CRISV10F_INSN_NEG_B_R, model_crisv10_neg_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4033 { CRISV10F_INSN_NEG_W_R, model_crisv10_neg_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4034 { CRISV10F_INSN_NEG_D_R, model_crisv10_neg_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4035 { CRISV10F_INSN_TEST_M_B_M, model_crisv10_test_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4036 { CRISV10F_INSN_TEST_M_W_M, model_crisv10_test_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4037 { CRISV10F_INSN_TEST_M_D_M, model_crisv10_test_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4038 { CRISV10F_INSN_MOVE_R_M_B_M, model_crisv10_move_r_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4039 { CRISV10F_INSN_MOVE_R_M_W_M, model_crisv10_move_r_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4040 { CRISV10F_INSN_MOVE_R_M_D_M, model_crisv10_move_r_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4041 { CRISV10F_INSN_MULS_B, model_crisv10_muls_b, { { (int) UNIT_CRISV10_U_MULTIPLY, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4042 { CRISV10F_INSN_MULS_W, model_crisv10_muls_w, { { (int) UNIT_CRISV10_U_MULTIPLY, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4043 { CRISV10F_INSN_MULS_D, model_crisv10_muls_d, { { (int) UNIT_CRISV10_U_MULTIPLY, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4044 { CRISV10F_INSN_MULU_B, model_crisv10_mulu_b, { { (int) UNIT_CRISV10_U_MULTIPLY, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4045 { CRISV10F_INSN_MULU_W, model_crisv10_mulu_w, { { (int) UNIT_CRISV10_U_MULTIPLY, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4046 { CRISV10F_INSN_MULU_D, model_crisv10_mulu_d, { { (int) UNIT_CRISV10_U_MULTIPLY, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4047 { CRISV10F_INSN_MSTEP, model_crisv10_mstep, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4048 { CRISV10F_INSN_DSTEP, model_crisv10_dstep, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4049 { CRISV10F_INSN_ABS, model_crisv10_abs, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4050 { CRISV10F_INSN_AND_B_R, model_crisv10_and_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4051 { CRISV10F_INSN_AND_W_R, model_crisv10_and_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4052 { CRISV10F_INSN_AND_D_R, model_crisv10_and_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4053 { CRISV10F_INSN_AND_M_B_M, model_crisv10_and_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4054 { CRISV10F_INSN_AND_M_W_M, model_crisv10_and_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4055 { CRISV10F_INSN_AND_M_D_M, model_crisv10_and_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4056 { CRISV10F_INSN_ANDCBR, model_crisv10_andcbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4057 { CRISV10F_INSN_ANDCWR, model_crisv10_andcwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4058 { CRISV10F_INSN_ANDCDR, model_crisv10_andcdr, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4059 { CRISV10F_INSN_ANDQ, model_crisv10_andq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4060 { CRISV10F_INSN_ORR_B_R, model_crisv10_orr_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4061 { CRISV10F_INSN_ORR_W_R, model_crisv10_orr_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4062 { CRISV10F_INSN_ORR_D_R, model_crisv10_orr_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4063 { CRISV10F_INSN_OR_M_B_M, model_crisv10_or_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4064 { CRISV10F_INSN_OR_M_W_M, model_crisv10_or_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4065 { CRISV10F_INSN_OR_M_D_M, model_crisv10_or_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4066 { CRISV10F_INSN_ORCBR, model_crisv10_orcbr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4067 { CRISV10F_INSN_ORCWR, model_crisv10_orcwr, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4068 { CRISV10F_INSN_ORCDR, model_crisv10_orcdr, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4069 { CRISV10F_INSN_ORQ, model_crisv10_orq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4070 { CRISV10F_INSN_XOR, model_crisv10_xor, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4071 { CRISV10F_INSN_SWAP, model_crisv10_swap, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4072 { CRISV10F_INSN_ASRR_B_R, model_crisv10_asrr_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4073 { CRISV10F_INSN_ASRR_W_R, model_crisv10_asrr_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4074 { CRISV10F_INSN_ASRR_D_R, model_crisv10_asrr_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4075 { CRISV10F_INSN_ASRQ, model_crisv10_asrq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4076 { CRISV10F_INSN_LSRR_B_R, model_crisv10_lsrr_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4077 { CRISV10F_INSN_LSRR_W_R, model_crisv10_lsrr_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4078 { CRISV10F_INSN_LSRR_D_R, model_crisv10_lsrr_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4079 { CRISV10F_INSN_LSRQ, model_crisv10_lsrq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4080 { CRISV10F_INSN_LSLR_B_R, model_crisv10_lslr_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4081 { CRISV10F_INSN_LSLR_W_R, model_crisv10_lslr_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4082 { CRISV10F_INSN_LSLR_D_R, model_crisv10_lslr_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4083 { CRISV10F_INSN_LSLQ, model_crisv10_lslq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4084 { CRISV10F_INSN_BTST, model_crisv10_btst, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4085 { CRISV10F_INSN_BTSTQ, model_crisv10_btstq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4086 { CRISV10F_INSN_SETF, model_crisv10_setf, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4087 { CRISV10F_INSN_CLEARF, model_crisv10_clearf, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4088 { CRISV10F_INSN_BCC_B, model_crisv10_bcc_b, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4089 { CRISV10F_INSN_BA_B, model_crisv10_ba_b, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4090 { CRISV10F_INSN_BCC_W, model_crisv10_bcc_w, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4091 { CRISV10F_INSN_BA_W, model_crisv10_ba_w, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4092 { CRISV10F_INSN_JUMP_R, model_crisv10_jump_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4093 { CRISV10F_INSN_JUMP_M, model_crisv10_jump_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4094 { CRISV10F_INSN_JUMP_C, model_crisv10_jump_c, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4095 { CRISV10F_INSN_BREAK, model_crisv10_break, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4096 { CRISV10F_INSN_BOUND_R_B_R, model_crisv10_bound_r_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4097 { CRISV10F_INSN_BOUND_R_W_R, model_crisv10_bound_r_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4098 { CRISV10F_INSN_BOUND_R_D_R, model_crisv10_bound_r_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4099 { CRISV10F_INSN_BOUND_M_B_M, model_crisv10_bound_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4100 { CRISV10F_INSN_BOUND_M_W_M, model_crisv10_bound_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4101 { CRISV10F_INSN_BOUND_M_D_M, model_crisv10_bound_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4102 { CRISV10F_INSN_BOUND_CB, model_crisv10_bound_cb, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4103 { CRISV10F_INSN_BOUND_CW, model_crisv10_bound_cw, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4104 { CRISV10F_INSN_BOUND_CD, model_crisv10_bound_cd, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4105 { CRISV10F_INSN_SCC, model_crisv10_scc, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4106 { CRISV10F_INSN_LZ, model_crisv10_lz, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4107 { CRISV10F_INSN_ADDOQ, model_crisv10_addoq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4108 { CRISV10F_INSN_BDAPQPC, model_crisv10_bdapqpc, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4109 { CRISV10F_INSN_ADDO_M_B_M, model_crisv10_addo_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4110 { CRISV10F_INSN_ADDO_M_W_M, model_crisv10_addo_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4111 { CRISV10F_INSN_ADDO_M_D_M, model_crisv10_addo_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4112 { CRISV10F_INSN_ADDO_CB, model_crisv10_addo_cb, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4113 { CRISV10F_INSN_ADDO_CW, model_crisv10_addo_cw, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4114 { CRISV10F_INSN_ADDO_CD, model_crisv10_addo_cd, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4115 { CRISV10F_INSN_DIP_M, model_crisv10_dip_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4116 { CRISV10F_INSN_DIP_C, model_crisv10_dip_c, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4117 { CRISV10F_INSN_ADDI_ACR_B_R, model_crisv10_addi_acr_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4118 { CRISV10F_INSN_ADDI_ACR_W_R, model_crisv10_addi_acr_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4119 { CRISV10F_INSN_ADDI_ACR_D_R, model_crisv10_addi_acr_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4120 { CRISV10F_INSN_BIAP_PC_B_R, model_crisv10_biap_pc_b_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4121 { CRISV10F_INSN_BIAP_PC_W_R, model_crisv10_biap_pc_w_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4122 { CRISV10F_INSN_BIAP_PC_D_R, model_crisv10_biap_pc_d_r, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
4123 };
4124
4125 #endif /* WITH_PROFILE_MODEL_P */
4126
4127 static void
4128 crisv10_model_init (SIM_CPU *cpu)
4129 {
4130 CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_CRISV10_DATA));
4131 }
4132
4133 #if WITH_PROFILE_MODEL_P
4134 #define TIMING_DATA(td) td
4135 #else
4136 #define TIMING_DATA(td) 0
4137 #endif
4138
4139 static const MODEL crisv10_models[] =
4140 {
4141 { "crisv10", & crisv10_mach, MODEL_CRISV10, TIMING_DATA (& crisv10_timing[0]), crisv10_model_init },
4142 { 0 }
4143 };
4144
4145 /* The properties of this cpu's implementation. */
4146
4147 static const MACH_IMP_PROPERTIES crisv10f_imp_properties =
4148 {
4149 sizeof (SIM_CPU),
4150 #if WITH_SCACHE
4151 sizeof (SCACHE)
4152 #else
4153 0
4154 #endif
4155 };
4156
4157
4158 static void
4159 crisv10f_prepare_run (SIM_CPU *cpu)
4160 {
4161 if (CPU_IDESC (cpu) == NULL)
4162 crisv10f_init_idesc_table (cpu);
4163 }
4164
4165 static const CGEN_INSN *
4166 crisv10f_get_idata (SIM_CPU *cpu, int inum)
4167 {
4168 return CPU_IDESC (cpu) [inum].idata;
4169 }
4170
4171 static void
4172 crisv10_init_cpu (SIM_CPU *cpu)
4173 {
4174 CPU_REG_FETCH (cpu) = crisv10f_fetch_register;
4175 CPU_REG_STORE (cpu) = crisv10f_store_register;
4176 CPU_PC_FETCH (cpu) = crisv10f_h_pc_get;
4177 CPU_PC_STORE (cpu) = crisv10f_h_pc_set;
4178 CPU_GET_IDATA (cpu) = crisv10f_get_idata;
4179 CPU_MAX_INSNS (cpu) = CRISV10F_INSN__MAX;
4180 CPU_INSN_NAME (cpu) = cgen_insn_name;
4181 CPU_FULL_ENGINE_FN (cpu) = crisv10f_engine_run_full;
4182 #if WITH_FAST
4183 CPU_FAST_ENGINE_FN (cpu) = crisv10f_engine_run_fast;
4184 #else
4185 CPU_FAST_ENGINE_FN (cpu) = crisv10f_engine_run_full;
4186 #endif
4187 }
4188
4189 const MACH crisv10_mach =
4190 {
4191 "crisv10", "cris", MACH_CRISV10,
4192 32, 32, & crisv10_models[0], & crisv10f_imp_properties,
4193 crisv10_init_cpu,
4194 crisv10f_prepare_run
4195 };
4196