]>
git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - sim/d10v/interp.c
1ad4692cb45fb79baaf431b6183db19f1f55e3ff
5 #include "remote-sim.h"
9 #define IMEM_SIZE 18 /* D10V instruction memory size is 18 bits */
10 #define DMEM_SIZE 16 /* Data memory is 64K (but only 32K internal RAM) */
11 #define UMEM_SIZE 17 /* each unified memory region is 17 bits */
13 enum _leftright
{ LEFT_FIRST
, RIGHT_FIRST
};
16 static SIM_OPEN_KIND sim_kind
;
18 host_callback
*d10v_callback
;
19 unsigned long ins_type_counters
[ (int)INS_MAX
];
23 static int init_text_p
= 0;
24 /* non-zero if we opened prog_bfd */
25 static int prog_bfd_was_opened_p
;
31 static long hash
PARAMS ((long insn
, int format
));
32 static struct hash_entry
*lookup_hash
PARAMS ((uint32 ins
, int size
));
33 static void get_operands
PARAMS ((struct simops
*s
, uint32 ins
));
34 static void do_long
PARAMS ((uint32 ins
));
35 static void do_2_short
PARAMS ((uint16 ins1
, uint16 ins2
, enum _leftright leftright
));
36 static void do_parallel
PARAMS ((uint16 ins1
, uint16 ins2
));
37 static char *add_commas
PARAMS ((char *buf
, int sizeof_buf
, unsigned long value
));
38 static void init_system
PARAMS ((void));
39 extern void sim_set_profile
PARAMS ((int n
));
40 extern void sim_set_profile_size
PARAMS ((int n
));
43 #if defined(__GNUC__) && defined(__OPTIMIZE__)
44 #define INLINE __inline__
53 struct hash_entry
*next
;
60 struct hash_entry hash_table
[MAX_HASH
+1];
67 if (format
& LONG_OPCODE
)
68 return ((insn
& 0x3F000000) >> 24);
70 return((insn
& 0x7E00) >> 9);
73 INLINE
static struct hash_entry
*
74 lookup_hash (ins
, size
)
81 h
= &hash_table
[(ins
& 0x3F000000) >> 24];
83 h
= &hash_table
[(ins
& 0x7E00) >> 9];
85 while ((ins
& h
->mask
) != h
->opcode
|| h
->size
!= size
)
89 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR looking up hash for %x at PC %x\n",ins
, PC
);
98 get_operands (struct simops
*s
, uint32 ins
)
100 int i
, shift
, bits
, flags
;
102 for (i
=0; i
< s
->numops
; i
++)
104 shift
= s
->operands
[3*i
];
105 bits
= s
->operands
[3*i
+1];
106 flags
= s
->operands
[3*i
+2];
107 mask
= 0x7FFFFFFF >> (31 - bits
);
108 OP
[i
] = (ins
>> shift
) & mask
;
119 for (s
= prog_bfd
->sections
; s
; s
= s
->next
)
120 if (strcmp (bfd_get_section_name (prog_bfd
, s
), ".text") == 0)
123 text_start
= bfd_get_section_vma (prog_bfd
, s
);
124 text_end
= text_start
+ bfd_section_size (prog_bfd
, s
);
129 return (PC
<< 2) + text_start
;
136 struct hash_entry
*h
;
138 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
139 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_long 0x%x\n", ins
);
141 h
= lookup_hash (ins
, 1);
142 get_operands (h
->ops
, ins
);
143 State
.ins_type
= INS_LONG
;
144 ins_type_counters
[ (int)State
.ins_type
]++;
149 do_2_short (ins1
, ins2
, leftright
)
151 enum _leftright leftright
;
153 struct hash_entry
*h
;
155 enum _ins_type first
, second
;
158 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
159 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_2_short 0x%x (%s) -> 0x%x\n",
160 ins1
, (leftright
) ? "left" : "right", ins2
);
163 if (leftright
== LEFT_FIRST
)
167 ins_type_counters
[ (int)INS_LEFTRIGHT
]++;
173 ins_type_counters
[ (int)INS_RIGHTLEFT
]++;
176 h
= lookup_hash (ins1
, 0);
177 get_operands (h
->ops
, ins1
);
178 State
.ins_type
= first
;
179 ins_type_counters
[ (int)State
.ins_type
]++;
182 /* If the PC has changed (ie, a jump), don't do the second instruction */
183 if (orig_pc
== PC
&& !State
.exception
)
185 h
= lookup_hash (ins2
, 0);
186 get_operands (h
->ops
, ins2
);
187 State
.ins_type
= second
;
188 ins_type_counters
[ (int)State
.ins_type
]++;
189 ins_type_counters
[ (int)INS_CYCLES
]++;
192 else if (orig_pc
!= PC
&& !State
.exception
)
193 ins_type_counters
[ (int)INS_COND_JUMP
]++;
197 do_parallel (ins1
, ins2
)
200 struct hash_entry
*h1
, *h2
;
202 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
203 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_parallel 0x%x || 0x%x\n", ins1
, ins2
);
205 ins_type_counters
[ (int)INS_PARALLEL
]++;
206 h1
= lookup_hash (ins1
, 0);
207 h2
= lookup_hash (ins2
, 0);
209 if (h1
->ops
->exec_type
== PARONLY
)
211 get_operands (h1
->ops
, ins1
);
212 State
.ins_type
= INS_LEFT_COND_TEST
;
213 ins_type_counters
[ (int)State
.ins_type
]++;
217 ins_type_counters
[ (int)INS_COND_TRUE
]++;
218 get_operands (h2
->ops
, ins2
);
219 State
.ins_type
= INS_RIGHT_COND_EXE
;
220 ins_type_counters
[ (int)State
.ins_type
]++;
224 ins_type_counters
[ (int)INS_COND_FALSE
]++;
226 else if (h2
->ops
->exec_type
== PARONLY
)
228 get_operands (h2
->ops
, ins2
);
229 State
.ins_type
= INS_RIGHT_COND_TEST
;
230 ins_type_counters
[ (int)State
.ins_type
]++;
234 ins_type_counters
[ (int)INS_COND_TRUE
]++;
235 get_operands (h1
->ops
, ins1
);
236 State
.ins_type
= INS_LEFT_COND_EXE
;
237 ins_type_counters
[ (int)State
.ins_type
]++;
241 ins_type_counters
[ (int)INS_COND_FALSE
]++;
245 get_operands (h1
->ops
, ins1
);
246 State
.ins_type
= INS_LEFT_PARALLEL
;
247 ins_type_counters
[ (int)State
.ins_type
]++;
249 if (!State
.exception
)
251 get_operands (h2
->ops
, ins2
);
252 State
.ins_type
= INS_RIGHT_PARALLEL
;
253 ins_type_counters
[ (int)State
.ins_type
]++;
260 add_commas(buf
, sizeof_buf
, value
)
266 char *endbuf
= buf
+ sizeof_buf
- 1;
276 *--endbuf
= (value
% 10) + '0';
277 } while ((value
/= 10) != 0);
295 free (State
.umem
[i
]);
296 State
.umem
[i
] = NULL
;
303 State
.imem
= (uint8
*)calloc(1,1<<IMEM_SIZE
);
304 State
.dmem
= (uint8
*)calloc(1,1<<DMEM_SIZE
);
306 State
.umem
[i
] = NULL
;
307 State
.umem
[0] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
308 State
.umem
[1] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
309 State
.umem
[2] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
310 State
.umem
[127] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
311 if (!State
.imem
|| !State
.dmem
|| !State
.umem
[0] || !State
.umem
[1] || !State
.umem
[2] || !State
.umem
[127] )
313 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Memory allocation failed.\n");
322 if ((d10v_debug
& DEBUG_MEMSIZE
) != 0)
325 (*d10v_callback
->printf_filtered
) (d10v_callback
,
326 "Allocated %s bytes instruction memory and\n",
327 add_commas (buffer
, sizeof (buffer
), (1UL<<IMEM_SIZE
)));
329 (*d10v_callback
->printf_filtered
) (d10v_callback
, " %s bytes data memory.\n",
330 add_commas (buffer
, sizeof (buffer
), (1UL<<IMEM_SIZE
)));
343 xfer_mem (addr
, buffer
, size
, write
)
345 unsigned char *buffer
;
353 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
356 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_write %d bytes to 0x%x\n", size
, addr
);
358 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_read %d bytes from 0x%x\n", size
, addr
);
362 /* to access data, we use the following mapping */
363 /* 0x01000000 - 0x0103ffff : instruction memory */
364 /* 0x02000000 - 0x0200ffff : data memory */
365 /* 0x00000000 - 0x00ffffff : unified memory */
367 if ( (addr
& 0x03000000) == 0)
371 segment
= addr
>> UMEM_SIZE
;
373 if (!State
.umem
[segment
])
376 (*d10v_callback
->printf_filtered
) (d10v_callback
,"Allocating %s bytes unified memory to region %d\n",
377 add_commas (buffer
, sizeof (buffer
), (1UL<<IMEM_SIZE
)), segment
);
379 State
.umem
[segment
] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
381 if (!State
.umem
[segment
])
383 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Memory allocation failed.\n");
386 /* FIXME: need to check size and read/write multiple segments if necessary */
388 memcpy (State
.umem
[segment
]+addr
, buffer
, size
) ;
390 memcpy (buffer
, State
.umem
[segment
]+addr
, size
);
392 else if ( (addr
& 0x03000000) == 0x02000000)
396 if (size
> (1<<(DMEM_SIZE
-1)))
398 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: data section is only %d bytes.\n",1<<(DMEM_SIZE
-1));
402 memcpy (State
.dmem
+addr
, buffer
, size
);
404 memcpy (buffer
, State
.dmem
+addr
, size
);
406 else if ( (addr
& 0x03000000) == 0x01000000)
408 /* INSTRUCTION MEMORY */
410 if (size
> (1<<IMEM_SIZE
))
412 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: inst section is only %d bytes.\n",1<<IMEM_SIZE
);
416 memcpy (State
.imem
+addr
, buffer
, size
);
418 memcpy (buffer
, State
.imem
+addr
, size
);
422 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: address 0x%x is not in valid range\n",addr
);
423 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Instruction addresses start at 0x01000000\n");
424 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Data addresses start at 0x02000000\n");
425 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Unified addresses start at 0x00000000\n");
436 sim_write_phys (sd
, addr
, buffer
, size
)
439 unsigned char *buffer
;
442 return xfer_mem( addr
, buffer
, size
, 1);
446 sim_write (sd
, addr
, buffer
, size
)
449 unsigned char *buffer
;
452 /* FIXME: this should be performing a virtual transfer */
453 return xfer_mem( addr
, buffer
, size
, 1);
457 sim_read (sd
, addr
, buffer
, size
)
460 unsigned char *buffer
;
463 /* FIXME: this should be performing a virtual transfer */
464 return xfer_mem( addr
, buffer
, size
, 0);
469 sim_open (kind
, callback
, abfd
, argv
)
471 host_callback
*callback
;
476 struct hash_entry
*h
;
477 static int init_p
= 0;
481 d10v_callback
= callback
;
484 for (p
= argv
+ 1; *p
; ++p
)
487 if (strcmp (*p
, "-t") == 0)
491 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: unsupported option(s): %s\n",*p
);
494 /* put all the opcodes in the hash table */
497 for (s
= Simops
; s
->func
; s
++)
499 h
= &hash_table
[hash(s
->opcode
,s
->format
)];
501 /* go to the last entry in the chain */
507 h
->next
= (struct hash_entry
*) calloc(1,sizeof(struct hash_entry
));
509 perror ("malloc failure");
515 h
->opcode
= s
->opcode
;
516 h
->size
= s
->is_long
;
520 /* Fudge our descriptor. */
526 sim_close (sd
, quitting
)
530 if (prog_bfd
!= NULL
&& prog_bfd_was_opened_p
)
531 bfd_close (prog_bfd
);
538 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_set_profile %d\n",n
);
542 sim_set_profile_size (n
)
545 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_set_profile_size %d\n",n
);
559 if ( (addr
& 0xfff0) != 0xff00)
561 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Data address 0x%lx is in I/O space, pc = 0x%lx.\n",
562 (long)addr
, (long)decode_pc ());
563 State
.exception
= SIGBUS
;
566 return State
.dmem
+ addr
;
573 /* instruction memory */
574 return (DMAP
& 0xf) * 0x4000 + State
.imem
;
577 /* this is ugly because we allocate unified memory in 128K segments and */
578 /* dmap addresses 16k segments */
579 seg
= (DMAP
& 0x3ff) >> 3;
580 if (State
.umem
[seg
] == NULL
)
582 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: unified memory region %d unmapped, pc = 0x%lx\n",
583 seg
, (long)decode_pc ());
584 State
.exception
= SIGBUS
;
586 return State
.umem
[seg
] + (DMAP
& 7) * 0x4000;
589 return State
.dmem
+ addr
;
596 uint32 pc
= ((uint32
)PC
) << 2;
605 return State
.imem
+ pc
;
607 if (State
.umem
[imap
& 0xff] == NULL
)
609 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: unified memory region %d unmapped, pc = 0x%lx\n",
610 imap
& 0xff, (long)PC
);
611 State
.exception
= SIGBUS
;
615 /* Discard upper bit(s) of PC in case IMAP1 selects unified memory. */
616 pc
&= (1 << UMEM_SIZE
) - 1;
618 return State
.umem
[imap
& 0xff] + pc
;
622 static int stop_simulator
= 0;
633 /* Run (or resume) the program. */
635 sim_resume (sd
, step
, siggnal
)
641 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
648 inst
= get_longword( pc_addr() );
649 State
.pc_changed
= 0;
650 ins_type_counters
[ (int)INS_CYCLES
]++;
651 switch (inst
& 0xC0000000)
654 /* long instruction */
655 do_long (inst
& 0x3FFFFFFF);
659 do_2_short ( inst
& 0x7FFF, (inst
& 0x3FFF8000) >> 15, RIGHT_FIRST
);
663 do_2_short ((inst
& 0x3FFF8000) >> 15, inst
& 0x7FFF, LEFT_FIRST
);
666 do_parallel ((inst
& 0x3FFF8000) >> 15, inst
& 0x7FFF);
670 /* calculate the next PC */
671 if (!State
.pc_changed
)
673 if (State
.RP
&& PC
== RPT_E
)
675 /* Note: The behavour of a branch instruction at RPT_E
676 is implementation dependant, this simulator takes the
677 branch. Branching to RPT_E is valid, the instruction
678 must be executed before the loop is taken. */
692 while ( !State
.exception
&& !stop_simulator
);
694 if (step
&& !State
.exception
)
695 State
.exception
= SIGTRAP
;
705 sim_resume (sd
, 0, 0);
710 sim_info (sd
, verbose
)
719 unsigned long left
= ins_type_counters
[ (int)INS_LEFT
] + ins_type_counters
[ (int)INS_LEFT_COND_EXE
];
720 unsigned long left_nops
= ins_type_counters
[ (int)INS_LEFT_NOPS
];
721 unsigned long left_parallel
= ins_type_counters
[ (int)INS_LEFT_PARALLEL
];
722 unsigned long left_cond
= ins_type_counters
[ (int)INS_LEFT_COND_TEST
];
723 unsigned long left_total
= left
+ left_parallel
+ left_cond
+ left_nops
;
725 unsigned long right
= ins_type_counters
[ (int)INS_RIGHT
] + ins_type_counters
[ (int)INS_RIGHT_COND_EXE
];
726 unsigned long right_nops
= ins_type_counters
[ (int)INS_RIGHT_NOPS
];
727 unsigned long right_parallel
= ins_type_counters
[ (int)INS_RIGHT_PARALLEL
];
728 unsigned long right_cond
= ins_type_counters
[ (int)INS_RIGHT_COND_TEST
];
729 unsigned long right_total
= right
+ right_parallel
+ right_cond
+ right_nops
;
731 unsigned long unknown
= ins_type_counters
[ (int)INS_UNKNOWN
];
732 unsigned long ins_long
= ins_type_counters
[ (int)INS_LONG
];
733 unsigned long parallel
= ins_type_counters
[ (int)INS_PARALLEL
];
734 unsigned long leftright
= ins_type_counters
[ (int)INS_LEFTRIGHT
];
735 unsigned long rightleft
= ins_type_counters
[ (int)INS_RIGHTLEFT
];
736 unsigned long cond_true
= ins_type_counters
[ (int)INS_COND_TRUE
];
737 unsigned long cond_false
= ins_type_counters
[ (int)INS_COND_FALSE
];
738 unsigned long cond_jump
= ins_type_counters
[ (int)INS_COND_JUMP
];
739 unsigned long cycles
= ins_type_counters
[ (int)INS_CYCLES
];
740 unsigned long total
= (unknown
+ left_total
+ right_total
+ ins_long
);
742 int size
= strlen (add_commas (buf1
, sizeof (buf1
), total
));
743 int parallel_size
= strlen (add_commas (buf1
, sizeof (buf1
),
744 (left_parallel
> right_parallel
) ? left_parallel
: right_parallel
));
745 int cond_size
= strlen (add_commas (buf1
, sizeof (buf1
), (left_cond
> right_cond
) ? left_cond
: right_cond
));
746 int nop_size
= strlen (add_commas (buf1
, sizeof (buf1
), (left_nops
> right_nops
) ? left_nops
: right_nops
));
747 int normal_size
= strlen (add_commas (buf1
, sizeof (buf1
), (left
> right
) ? left
: right
));
749 (*d10v_callback
->printf_filtered
) (d10v_callback
,
750 "executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
751 size
, add_commas (buf1
, sizeof (buf1
), left_total
),
752 normal_size
, add_commas (buf2
, sizeof (buf2
), left
),
753 parallel_size
, add_commas (buf3
, sizeof (buf3
), left_parallel
),
754 cond_size
, add_commas (buf4
, sizeof (buf4
), left_cond
),
755 nop_size
, add_commas (buf5
, sizeof (buf5
), left_nops
));
757 (*d10v_callback
->printf_filtered
) (d10v_callback
,
758 "executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
759 size
, add_commas (buf1
, sizeof (buf1
), right_total
),
760 normal_size
, add_commas (buf2
, sizeof (buf2
), right
),
761 parallel_size
, add_commas (buf3
, sizeof (buf3
), right_parallel
),
762 cond_size
, add_commas (buf4
, sizeof (buf4
), right_cond
),
763 nop_size
, add_commas (buf5
, sizeof (buf5
), right_nops
));
766 (*d10v_callback
->printf_filtered
) (d10v_callback
,
767 "executed %*s long instruction(s)\n",
768 size
, add_commas (buf1
, sizeof (buf1
), ins_long
));
771 (*d10v_callback
->printf_filtered
) (d10v_callback
,
772 "executed %*s parallel instruction(s)\n",
773 size
, add_commas (buf1
, sizeof (buf1
), parallel
));
776 (*d10v_callback
->printf_filtered
) (d10v_callback
,
777 "executed %*s instruction(s) encoded L->R\n",
778 size
, add_commas (buf1
, sizeof (buf1
), leftright
));
781 (*d10v_callback
->printf_filtered
) (d10v_callback
,
782 "executed %*s instruction(s) encoded R->L\n",
783 size
, add_commas (buf1
, sizeof (buf1
), rightleft
));
786 (*d10v_callback
->printf_filtered
) (d10v_callback
,
787 "executed %*s unknown instruction(s)\n",
788 size
, add_commas (buf1
, sizeof (buf1
), unknown
));
791 (*d10v_callback
->printf_filtered
) (d10v_callback
,
792 "executed %*s instruction(s) due to EXExxx condition being true\n",
793 size
, add_commas (buf1
, sizeof (buf1
), cond_true
));
796 (*d10v_callback
->printf_filtered
) (d10v_callback
,
797 "skipped %*s instruction(s) due to EXExxx condition being false\n",
798 size
, add_commas (buf1
, sizeof (buf1
), cond_false
));
801 (*d10v_callback
->printf_filtered
) (d10v_callback
,
802 "skipped %*s instruction(s) due to conditional branch succeeding\n",
803 size
, add_commas (buf1
, sizeof (buf1
), cond_jump
));
805 (*d10v_callback
->printf_filtered
) (d10v_callback
,
806 "executed %*s cycle(s)\n",
807 size
, add_commas (buf1
, sizeof (buf1
), cycles
));
809 (*d10v_callback
->printf_filtered
) (d10v_callback
,
810 "executed %*s total instructions\n",
811 size
, add_commas (buf1
, sizeof (buf1
), total
));
815 sim_create_inferior (sd
, abfd
, argv
, env
)
821 bfd_vma start_address
;
823 /* reset all state information */
824 memset (&State
.regs
, 0, (int)&State
.imem
- (int)&State
.regs
[0]);
828 start_address
= bfd_get_start_address (prog_bfd
);
830 start_address
= 0xffc0 << 2;
833 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_create_inferior: PC=0x%lx\n", (long) start_address
);
835 PC
= start_address
>> 2;
837 /* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board */
838 /* resets imap0 and imap1 to 0x1000. */
849 sim_set_callbacks (p
)
856 sim_stop_reason (sd
, reason
, sigrc
)
858 enum sim_stop
*reason
;
861 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */
863 switch (State
.exception
)
865 case SIG_D10V_STOP
: /* stop instruction */
866 *reason
= sim_exited
;
870 case SIG_D10V_EXIT
: /* exit trap */
871 *reason
= sim_exited
;
872 *sigrc
= State
.regs
[2];
875 default: /* some signal */
876 *reason
= sim_stopped
;
877 if (stop_simulator
&& !State
.exception
)
880 *sigrc
= State
.exception
;
888 sim_fetch_register (sd
, rn
, memory
)
891 unsigned char *memory
;
897 WRITE_64 (memory
, State
.a
[rn
-35]);
899 WRITE_16 (memory
, IMAP0
);
901 WRITE_16 (memory
, IMAP1
);
903 WRITE_16 (memory
, DMAP
);
905 WRITE_16 (memory
, State
.regs
[rn
]);
909 sim_store_register (sd
, rn
, memory
)
912 unsigned char *memory
;
918 State
.a
[rn
-35] = READ_64 (memory
) & MASK40
;
920 SET_DMAP( READ_16(memory
) );
922 SET_IMAP1( READ_16(memory
) );
924 SET_IMAP0( READ_16(memory
) );
926 State
.regs
[rn
]= READ_16 (memory
);
931 sim_do_command (sd
, cmd
)
935 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_do_command: %s\n",cmd
);
939 sim_load (sd
, prog
, abfd
, from_tty
)
945 extern bfd
*sim_load_file (); /* ??? Don't know where this should live. */
947 if (prog_bfd
!= NULL
&& prog_bfd_was_opened_p
)
948 bfd_close (prog_bfd
);
949 prog_bfd
= sim_load_file (sd
, myname
, d10v_callback
, prog
, abfd
,
950 sim_kind
== SIM_OPEN_DEBUG
,
952 if (prog_bfd
== NULL
)
954 prog_bfd_was_opened_p
= abfd
== NULL
;