1 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
3 * configure: Regenerated.
5 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
7 * configure: Regenerated.
9 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
11 * configure: Regenerated.
13 2005-03-23 Mark Kettenis <kettenis@gnu.org>
15 * configure: Regenerate.
17 2005-02-21 Corinna Vinschen <vinschen@redhat.com>
19 * iq2000.c: Eliminate need to include gdb/sim-iq2000.h.
21 2005-02-18 Corinna Vinschen <vinschen@redhat.com>
23 * configure.ac: Rename from configure.in and pull up to autoconf 2.59.
24 * configure: Regenerate.
26 2002-03-18 Jeff Johnston <jjohnstn@redhat.com>
28 * sem-switch.c: Regenerated.
31 2002-01-28 Jeff Johnston <jjohnstn@redhat.com>
33 * arch.c: Regenerated.
41 * sem-switch.c: Ditto.
44 2001-11-16 Jeff Johnston <jjohnstn@redhat.com>
46 * decode.c: Regenerated after putting orui into machine-specific
50 * sem-switch.c: Ditto.
53 2001-11-13 Jeff Johnston <jjohnstn@redhat.com>
55 * cpu.h: Regenerated after changing jump and branch operands
56 so that no bit masking is performed.
58 * iq2000.c (get_h_pc): Change to return h_pc directly.
59 (set_h_pc): Change to always set the insn mask bit.
60 * sim-if.c (iq2000bf_disassemble_insn): Change to pass the
62 (sim_create_inferior): Changed so starting address is taken
63 directly from link. If not specified, start address is
64 0 with insn mask set on.
66 2001-11-08 Jeff Johnston <jjohnstn@redhat.com>
68 * cpu.h: Regenerated after making jump operand UINT.
71 2001-10-31 Jeff Johnston <jjohnstn@redhat.com>
73 * sem-switch.c: Regenerated after fixing lb, lbu, lh, lw,
74 sb, sh, and sw insns handling of offset operand.
77 2001-10-30 Jeff Johnston <jjohnstn@redhat.com>
82 * sem-switch.c: Ditto.
84 * iq2000.c (get_h_pc): New routine.
86 (fetch_str): Translate cpu data addresses to data area.
88 (iq2000bf_fetch_register): Use get_h_pc.
89 (iq2000bf_store_register): Use set_h_pc.
90 * mloop.in: Change all calls to GETIMEMxxx to use CPU2INSN
91 on the pc value passed first.
92 * sim-if.c (iq2000bf_disassemble_insn): New function.
93 (sim_open): Add extra memory region for insn memory vs data memory.
94 Also change disassembler to be iq2000bf_disassemble_insn.
95 (sim_create_inferior): Translate start address using INSN2CPU macro.
96 * sim-main.h (CPU2INSN, CPU2DATA, INSN2CPU, DATA2CPU): New macros
97 to translate between Harvard and cpu addresses.
99 2001-10-26 Jeff Johnston <jjohnstn@redhat.com>
101 * sem-switch.c: Regenerated after reverting addiu
105 2001-10-25 Jeff Johnston <jjohnstn@redhat.com>
107 * Makefile.in: Add -UHAVE_CPU_IQ10 for time-being until
108 iq10 simulator merged here.
109 * cpu.h: Regenerated after fixing addiu insn.
114 * sem-switch.c: Ditto.
117 2001-09-12 Stan Cox <scox@redhat.com>
119 * iq2000/{cpu.c, cpu.h, decode.c, decode.h, model.c, sem-switch.c,
121 * iq2000.c (do_syscall): Support system traps.
123 2001-07-05 Ben Elliston <bje@redhat.com>
125 * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR).
126 (stamp-cpu): Likewise.
128 2001-04-02 Ben Elliston <bje@redhat.com>
130 * arch.c, arch.h: Regnerate to track recent cgen improvements.
131 * cpu.c, cpu.h, cpuall.h, decode.c, decode.h: Likewise.
132 * model.c, sem-switch.c, sem.c: Likewise.
134 2001-01-22 Ben Elliston <bje@redhat.com>
136 * cpu.h, decode.c, decode.h, model.c: Regenerate.
137 * sem.c, sem-switch.c: Likewise.
139 * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Regenerate.
140 * decode.c, decode.h, model.c, sem.c, sem-switch.c: Likewise.
142 2000-07-05 Ben Elliston <bje@redhat.com>
144 * configure: Regenerated to track ../common/aclocal.m4 changes.
146 2000-07-04 Ben Elliston <bje@redhat.com>
148 * sem.c, sem-switch.c: Regenerate.
150 * iq2000.c (do_break): Use sim_engine_halt ().
151 * arch.c, decode.c, decode.h, sem.c, sem-switch.c: Regenerate.
153 2000-07-03 Ben Elliston <bje@redhat.com>
155 * iq2000.c (do_syscall): Examine syscall register (nominally %11).
156 (do_break): Handle breakpoints.
157 * tconfig.in (SIM_HAVE_BREAKPOINTS): Define.
158 (SIM_BREAKPOINT, SIM_BREAKPOINT_SIZE): Likewise.
160 2000-06-29 Andrew Cagney <cagney@redhat.com>
162 * iq2000.c (iq2000bf_fetch_register): Implement.
163 (iq2000bf_store_register): Ditto.
165 2000-05-17 Ben Elliston <bje@redhat.com>
167 * mloop.in (extract-simple, extract-scache): Use SEM_SKIP_COMPILE
168 to set the skip count for the (skip ..) rtx.
169 (extract-pbb): Likewise.
170 (extract-pbb): Include the delay slot instruction of all CTI
171 instructions in the pbb, not just those that may nullify their
172 delay slot (eg. likely branches).
174 * sem.c, sem-switch.c: Regenerate.
176 2000-05-16 Ben Elliston <bje@redhat.com>
178 * arch.c, cpu.c, cpu.h, decode.c, decode.h: Regenerate.
179 * sem.c, sem-switch.c: Likewise.
180 * mloop.in (extract-pbb): Prohibit branch instructions in the
181 delay slot of branch likely instructions.
183 2000-05-16 Ben Elliston <bje@redhat.com>
185 * Makefile.in: New file.
186 * configure.in: Ditto.
188 * config.in, configure: Generate.
189 * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Ditto.
190 * decode.c, decode.h: Ditto.
191 * model.c, sem-switch.c, sem.c: Ditto.
192 * mloop.in: New file.
194 * iq2000-sim.h: Ditto.