]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - sim/m32r/sim-if.c
sim: enable silent rules in common builds
[thirdparty/binutils-gdb.git] / sim / m32r / sim-if.c
1 /* Main simulator entry points specific to the M32R.
2 Copyright (C) 1996-2021 Free Software Foundation, Inc.
3 Contributed by Cygnus Support.
4
5 This file is part of GDB, the GNU debugger.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 /* This must come before any other includes. */
21 #include "defs.h"
22
23 #include "sim-main.h"
24 #include "sim-options.h"
25 #include "libiberty.h"
26 #include "bfd.h"
27
28 #include <string.h>
29 #include <stdlib.h>
30
31 #include "dv-m32r_uart.h"
32
33 static void free_state (SIM_DESC);
34 static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
35 \f
36 /* Cover function of sim_state_free to free the cpu buffers as well. */
37
38 static void
39 free_state (SIM_DESC sd)
40 {
41 if (STATE_MODULES (sd) != NULL)
42 sim_module_uninstall (sd);
43 sim_cpu_free_all (sd);
44 sim_state_free (sd);
45 }
46
47 /* Create an instance of the simulator. */
48
49 SIM_DESC
50 sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd,
51 char * const *argv)
52 {
53 SIM_DESC sd = sim_state_alloc (kind, callback);
54 char c;
55 int i;
56
57 /* Set default options before parsing user options. */
58 current_alignment = STRICT_ALIGNMENT;
59
60 /* The cpu data is kept in a separately allocated chunk of memory. */
61 if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
62 {
63 free_state (sd);
64 return 0;
65 }
66
67 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
68 {
69 free_state (sd);
70 return 0;
71 }
72
73 /* The parser will print an error message for us, so we silently return. */
74 if (sim_parse_args (sd, argv) != SIM_RC_OK)
75 {
76 free_state (sd);
77 return 0;
78 }
79
80 /* Allocate a handler for the control registers and other devices
81 if no memory for that range has been allocated by the user.
82 All are allocated in one chunk to keep things from being
83 unnecessarily complicated.
84 TODO: Move these to the sim-model framework. */
85 sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR, 0x100);
86 sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
87
88 /* Allocate core managed memory if none specified by user.
89 Use address 4 here in case the user wanted address 0 unmapped. */
90 if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
91 sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
92
93 /* check for/establish the reference program image */
94 if (sim_analyze_program (sd,
95 (STATE_PROG_ARGV (sd) != NULL
96 ? *STATE_PROG_ARGV (sd)
97 : NULL),
98 abfd) != SIM_RC_OK)
99 {
100 free_state (sd);
101 return 0;
102 }
103
104 /* Establish any remaining configuration options. */
105 if (sim_config (sd) != SIM_RC_OK)
106 {
107 free_state (sd);
108 return 0;
109 }
110
111 if (sim_post_argv_init (sd) != SIM_RC_OK)
112 {
113 free_state (sd);
114 return 0;
115 }
116
117 /* Open a copy of the cpu descriptor table. */
118 {
119 CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
120 CGEN_ENDIAN_BIG);
121 for (i = 0; i < MAX_NR_PROCESSORS; ++i)
122 {
123 SIM_CPU *cpu = STATE_CPU (sd, i);
124 CPU_CPU_DESC (cpu) = cd;
125 CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
126 }
127 m32r_cgen_init_dis (cd);
128 }
129
130 for (c = 0; c < MAX_NR_PROCESSORS; ++c)
131 {
132 /* Only needed for profiling, but the structure member is small. */
133 memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
134 sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
135 /* Hook in callback for reporting these stats */
136 PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
137 = print_m32r_misc_cpu;
138 }
139
140 return sd;
141 }
142 \f
143 SIM_RC
144 sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char * const *argv,
145 char * const *envp)
146 {
147 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
148 SIM_ADDR addr;
149
150 if (abfd != NULL)
151 addr = bfd_get_start_address (abfd);
152 else
153 addr = 0;
154 sim_pc_set (current_cpu, addr);
155
156 #ifdef M32R_LINUX
157 m32rbf_h_cr_set (current_cpu,
158 m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
159 m32rbf_h_cr_set (current_cpu,
160 m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
161 #endif
162
163 /* Standalone mode (i.e. `run`) will take care of the argv for us in
164 sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim'
165 with `gdb`), we need to handle it because the user can change the
166 argv on the fly via gdb's 'run'. */
167 if (STATE_PROG_ARGV (sd) != argv)
168 {
169 freeargv (STATE_PROG_ARGV (sd));
170 STATE_PROG_ARGV (sd) = dupargv (argv);
171 }
172
173 return SIM_RC_OK;
174 }
175
176 /* PROFILE_CPU_CALLBACK */
177
178 static void
179 print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
180 {
181 SIM_DESC sd = CPU_STATE (cpu);
182 char buf[20];
183
184 if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
185 {
186 sim_io_printf (sd, "Miscellaneous Statistics\n\n");
187 sim_io_printf (sd, " %-*s %s\n\n",
188 PROFILE_LABEL_WIDTH, "Fill nops:",
189 sim_add_commas (buf, sizeof (buf),
190 CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
191 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
192 sim_io_printf (sd, " %-*s %s\n\n",
193 PROFILE_LABEL_WIDTH, "Parallel insns:",
194 sim_add_commas (buf, sizeof (buf),
195 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
196 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
197 sim_io_printf (sd, " %-*s %s\n\n",
198 PROFILE_LABEL_WIDTH, "Parallel insns:",
199 sim_add_commas (buf, sizeof (buf),
200 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
201 }
202 }