1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
6 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
7 * Copyright (c) 2006 ATI Technologies Inc.
8 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
9 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
10 * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
13 * Wu Fengguang <wfg@linux.intel.com>
16 * Wu Fengguang <wfg@linux.intel.com>
19 #include <linux/init.h>
20 #include <linux/delay.h>
21 #include <linux/pci.h>
22 #include <linux/slab.h>
23 #include <linux/module.h>
24 #include <linux/pm_runtime.h>
25 #include <sound/core.h>
26 #include <sound/jack.h>
27 #include <sound/asoundef.h>
28 #include <sound/tlv.h>
29 #include <sound/hdaudio.h>
30 #include <sound/hda_i915.h>
31 #include <sound/hda_chmap.h>
32 #include <sound/hda_codec.h>
33 #include "hda_local.h"
35 #include "hda_controller.h"
37 static bool static_hdmi_pcm
;
38 module_param(static_hdmi_pcm
, bool, 0644);
39 MODULE_PARM_DESC(static_hdmi_pcm
, "Don't restrict PCM parameters per ELD info");
41 struct hdmi_spec_per_cvt
{
44 unsigned int channels_min
;
45 unsigned int channels_max
;
51 /* max. connections to a widget */
52 #define HDA_MAX_CONNECTIONS 32
54 struct hdmi_spec_per_pin
{
57 /* pin idx, different device entries on the same pin use the same idx */
60 hda_nid_t mux_nids
[HDA_MAX_CONNECTIONS
];
64 struct hda_codec
*codec
;
65 struct hdmi_eld sink_eld
;
67 struct delayed_work work
;
68 struct hdmi_pcm
*pcm
; /* pointer to spec->pcm_rec[n] dynamically*/
69 int pcm_idx
; /* which pcm is attached. -1 means no pcm is attached */
71 bool setup
; /* the stream has been set up by prepare callback */
72 int channels
; /* current number of channels */
74 bool chmap_set
; /* channel-map override by ALSA API? */
75 unsigned char chmap
[8]; /* ALSA API channel-map */
76 #ifdef CONFIG_SND_PROC_FS
77 struct snd_info_entry
*proc_entry
;
81 /* operations used by generic code that can be overridden by patches */
83 int (*pin_get_eld
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
84 int dev_id
, unsigned char *buf
, int *eld_size
);
86 void (*pin_setup_infoframe
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
88 int ca
, int active_channels
, int conn_type
);
90 /* enable/disable HBR (HD passthrough) */
91 int (*pin_hbr_setup
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
92 int dev_id
, bool hbr
);
94 int (*setup_stream
)(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
95 hda_nid_t pin_nid
, int dev_id
, u32 stream_tag
,
98 void (*pin_cvt_fixup
)(struct hda_codec
*codec
,
99 struct hdmi_spec_per_pin
*per_pin
,
105 struct snd_jack
*jack
;
106 struct snd_kcontrol
*eld_ctl
;
110 struct hda_codec
*codec
;
112 struct snd_array cvts
; /* struct hdmi_spec_per_cvt */
113 hda_nid_t cvt_nids
[4]; /* only for haswell fix */
116 * num_pins is the number of virtual pins
117 * for example, there are 3 pins, and each pin
118 * has 4 device entries, then the num_pins is 12
122 * num_nids is the number of real pins
123 * In the above example, num_nids is 3
127 * dev_num is the number of device entries
129 * In the above example, dev_num is 4
132 struct snd_array pins
; /* struct hdmi_spec_per_pin */
133 struct hdmi_pcm pcm_rec
[16];
134 struct mutex pcm_lock
;
135 struct mutex bind_lock
; /* for audio component binding */
136 /* pcm_bitmap means which pcms have been assigned to pins*/
137 unsigned long pcm_bitmap
;
138 int pcm_used
; /* counter of pcm_rec[] */
139 /* bitmap shows whether the pcm is opened in user space
140 * bit 0 means the first playback PCM (PCM3);
141 * bit 1 means the second playback PCM, and so on.
143 unsigned long pcm_in_use
;
145 struct hdmi_eld temp_eld
;
150 bool intel_hsw_fixup
; /* apply Intel platform-specific fixups */
152 * Non-generic VIA/NVIDIA specific
154 struct hda_multi_out multiout
;
155 struct hda_pcm_stream pcm_playback
;
157 bool use_acomp_notifier
; /* use eld_notify callback for hotplug */
158 bool acomp_registered
; /* audio component registered in this driver */
159 struct drm_audio_component_audio_ops drm_audio_ops
;
160 int (*port2pin
)(struct hda_codec
*, int); /* reverse port/pin mapping */
162 struct hdac_chmap chmap
;
163 hda_nid_t vendor_nid
;
168 #ifdef CONFIG_SND_HDA_COMPONENT
169 static inline bool codec_has_acomp(struct hda_codec
*codec
)
171 struct hdmi_spec
*spec
= codec
->spec
;
172 return spec
->use_acomp_notifier
;
175 #define codec_has_acomp(codec) false
178 struct hdmi_audio_infoframe
{
185 u8 CC02_CT47
; /* CC in bits 0:2, CT in 4:7 */
189 u8 LFEPBL01_LSV36_DM_INH7
;
192 struct dp_audio_infoframe
{
195 u8 ver
; /* 0x11 << 2 */
197 u8 CC02_CT47
; /* match with HDMI infoframe from this on */
201 u8 LFEPBL01_LSV36_DM_INH7
;
204 union audio_infoframe
{
205 struct hdmi_audio_infoframe hdmi
;
206 struct dp_audio_infoframe dp
;
214 #define get_pin(spec, idx) \
215 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
216 #define get_cvt(spec, idx) \
217 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
218 /* obtain hdmi_pcm object assigned to idx */
219 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
220 /* obtain hda_pcm object assigned to idx */
221 #define get_pcm_rec(spec, idx) (get_hdmi_pcm(spec, idx)->pcm)
223 static int pin_id_to_pin_index(struct hda_codec
*codec
,
224 hda_nid_t pin_nid
, int dev_id
)
226 struct hdmi_spec
*spec
= codec
->spec
;
228 struct hdmi_spec_per_pin
*per_pin
;
231 * (dev_id == -1) means it is NON-MST pin
232 * return the first virtual pin on this port
237 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
238 per_pin
= get_pin(spec
, pin_idx
);
239 if ((per_pin
->pin_nid
== pin_nid
) &&
240 (per_pin
->dev_id
== dev_id
))
244 codec_warn(codec
, "HDMI: pin nid %d not registered\n", pin_nid
);
248 static int hinfo_to_pcm_index(struct hda_codec
*codec
,
249 struct hda_pcm_stream
*hinfo
)
251 struct hdmi_spec
*spec
= codec
->spec
;
254 for (pcm_idx
= 0; pcm_idx
< spec
->pcm_used
; pcm_idx
++)
255 if (get_pcm_rec(spec
, pcm_idx
)->stream
== hinfo
)
258 codec_warn(codec
, "HDMI: hinfo %p not registered\n", hinfo
);
262 static int hinfo_to_pin_index(struct hda_codec
*codec
,
263 struct hda_pcm_stream
*hinfo
)
265 struct hdmi_spec
*spec
= codec
->spec
;
266 struct hdmi_spec_per_pin
*per_pin
;
269 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
270 per_pin
= get_pin(spec
, pin_idx
);
272 per_pin
->pcm
->pcm
->stream
== hinfo
)
276 codec_dbg(codec
, "HDMI: hinfo %p not registered\n", hinfo
);
280 static struct hdmi_spec_per_pin
*pcm_idx_to_pin(struct hdmi_spec
*spec
,
284 struct hdmi_spec_per_pin
*per_pin
;
286 for (i
= 0; i
< spec
->num_pins
; i
++) {
287 per_pin
= get_pin(spec
, i
);
288 if (per_pin
->pcm_idx
== pcm_idx
)
294 static int cvt_nid_to_cvt_index(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
296 struct hdmi_spec
*spec
= codec
->spec
;
299 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++)
300 if (get_cvt(spec
, cvt_idx
)->cvt_nid
== cvt_nid
)
303 codec_warn(codec
, "HDMI: cvt nid %d not registered\n", cvt_nid
);
307 static int hdmi_eld_ctl_info(struct snd_kcontrol
*kcontrol
,
308 struct snd_ctl_elem_info
*uinfo
)
310 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
311 struct hdmi_spec
*spec
= codec
->spec
;
312 struct hdmi_spec_per_pin
*per_pin
;
313 struct hdmi_eld
*eld
;
316 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BYTES
;
318 pcm_idx
= kcontrol
->private_value
;
319 mutex_lock(&spec
->pcm_lock
);
320 per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
322 /* no pin is bound to the pcm */
326 eld
= &per_pin
->sink_eld
;
327 uinfo
->count
= eld
->eld_valid
? eld
->eld_size
: 0;
330 mutex_unlock(&spec
->pcm_lock
);
334 static int hdmi_eld_ctl_get(struct snd_kcontrol
*kcontrol
,
335 struct snd_ctl_elem_value
*ucontrol
)
337 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
338 struct hdmi_spec
*spec
= codec
->spec
;
339 struct hdmi_spec_per_pin
*per_pin
;
340 struct hdmi_eld
*eld
;
344 pcm_idx
= kcontrol
->private_value
;
345 mutex_lock(&spec
->pcm_lock
);
346 per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
348 /* no pin is bound to the pcm */
349 memset(ucontrol
->value
.bytes
.data
, 0,
350 ARRAY_SIZE(ucontrol
->value
.bytes
.data
));
354 eld
= &per_pin
->sink_eld
;
355 if (eld
->eld_size
> ARRAY_SIZE(ucontrol
->value
.bytes
.data
) ||
356 eld
->eld_size
> ELD_MAX_SIZE
) {
362 memset(ucontrol
->value
.bytes
.data
, 0,
363 ARRAY_SIZE(ucontrol
->value
.bytes
.data
));
365 memcpy(ucontrol
->value
.bytes
.data
, eld
->eld_buffer
,
369 mutex_unlock(&spec
->pcm_lock
);
373 static const struct snd_kcontrol_new eld_bytes_ctl
= {
374 .access
= SNDRV_CTL_ELEM_ACCESS_READ
| SNDRV_CTL_ELEM_ACCESS_VOLATILE
|
375 SNDRV_CTL_ELEM_ACCESS_SKIP_CHECK
,
376 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
378 .info
= hdmi_eld_ctl_info
,
379 .get
= hdmi_eld_ctl_get
,
382 static int hdmi_create_eld_ctl(struct hda_codec
*codec
, int pcm_idx
,
385 struct snd_kcontrol
*kctl
;
386 struct hdmi_spec
*spec
= codec
->spec
;
389 kctl
= snd_ctl_new1(&eld_bytes_ctl
, codec
);
392 kctl
->private_value
= pcm_idx
;
393 kctl
->id
.device
= device
;
395 /* no pin nid is associated with the kctl now
396 * tbd: associate pin nid to eld ctl later
398 err
= snd_hda_ctl_add(codec
, 0, kctl
);
402 get_hdmi_pcm(spec
, pcm_idx
)->eld_ctl
= kctl
;
407 static void hdmi_get_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
408 int *packet_index
, int *byte_index
)
412 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
413 AC_VERB_GET_HDMI_DIP_INDEX
, 0);
415 *packet_index
= val
>> 5;
416 *byte_index
= val
& 0x1f;
420 static void hdmi_set_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
421 int packet_index
, int byte_index
)
425 val
= (packet_index
<< 5) | (byte_index
& 0x1f);
427 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_INDEX
, val
);
430 static void hdmi_write_dip_byte(struct hda_codec
*codec
, hda_nid_t pin_nid
,
433 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_DATA
, val
);
436 static void hdmi_init_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
438 struct hdmi_spec
*spec
= codec
->spec
;
442 if (get_wcaps(codec
, pin_nid
) & AC_WCAP_OUT_AMP
)
443 snd_hda_codec_write(codec
, pin_nid
, 0,
444 AC_VERB_SET_AMP_GAIN_MUTE
, AMP_OUT_UNMUTE
);
446 if (spec
->dyn_pin_out
)
447 /* Disable pin out until stream is active */
450 /* Enable pin out: some machines with GM965 gets broken output
451 * when the pin is disabled or changed while using with HDMI
455 snd_hda_codec_write(codec
, pin_nid
, 0,
456 AC_VERB_SET_PIN_WIDGET_CONTROL
, pin_out
);
463 #ifdef CONFIG_SND_PROC_FS
464 static void print_eld_info(struct snd_info_entry
*entry
,
465 struct snd_info_buffer
*buffer
)
467 struct hdmi_spec_per_pin
*per_pin
= entry
->private_data
;
469 mutex_lock(&per_pin
->lock
);
470 snd_hdmi_print_eld_info(&per_pin
->sink_eld
, buffer
);
471 mutex_unlock(&per_pin
->lock
);
474 static void write_eld_info(struct snd_info_entry
*entry
,
475 struct snd_info_buffer
*buffer
)
477 struct hdmi_spec_per_pin
*per_pin
= entry
->private_data
;
479 mutex_lock(&per_pin
->lock
);
480 snd_hdmi_write_eld_info(&per_pin
->sink_eld
, buffer
);
481 mutex_unlock(&per_pin
->lock
);
484 static int eld_proc_new(struct hdmi_spec_per_pin
*per_pin
, int index
)
487 struct hda_codec
*codec
= per_pin
->codec
;
488 struct snd_info_entry
*entry
;
491 snprintf(name
, sizeof(name
), "eld#%d.%d", codec
->addr
, index
);
492 err
= snd_card_proc_new(codec
->card
, name
, &entry
);
496 snd_info_set_text_ops(entry
, per_pin
, print_eld_info
);
497 entry
->c
.text
.write
= write_eld_info
;
499 per_pin
->proc_entry
= entry
;
504 static void eld_proc_free(struct hdmi_spec_per_pin
*per_pin
)
506 if (!per_pin
->codec
->bus
->shutdown
) {
507 snd_info_free_entry(per_pin
->proc_entry
);
508 per_pin
->proc_entry
= NULL
;
512 static inline int eld_proc_new(struct hdmi_spec_per_pin
*per_pin
,
517 static inline void eld_proc_free(struct hdmi_spec_per_pin
*per_pin
)
523 * Audio InfoFrame routines
527 * Enable Audio InfoFrame Transmission
529 static void hdmi_start_infoframe_trans(struct hda_codec
*codec
,
532 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
533 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
538 * Disable Audio InfoFrame Transmission
540 static void hdmi_stop_infoframe_trans(struct hda_codec
*codec
,
543 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
544 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
548 static void hdmi_debug_dip_size(struct hda_codec
*codec
, hda_nid_t pin_nid
)
550 #ifdef CONFIG_SND_DEBUG_VERBOSE
554 size
= snd_hdmi_get_eld_size(codec
, pin_nid
);
555 codec_dbg(codec
, "HDMI: ELD buf size is %d\n", size
);
557 for (i
= 0; i
< 8; i
++) {
558 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
559 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
560 codec_dbg(codec
, "HDMI: DIP GP[%d] buf size is %d\n", i
, size
);
565 static void hdmi_clear_dip_buffers(struct hda_codec
*codec
, hda_nid_t pin_nid
)
571 for (i
= 0; i
< 8; i
++) {
572 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
573 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
577 hdmi_set_dip_index(codec
, pin_nid
, i
, 0x0);
578 for (j
= 1; j
< 1000; j
++) {
579 hdmi_write_dip_byte(codec
, pin_nid
, 0x0);
580 hdmi_get_dip_index(codec
, pin_nid
, &pi
, &bi
);
582 codec_dbg(codec
, "dip index %d: %d != %d\n",
584 if (bi
== 0) /* byte index wrapped around */
588 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
594 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe
*hdmi_ai
)
596 u8
*bytes
= (u8
*)hdmi_ai
;
600 hdmi_ai
->checksum
= 0;
602 for (i
= 0; i
< sizeof(*hdmi_ai
); i
++)
605 hdmi_ai
->checksum
= -sum
;
608 static void hdmi_fill_audio_infoframe(struct hda_codec
*codec
,
614 hdmi_debug_dip_size(codec
, pin_nid
);
615 hdmi_clear_dip_buffers(codec
, pin_nid
); /* be paranoid */
617 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
618 for (i
= 0; i
< size
; i
++)
619 hdmi_write_dip_byte(codec
, pin_nid
, dip
[i
]);
622 static bool hdmi_infoframe_uptodate(struct hda_codec
*codec
, hda_nid_t pin_nid
,
628 if (snd_hda_codec_read(codec
, pin_nid
, 0, AC_VERB_GET_HDMI_DIP_XMIT
, 0)
632 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
633 for (i
= 0; i
< size
; i
++) {
634 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
635 AC_VERB_GET_HDMI_DIP_DATA
, 0);
643 static int hdmi_pin_get_eld(struct hda_codec
*codec
, hda_nid_t nid
,
644 int dev_id
, unsigned char *buf
, int *eld_size
)
646 snd_hda_set_dev_select(codec
, nid
, dev_id
);
648 return snd_hdmi_get_eld(codec
, nid
, buf
, eld_size
);
651 static void hdmi_pin_setup_infoframe(struct hda_codec
*codec
,
652 hda_nid_t pin_nid
, int dev_id
,
653 int ca
, int active_channels
,
656 union audio_infoframe ai
;
658 memset(&ai
, 0, sizeof(ai
));
659 if (conn_type
== 0) { /* HDMI */
660 struct hdmi_audio_infoframe
*hdmi_ai
= &ai
.hdmi
;
662 hdmi_ai
->type
= 0x84;
665 hdmi_ai
->CC02_CT47
= active_channels
- 1;
667 hdmi_checksum_audio_infoframe(hdmi_ai
);
668 } else if (conn_type
== 1) { /* DisplayPort */
669 struct dp_audio_infoframe
*dp_ai
= &ai
.dp
;
673 dp_ai
->ver
= 0x11 << 2;
674 dp_ai
->CC02_CT47
= active_channels
- 1;
677 codec_dbg(codec
, "HDMI: unknown connection type at pin %d\n",
682 snd_hda_set_dev_select(codec
, pin_nid
, dev_id
);
685 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
686 * sizeof(*dp_ai) to avoid partial match/update problems when
687 * the user switches between HDMI/DP monitors.
689 if (!hdmi_infoframe_uptodate(codec
, pin_nid
, ai
.bytes
,
692 "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
694 active_channels
, ca
);
695 hdmi_stop_infoframe_trans(codec
, pin_nid
);
696 hdmi_fill_audio_infoframe(codec
, pin_nid
,
697 ai
.bytes
, sizeof(ai
));
698 hdmi_start_infoframe_trans(codec
, pin_nid
);
702 static void hdmi_setup_audio_infoframe(struct hda_codec
*codec
,
703 struct hdmi_spec_per_pin
*per_pin
,
706 struct hdmi_spec
*spec
= codec
->spec
;
707 struct hdac_chmap
*chmap
= &spec
->chmap
;
708 hda_nid_t pin_nid
= per_pin
->pin_nid
;
709 int dev_id
= per_pin
->dev_id
;
710 int channels
= per_pin
->channels
;
712 struct hdmi_eld
*eld
;
718 snd_hda_set_dev_select(codec
, pin_nid
, dev_id
);
720 /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
721 if (get_wcaps(codec
, pin_nid
) & AC_WCAP_OUT_AMP
)
722 snd_hda_codec_write(codec
, pin_nid
, 0,
723 AC_VERB_SET_AMP_GAIN_MUTE
,
726 eld
= &per_pin
->sink_eld
;
728 ca
= snd_hdac_channel_allocation(&codec
->core
,
729 eld
->info
.spk_alloc
, channels
,
730 per_pin
->chmap_set
, non_pcm
, per_pin
->chmap
);
732 active_channels
= snd_hdac_get_active_channels(ca
);
734 chmap
->ops
.set_channel_count(&codec
->core
, per_pin
->cvt_nid
,
738 * always configure channel mapping, it may have been changed by the
739 * user in the meantime
741 snd_hdac_setup_channel_mapping(&spec
->chmap
,
742 pin_nid
, non_pcm
, ca
, channels
,
743 per_pin
->chmap
, per_pin
->chmap_set
);
745 spec
->ops
.pin_setup_infoframe(codec
, pin_nid
, dev_id
,
746 ca
, active_channels
, eld
->info
.conn_type
);
748 per_pin
->non_pcm
= non_pcm
;
755 static void hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
);
757 static void check_presence_and_report(struct hda_codec
*codec
, hda_nid_t nid
,
760 struct hdmi_spec
*spec
= codec
->spec
;
761 int pin_idx
= pin_id_to_pin_index(codec
, nid
, dev_id
);
765 mutex_lock(&spec
->pcm_lock
);
766 hdmi_present_sense(get_pin(spec
, pin_idx
), 1);
767 mutex_unlock(&spec
->pcm_lock
);
770 static void jack_callback(struct hda_codec
*codec
,
771 struct hda_jack_callback
*jack
)
773 /* stop polling when notification is enabled */
774 if (codec_has_acomp(codec
))
777 check_presence_and_report(codec
, jack
->nid
, jack
->dev_id
);
780 static void hdmi_intrinsic_event(struct hda_codec
*codec
, unsigned int res
,
781 struct hda_jack_tbl
*jack
)
783 jack
->jack_dirty
= 1;
786 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
787 codec
->addr
, jack
->nid
, jack
->dev_id
, !!(res
& AC_UNSOL_RES_IA
),
788 !!(res
& AC_UNSOL_RES_PD
), !!(res
& AC_UNSOL_RES_ELDV
));
790 check_presence_and_report(codec
, jack
->nid
, jack
->dev_id
);
793 static void hdmi_non_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
795 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
796 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
797 int cp_state
= !!(res
& AC_UNSOL_RES_CP_STATE
);
798 int cp_ready
= !!(res
& AC_UNSOL_RES_CP_READY
);
801 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
818 static void hdmi_unsol_event(struct hda_codec
*codec
, unsigned int res
)
820 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
821 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
822 struct hda_jack_tbl
*jack
;
824 if (codec_has_acomp(codec
))
829 (res
& AC_UNSOL_RES_DE
) >> AC_UNSOL_RES_DE_SHIFT
;
831 jack
= snd_hda_jack_tbl_get_from_tag(codec
, tag
, dev_entry
);
833 jack
= snd_hda_jack_tbl_get_from_tag(codec
, tag
, 0);
837 codec_dbg(codec
, "Unexpected HDMI event tag 0x%x\n", tag
);
842 hdmi_intrinsic_event(codec
, res
, jack
);
844 hdmi_non_intrinsic_event(codec
, res
);
847 static void haswell_verify_D0(struct hda_codec
*codec
,
848 hda_nid_t cvt_nid
, hda_nid_t nid
)
852 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
853 * thus pins could only choose converter 0 for use. Make sure the
854 * converters are in correct power state */
855 if (!snd_hda_check_power_state(codec
, cvt_nid
, AC_PWRST_D0
))
856 snd_hda_codec_write(codec
, cvt_nid
, 0, AC_VERB_SET_POWER_STATE
, AC_PWRST_D0
);
858 if (!snd_hda_check_power_state(codec
, nid
, AC_PWRST_D0
)) {
859 snd_hda_codec_write(codec
, nid
, 0, AC_VERB_SET_POWER_STATE
,
862 pwr
= snd_hda_codec_read(codec
, nid
, 0, AC_VERB_GET_POWER_STATE
, 0);
863 pwr
= (pwr
& AC_PWRST_ACTUAL
) >> AC_PWRST_ACTUAL_SHIFT
;
864 codec_dbg(codec
, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid
, pwr
);
872 /* HBR should be Non-PCM, 8 channels */
873 #define is_hbr_format(format) \
874 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
876 static int hdmi_pin_hbr_setup(struct hda_codec
*codec
, hda_nid_t pin_nid
,
877 int dev_id
, bool hbr
)
879 int pinctl
, new_pinctl
;
881 if (snd_hda_query_pin_caps(codec
, pin_nid
) & AC_PINCAP_HBR
) {
882 snd_hda_set_dev_select(codec
, pin_nid
, dev_id
);
883 pinctl
= snd_hda_codec_read(codec
, pin_nid
, 0,
884 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
887 return hbr
? -EINVAL
: 0;
889 new_pinctl
= pinctl
& ~AC_PINCTL_EPT
;
891 new_pinctl
|= AC_PINCTL_EPT_HBR
;
893 new_pinctl
|= AC_PINCTL_EPT_NATIVE
;
896 "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
898 pinctl
== new_pinctl
? "" : "new-",
901 if (pinctl
!= new_pinctl
)
902 snd_hda_codec_write(codec
, pin_nid
, 0,
903 AC_VERB_SET_PIN_WIDGET_CONTROL
,
911 static int hdmi_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
912 hda_nid_t pin_nid
, int dev_id
,
913 u32 stream_tag
, int format
)
915 struct hdmi_spec
*spec
= codec
->spec
;
919 err
= spec
->ops
.pin_hbr_setup(codec
, pin_nid
, dev_id
,
920 is_hbr_format(format
));
923 codec_dbg(codec
, "hdmi_setup_stream: HBR is not supported\n");
927 if (spec
->intel_hsw_fixup
) {
930 * on recent platforms IEC Coding Type is required for HBR
931 * support, read current Digital Converter settings and set
932 * ICT bitfield if needed.
934 param
= snd_hda_codec_read(codec
, cvt_nid
, 0,
935 AC_VERB_GET_DIGI_CONVERT_1
, 0);
937 param
= (param
>> 16) & ~(AC_DIG3_ICT
);
939 /* on recent platforms ICT mode is required for HBR support */
940 if (is_hbr_format(format
))
943 snd_hda_codec_write(codec
, cvt_nid
, 0,
944 AC_VERB_SET_DIGI_CONVERT_3
, param
);
947 snd_hda_codec_setup_stream(codec
, cvt_nid
, stream_tag
, 0, format
);
951 /* Try to find an available converter
952 * If pin_idx is less then zero, just try to find an available converter.
953 * Otherwise, try to find an available converter and get the cvt mux index
956 static int hdmi_choose_cvt(struct hda_codec
*codec
,
957 int pin_idx
, int *cvt_id
)
959 struct hdmi_spec
*spec
= codec
->spec
;
960 struct hdmi_spec_per_pin
*per_pin
;
961 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
962 int cvt_idx
, mux_idx
= 0;
964 /* pin_idx < 0 means no pin will be bound to the converter */
968 per_pin
= get_pin(spec
, pin_idx
);
970 /* Dynamically assign converter to stream */
971 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
972 per_cvt
= get_cvt(spec
, cvt_idx
);
974 /* Must not already be assigned */
975 if (per_cvt
->assigned
)
979 /* Must be in pin's mux's list of converters */
980 for (mux_idx
= 0; mux_idx
< per_pin
->num_mux_nids
; mux_idx
++)
981 if (per_pin
->mux_nids
[mux_idx
] == per_cvt
->cvt_nid
)
983 /* Not in mux list */
984 if (mux_idx
== per_pin
->num_mux_nids
)
989 /* No free converters */
990 if (cvt_idx
== spec
->num_cvts
)
994 per_pin
->mux_idx
= mux_idx
;
1002 /* Assure the pin select the right convetor */
1003 static void intel_verify_pin_cvt_connect(struct hda_codec
*codec
,
1004 struct hdmi_spec_per_pin
*per_pin
)
1006 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1009 mux_idx
= per_pin
->mux_idx
;
1010 curr
= snd_hda_codec_read(codec
, pin_nid
, 0,
1011 AC_VERB_GET_CONNECT_SEL
, 0);
1012 if (curr
!= mux_idx
)
1013 snd_hda_codec_write_cache(codec
, pin_nid
, 0,
1014 AC_VERB_SET_CONNECT_SEL
,
1018 /* get the mux index for the converter of the pins
1019 * converter's mux index is the same for all pins on Intel platform
1021 static int intel_cvt_id_to_mux_idx(struct hdmi_spec
*spec
,
1026 for (i
= 0; i
< spec
->num_cvts
; i
++)
1027 if (spec
->cvt_nids
[i
] == cvt_nid
)
1032 /* Intel HDMI workaround to fix audio routing issue:
1033 * For some Intel display codecs, pins share the same connection list.
1034 * So a conveter can be selected by multiple pins and playback on any of these
1035 * pins will generate sound on the external display, because audio flows from
1036 * the same converter to the display pipeline. Also muting one pin may make
1037 * other pins have no sound output.
1038 * So this function assures that an assigned converter for a pin is not selected
1039 * by any other pins.
1041 static void intel_not_share_assigned_cvt(struct hda_codec
*codec
,
1043 int dev_id
, int mux_idx
)
1045 struct hdmi_spec
*spec
= codec
->spec
;
1048 struct hdmi_spec_per_cvt
*per_cvt
;
1049 struct hdmi_spec_per_pin
*per_pin
;
1052 /* configure the pins connections */
1053 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1057 per_pin
= get_pin(spec
, pin_idx
);
1059 * pin not connected to monitor
1060 * no need to operate on it
1065 if ((per_pin
->pin_nid
== pin_nid
) &&
1066 (per_pin
->dev_id
== dev_id
))
1070 * if per_pin->dev_id >= dev_num,
1071 * snd_hda_get_dev_select() will fail,
1072 * and the following operation is unpredictable.
1073 * So skip this situation.
1075 dev_num
= snd_hda_get_num_devices(codec
, per_pin
->pin_nid
) + 1;
1076 if (per_pin
->dev_id
>= dev_num
)
1079 nid
= per_pin
->pin_nid
;
1082 * Calling this function should not impact
1083 * on the device entry selection
1084 * So let's save the dev id for each pin,
1085 * and restore it when return
1087 dev_id_saved
= snd_hda_get_dev_select(codec
, nid
);
1088 snd_hda_set_dev_select(codec
, nid
, per_pin
->dev_id
);
1089 curr
= snd_hda_codec_read(codec
, nid
, 0,
1090 AC_VERB_GET_CONNECT_SEL
, 0);
1091 if (curr
!= mux_idx
) {
1092 snd_hda_set_dev_select(codec
, nid
, dev_id_saved
);
1097 /* choose an unassigned converter. The conveters in the
1098 * connection list are in the same order as in the codec.
1100 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
1101 per_cvt
= get_cvt(spec
, cvt_idx
);
1102 if (!per_cvt
->assigned
) {
1104 "choose cvt %d for pin nid %d\n",
1106 snd_hda_codec_write_cache(codec
, nid
, 0,
1107 AC_VERB_SET_CONNECT_SEL
,
1112 snd_hda_set_dev_select(codec
, nid
, dev_id_saved
);
1116 /* A wrapper of intel_not_share_asigned_cvt() */
1117 static void intel_not_share_assigned_cvt_nid(struct hda_codec
*codec
,
1118 hda_nid_t pin_nid
, int dev_id
, hda_nid_t cvt_nid
)
1121 struct hdmi_spec
*spec
= codec
->spec
;
1123 /* On Intel platform, the mapping of converter nid to
1124 * mux index of the pins are always the same.
1125 * The pin nid may be 0, this means all pins will not
1126 * share the converter.
1128 mux_idx
= intel_cvt_id_to_mux_idx(spec
, cvt_nid
);
1130 intel_not_share_assigned_cvt(codec
, pin_nid
, dev_id
, mux_idx
);
1133 /* skeleton caller of pin_cvt_fixup ops */
1134 static void pin_cvt_fixup(struct hda_codec
*codec
,
1135 struct hdmi_spec_per_pin
*per_pin
,
1138 struct hdmi_spec
*spec
= codec
->spec
;
1140 if (spec
->ops
.pin_cvt_fixup
)
1141 spec
->ops
.pin_cvt_fixup(codec
, per_pin
, cvt_nid
);
1144 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1145 * in dyn_pcm_assign mode.
1147 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream
*hinfo
,
1148 struct hda_codec
*codec
,
1149 struct snd_pcm_substream
*substream
)
1151 struct hdmi_spec
*spec
= codec
->spec
;
1152 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1153 int cvt_idx
, pcm_idx
;
1154 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
1157 pcm_idx
= hinfo_to_pcm_index(codec
, hinfo
);
1161 err
= hdmi_choose_cvt(codec
, -1, &cvt_idx
);
1165 per_cvt
= get_cvt(spec
, cvt_idx
);
1166 per_cvt
->assigned
= 1;
1167 hinfo
->nid
= per_cvt
->cvt_nid
;
1169 pin_cvt_fixup(codec
, NULL
, per_cvt
->cvt_nid
);
1171 set_bit(pcm_idx
, &spec
->pcm_in_use
);
1172 /* todo: setup spdif ctls assign */
1174 /* Initially set the converter's capabilities */
1175 hinfo
->channels_min
= per_cvt
->channels_min
;
1176 hinfo
->channels_max
= per_cvt
->channels_max
;
1177 hinfo
->rates
= per_cvt
->rates
;
1178 hinfo
->formats
= per_cvt
->formats
;
1179 hinfo
->maxbps
= per_cvt
->maxbps
;
1181 /* Store the updated parameters */
1182 runtime
->hw
.channels_min
= hinfo
->channels_min
;
1183 runtime
->hw
.channels_max
= hinfo
->channels_max
;
1184 runtime
->hw
.formats
= hinfo
->formats
;
1185 runtime
->hw
.rates
= hinfo
->rates
;
1187 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
1188 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
1195 static int hdmi_pcm_open(struct hda_pcm_stream
*hinfo
,
1196 struct hda_codec
*codec
,
1197 struct snd_pcm_substream
*substream
)
1199 struct hdmi_spec
*spec
= codec
->spec
;
1200 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1201 int pin_idx
, cvt_idx
, pcm_idx
;
1202 struct hdmi_spec_per_pin
*per_pin
;
1203 struct hdmi_eld
*eld
;
1204 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
1207 /* Validate hinfo */
1208 pcm_idx
= hinfo_to_pcm_index(codec
, hinfo
);
1212 mutex_lock(&spec
->pcm_lock
);
1213 pin_idx
= hinfo_to_pin_index(codec
, hinfo
);
1214 if (!spec
->dyn_pcm_assign
) {
1215 if (snd_BUG_ON(pin_idx
< 0)) {
1220 /* no pin is assigned to the PCM
1221 * PA need pcm open successfully when probe
1224 err
= hdmi_pcm_open_no_pin(hinfo
, codec
, substream
);
1229 err
= hdmi_choose_cvt(codec
, pin_idx
, &cvt_idx
);
1233 per_cvt
= get_cvt(spec
, cvt_idx
);
1234 /* Claim converter */
1235 per_cvt
->assigned
= 1;
1237 set_bit(pcm_idx
, &spec
->pcm_in_use
);
1238 per_pin
= get_pin(spec
, pin_idx
);
1239 per_pin
->cvt_nid
= per_cvt
->cvt_nid
;
1240 hinfo
->nid
= per_cvt
->cvt_nid
;
1242 /* flip stripe flag for the assigned stream if supported */
1243 if (get_wcaps(codec
, per_cvt
->cvt_nid
) & AC_WCAP_STRIPE
)
1244 azx_stream(get_azx_dev(substream
))->stripe
= 1;
1246 snd_hda_set_dev_select(codec
, per_pin
->pin_nid
, per_pin
->dev_id
);
1247 snd_hda_codec_write_cache(codec
, per_pin
->pin_nid
, 0,
1248 AC_VERB_SET_CONNECT_SEL
,
1251 /* configure unused pins to choose other converters */
1252 pin_cvt_fixup(codec
, per_pin
, 0);
1254 snd_hda_spdif_ctls_assign(codec
, pcm_idx
, per_cvt
->cvt_nid
);
1256 /* Initially set the converter's capabilities */
1257 hinfo
->channels_min
= per_cvt
->channels_min
;
1258 hinfo
->channels_max
= per_cvt
->channels_max
;
1259 hinfo
->rates
= per_cvt
->rates
;
1260 hinfo
->formats
= per_cvt
->formats
;
1261 hinfo
->maxbps
= per_cvt
->maxbps
;
1263 eld
= &per_pin
->sink_eld
;
1264 /* Restrict capabilities by ELD if this isn't disabled */
1265 if (!static_hdmi_pcm
&& eld
->eld_valid
) {
1266 snd_hdmi_eld_update_pcm_info(&eld
->info
, hinfo
);
1267 if (hinfo
->channels_min
> hinfo
->channels_max
||
1268 !hinfo
->rates
|| !hinfo
->formats
) {
1269 per_cvt
->assigned
= 0;
1271 snd_hda_spdif_ctls_unassign(codec
, pcm_idx
);
1277 /* Store the updated parameters */
1278 runtime
->hw
.channels_min
= hinfo
->channels_min
;
1279 runtime
->hw
.channels_max
= hinfo
->channels_max
;
1280 runtime
->hw
.formats
= hinfo
->formats
;
1281 runtime
->hw
.rates
= hinfo
->rates
;
1283 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
1284 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
1286 mutex_unlock(&spec
->pcm_lock
);
1291 * HDA/HDMI auto parsing
1293 static int hdmi_read_pin_conn(struct hda_codec
*codec
, int pin_idx
)
1295 struct hdmi_spec
*spec
= codec
->spec
;
1296 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1297 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1298 int dev_id
= per_pin
->dev_id
;
1301 if (!(get_wcaps(codec
, pin_nid
) & AC_WCAP_CONN_LIST
)) {
1303 "HDMI: pin %d wcaps %#x does not support connection list\n",
1304 pin_nid
, get_wcaps(codec
, pin_nid
));
1308 snd_hda_set_dev_select(codec
, pin_nid
, dev_id
);
1310 if (spec
->intel_hsw_fixup
) {
1311 conns
= spec
->num_cvts
;
1312 memcpy(per_pin
->mux_nids
, spec
->cvt_nids
,
1313 sizeof(hda_nid_t
) * conns
);
1315 conns
= snd_hda_get_raw_connections(codec
, pin_nid
,
1317 HDA_MAX_CONNECTIONS
);
1320 /* all the device entries on the same pin have the same conn list */
1321 per_pin
->num_mux_nids
= conns
;
1326 static int hdmi_find_pcm_slot(struct hdmi_spec
*spec
,
1327 struct hdmi_spec_per_pin
*per_pin
)
1332 * generic_hdmi_build_pcms() may allocate extra PCMs on some
1333 * platforms (with maximum of 'num_nids + dev_num - 1')
1335 * The per_pin of pin_nid_idx=n and dev_id=m prefers to get pcm-n
1336 * if m==0. This guarantees that dynamic pcm assignments are compatible
1337 * with the legacy static per_pin-pcm assignment that existed in the
1338 * days before DP-MST.
1340 * Intel DP-MST prefers this legacy behavior for compatibility, too.
1342 * per_pin of m!=0 prefers to get pcm=(num_nids + (m - 1)).
1345 if (per_pin
->dev_id
== 0 || spec
->intel_hsw_fixup
) {
1346 if (!test_bit(per_pin
->pin_nid_idx
, &spec
->pcm_bitmap
))
1347 return per_pin
->pin_nid_idx
;
1349 i
= spec
->num_nids
+ (per_pin
->dev_id
- 1);
1350 if (i
< spec
->pcm_used
&& !(test_bit(i
, &spec
->pcm_bitmap
)))
1354 /* have a second try; check the area over num_nids */
1355 for (i
= spec
->num_nids
; i
< spec
->pcm_used
; i
++) {
1356 if (!test_bit(i
, &spec
->pcm_bitmap
))
1360 /* the last try; check the empty slots in pins */
1361 for (i
= 0; i
< spec
->num_nids
; i
++) {
1362 if (!test_bit(i
, &spec
->pcm_bitmap
))
1368 static void hdmi_attach_hda_pcm(struct hdmi_spec
*spec
,
1369 struct hdmi_spec_per_pin
*per_pin
)
1373 /* pcm already be attached to the pin */
1376 idx
= hdmi_find_pcm_slot(spec
, per_pin
);
1379 per_pin
->pcm_idx
= idx
;
1380 per_pin
->pcm
= get_hdmi_pcm(spec
, idx
);
1381 set_bit(idx
, &spec
->pcm_bitmap
);
1384 static void hdmi_detach_hda_pcm(struct hdmi_spec
*spec
,
1385 struct hdmi_spec_per_pin
*per_pin
)
1389 /* pcm already be detached from the pin */
1392 idx
= per_pin
->pcm_idx
;
1393 per_pin
->pcm_idx
= -1;
1394 per_pin
->pcm
= NULL
;
1395 if (idx
>= 0 && idx
< spec
->pcm_used
)
1396 clear_bit(idx
, &spec
->pcm_bitmap
);
1399 static int hdmi_get_pin_cvt_mux(struct hdmi_spec
*spec
,
1400 struct hdmi_spec_per_pin
*per_pin
, hda_nid_t cvt_nid
)
1404 for (mux_idx
= 0; mux_idx
< per_pin
->num_mux_nids
; mux_idx
++)
1405 if (per_pin
->mux_nids
[mux_idx
] == cvt_nid
)
1410 static bool check_non_pcm_per_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
);
1412 static void hdmi_pcm_setup_pin(struct hdmi_spec
*spec
,
1413 struct hdmi_spec_per_pin
*per_pin
)
1415 struct hda_codec
*codec
= per_pin
->codec
;
1416 struct hda_pcm
*pcm
;
1417 struct hda_pcm_stream
*hinfo
;
1418 struct snd_pcm_substream
*substream
;
1422 if (per_pin
->pcm_idx
>= 0 && per_pin
->pcm_idx
< spec
->pcm_used
)
1423 pcm
= get_pcm_rec(spec
, per_pin
->pcm_idx
);
1428 if (!test_bit(per_pin
->pcm_idx
, &spec
->pcm_in_use
))
1431 /* hdmi audio only uses playback and one substream */
1432 hinfo
= pcm
->stream
;
1433 substream
= pcm
->pcm
->streams
[0].substream
;
1435 per_pin
->cvt_nid
= hinfo
->nid
;
1437 mux_idx
= hdmi_get_pin_cvt_mux(spec
, per_pin
, hinfo
->nid
);
1438 if (mux_idx
< per_pin
->num_mux_nids
) {
1439 snd_hda_set_dev_select(codec
, per_pin
->pin_nid
,
1441 snd_hda_codec_write_cache(codec
, per_pin
->pin_nid
, 0,
1442 AC_VERB_SET_CONNECT_SEL
,
1445 snd_hda_spdif_ctls_assign(codec
, per_pin
->pcm_idx
, hinfo
->nid
);
1447 non_pcm
= check_non_pcm_per_cvt(codec
, hinfo
->nid
);
1448 if (substream
->runtime
)
1449 per_pin
->channels
= substream
->runtime
->channels
;
1450 per_pin
->setup
= true;
1451 per_pin
->mux_idx
= mux_idx
;
1453 hdmi_setup_audio_infoframe(codec
, per_pin
, non_pcm
);
1456 static void hdmi_pcm_reset_pin(struct hdmi_spec
*spec
,
1457 struct hdmi_spec_per_pin
*per_pin
)
1459 if (per_pin
->pcm_idx
>= 0 && per_pin
->pcm_idx
< spec
->pcm_used
)
1460 snd_hda_spdif_ctls_unassign(per_pin
->codec
, per_pin
->pcm_idx
);
1462 per_pin
->chmap_set
= false;
1463 memset(per_pin
->chmap
, 0, sizeof(per_pin
->chmap
));
1465 per_pin
->setup
= false;
1466 per_pin
->channels
= 0;
1469 static struct snd_jack
*pin_idx_to_pcm_jack(struct hda_codec
*codec
,
1470 struct hdmi_spec_per_pin
*per_pin
)
1472 struct hdmi_spec
*spec
= codec
->spec
;
1474 if (per_pin
->pcm_idx
>= 0)
1475 return spec
->pcm_rec
[per_pin
->pcm_idx
].jack
;
1480 /* update per_pin ELD from the given new ELD;
1481 * setup info frame and notification accordingly
1482 * also notify ELD kctl and report jack status changes
1484 static void update_eld(struct hda_codec
*codec
,
1485 struct hdmi_spec_per_pin
*per_pin
,
1486 struct hdmi_eld
*eld
,
1489 struct hdmi_eld
*pin_eld
= &per_pin
->sink_eld
;
1490 struct hdmi_spec
*spec
= codec
->spec
;
1491 struct snd_jack
*pcm_jack
;
1492 bool old_eld_valid
= pin_eld
->eld_valid
;
1496 if (eld
->eld_valid
) {
1497 if (eld
->eld_size
<= 0 ||
1498 snd_hdmi_parse_eld(codec
, &eld
->info
, eld
->eld_buffer
,
1499 eld
->eld_size
) < 0) {
1500 eld
->eld_valid
= false;
1502 schedule_delayed_work(&per_pin
->work
,
1503 msecs_to_jiffies(300));
1509 if (!eld
->eld_valid
|| eld
->eld_size
<= 0) {
1510 eld
->eld_valid
= false;
1514 /* for monitor disconnection, save pcm_idx firstly */
1515 pcm_idx
= per_pin
->pcm_idx
;
1518 * pcm_idx >=0 before update_eld() means it is in monitor
1519 * disconnected event. Jack must be fetched before update_eld().
1521 pcm_jack
= pin_idx_to_pcm_jack(codec
, per_pin
);
1523 if (spec
->dyn_pcm_assign
) {
1524 if (eld
->eld_valid
) {
1525 hdmi_attach_hda_pcm(spec
, per_pin
);
1526 hdmi_pcm_setup_pin(spec
, per_pin
);
1528 hdmi_pcm_reset_pin(spec
, per_pin
);
1529 hdmi_detach_hda_pcm(spec
, per_pin
);
1532 /* if pcm_idx == -1, it means this is in monitor connection event
1533 * we can get the correct pcm_idx now.
1536 pcm_idx
= per_pin
->pcm_idx
;
1538 pcm_jack
= pin_idx_to_pcm_jack(codec
, per_pin
);
1541 snd_hdmi_show_eld(codec
, &eld
->info
);
1543 eld_changed
= (pin_eld
->eld_valid
!= eld
->eld_valid
);
1544 eld_changed
|= (pin_eld
->monitor_present
!= eld
->monitor_present
);
1545 if (!eld_changed
&& eld
->eld_valid
&& pin_eld
->eld_valid
)
1546 if (pin_eld
->eld_size
!= eld
->eld_size
||
1547 memcmp(pin_eld
->eld_buffer
, eld
->eld_buffer
,
1548 eld
->eld_size
) != 0)
1552 pin_eld
->monitor_present
= eld
->monitor_present
;
1553 pin_eld
->eld_valid
= eld
->eld_valid
;
1554 pin_eld
->eld_size
= eld
->eld_size
;
1556 memcpy(pin_eld
->eld_buffer
, eld
->eld_buffer
,
1558 pin_eld
->info
= eld
->info
;
1562 * Re-setup pin and infoframe. This is needed e.g. when
1563 * - sink is first plugged-in
1564 * - transcoder can change during stream playback on Haswell
1565 * and this can make HW reset converter selection on a pin.
1567 if (eld
->eld_valid
&& !old_eld_valid
&& per_pin
->setup
) {
1568 pin_cvt_fixup(codec
, per_pin
, 0);
1569 hdmi_setup_audio_infoframe(codec
, per_pin
, per_pin
->non_pcm
);
1572 if (eld_changed
&& pcm_idx
>= 0)
1573 snd_ctl_notify(codec
->card
,
1574 SNDRV_CTL_EVENT_MASK_VALUE
|
1575 SNDRV_CTL_EVENT_MASK_INFO
,
1576 &get_hdmi_pcm(spec
, pcm_idx
)->eld_ctl
->id
);
1578 if (eld_changed
&& pcm_jack
)
1579 snd_jack_report(pcm_jack
,
1580 (eld
->monitor_present
&& eld
->eld_valid
) ?
1581 SND_JACK_AVOUT
: 0);
1584 /* update ELD and jack state via HD-audio verbs */
1585 static void hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin
*per_pin
,
1588 struct hda_codec
*codec
= per_pin
->codec
;
1589 struct hdmi_spec
*spec
= codec
->spec
;
1590 struct hdmi_eld
*eld
= &spec
->temp_eld
;
1591 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1592 int dev_id
= per_pin
->dev_id
;
1594 * Always execute a GetPinSense verb here, even when called from
1595 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1596 * response's PD bit is not the real PD value, but indicates that
1597 * the real PD value changed. An older version of the HD-audio
1598 * specification worked this way. Hence, we just ignore the data in
1599 * the unsolicited response to avoid custom WARs.
1604 ret
= snd_hda_power_up_pm(codec
);
1605 if (ret
< 0 && pm_runtime_suspended(hda_codec_dev(codec
)))
1608 present
= snd_hda_jack_pin_sense(codec
, pin_nid
, dev_id
);
1610 mutex_lock(&per_pin
->lock
);
1611 eld
->monitor_present
= !!(present
& AC_PINSENSE_PRESENCE
);
1612 if (eld
->monitor_present
)
1613 eld
->eld_valid
= !!(present
& AC_PINSENSE_ELDV
);
1615 eld
->eld_valid
= false;
1618 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1619 codec
->addr
, pin_nid
, eld
->monitor_present
, eld
->eld_valid
);
1621 if (eld
->eld_valid
) {
1622 if (spec
->ops
.pin_get_eld(codec
, pin_nid
, dev_id
,
1623 eld
->eld_buffer
, &eld
->eld_size
) < 0)
1624 eld
->eld_valid
= false;
1627 update_eld(codec
, per_pin
, eld
, repoll
);
1628 mutex_unlock(&per_pin
->lock
);
1630 snd_hda_power_down_pm(codec
);
1633 /* update ELD and jack state via audio component */
1634 static void sync_eld_via_acomp(struct hda_codec
*codec
,
1635 struct hdmi_spec_per_pin
*per_pin
)
1637 struct hdmi_spec
*spec
= codec
->spec
;
1638 struct hdmi_eld
*eld
= &spec
->temp_eld
;
1640 mutex_lock(&per_pin
->lock
);
1641 eld
->monitor_present
= false;
1642 eld
->eld_size
= snd_hdac_acomp_get_eld(&codec
->core
, per_pin
->pin_nid
,
1643 per_pin
->dev_id
, &eld
->monitor_present
,
1644 eld
->eld_buffer
, ELD_MAX_SIZE
);
1645 eld
->eld_valid
= (eld
->eld_size
> 0);
1646 update_eld(codec
, per_pin
, eld
, 0);
1647 mutex_unlock(&per_pin
->lock
);
1650 static void hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
)
1652 struct hda_codec
*codec
= per_pin
->codec
;
1654 if (!codec_has_acomp(codec
))
1655 hdmi_present_sense_via_verbs(per_pin
, repoll
);
1657 sync_eld_via_acomp(codec
, per_pin
);
1660 static void hdmi_repoll_eld(struct work_struct
*work
)
1662 struct hdmi_spec_per_pin
*per_pin
=
1663 container_of(to_delayed_work(work
), struct hdmi_spec_per_pin
, work
);
1664 struct hda_codec
*codec
= per_pin
->codec
;
1665 struct hdmi_spec
*spec
= codec
->spec
;
1666 struct hda_jack_tbl
*jack
;
1668 jack
= snd_hda_jack_tbl_get_mst(codec
, per_pin
->pin_nid
,
1671 jack
->jack_dirty
= 1;
1673 if (per_pin
->repoll_count
++ > 6)
1674 per_pin
->repoll_count
= 0;
1676 mutex_lock(&spec
->pcm_lock
);
1677 hdmi_present_sense(per_pin
, per_pin
->repoll_count
);
1678 mutex_unlock(&spec
->pcm_lock
);
1681 static int hdmi_add_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
1683 struct hdmi_spec
*spec
= codec
->spec
;
1684 unsigned int caps
, config
;
1686 struct hdmi_spec_per_pin
*per_pin
;
1690 caps
= snd_hda_query_pin_caps(codec
, pin_nid
);
1691 if (!(caps
& (AC_PINCAP_HDMI
| AC_PINCAP_DP
)))
1695 * For DP MST audio, Configuration Default is the same for
1696 * all device entries on the same pin
1698 config
= snd_hda_codec_get_pincfg(codec
, pin_nid
);
1699 if (get_defcfg_connect(config
) == AC_JACK_PORT_NONE
)
1703 * To simplify the implementation, malloc all
1704 * the virtual pins in the initialization statically
1706 if (spec
->intel_hsw_fixup
) {
1708 * On Intel platforms, device entries number is
1709 * changed dynamically. If there is a DP MST
1710 * hub connected, the device entries number is 3.
1711 * Otherwise, it is 1.
1712 * Here we manually set dev_num to 3, so that
1713 * we can initialize all the device entries when
1714 * bootup statically.
1718 } else if (spec
->dyn_pcm_assign
&& codec
->dp_mst
) {
1719 dev_num
= snd_hda_get_num_devices(codec
, pin_nid
) + 1;
1721 * spec->dev_num is the maxinum number of device entries
1722 * among all the pins
1724 spec
->dev_num
= (spec
->dev_num
> dev_num
) ?
1725 spec
->dev_num
: dev_num
;
1728 * If the platform doesn't support DP MST,
1729 * manually set dev_num to 1. This means
1730 * the pin has only one device entry.
1736 for (i
= 0; i
< dev_num
; i
++) {
1737 pin_idx
= spec
->num_pins
;
1738 per_pin
= snd_array_new(&spec
->pins
);
1743 if (spec
->dyn_pcm_assign
) {
1744 per_pin
->pcm
= NULL
;
1745 per_pin
->pcm_idx
= -1;
1747 per_pin
->pcm
= get_hdmi_pcm(spec
, pin_idx
);
1748 per_pin
->pcm_idx
= pin_idx
;
1750 per_pin
->pin_nid
= pin_nid
;
1751 per_pin
->pin_nid_idx
= spec
->num_nids
;
1752 per_pin
->dev_id
= i
;
1753 per_pin
->non_pcm
= false;
1754 snd_hda_set_dev_select(codec
, pin_nid
, i
);
1755 err
= hdmi_read_pin_conn(codec
, pin_idx
);
1765 static int hdmi_add_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1767 struct hdmi_spec
*spec
= codec
->spec
;
1768 struct hdmi_spec_per_cvt
*per_cvt
;
1772 chans
= get_wcaps(codec
, cvt_nid
);
1773 chans
= get_wcaps_channels(chans
);
1775 per_cvt
= snd_array_new(&spec
->cvts
);
1779 per_cvt
->cvt_nid
= cvt_nid
;
1780 per_cvt
->channels_min
= 2;
1782 per_cvt
->channels_max
= chans
;
1783 if (chans
> spec
->chmap
.channels_max
)
1784 spec
->chmap
.channels_max
= chans
;
1787 err
= snd_hda_query_supported_pcm(codec
, cvt_nid
,
1794 if (spec
->num_cvts
< ARRAY_SIZE(spec
->cvt_nids
))
1795 spec
->cvt_nids
[spec
->num_cvts
] = cvt_nid
;
1801 static int hdmi_parse_codec(struct hda_codec
*codec
)
1806 nodes
= snd_hda_get_sub_nodes(codec
, codec
->core
.afg
, &nid
);
1807 if (!nid
|| nodes
< 0) {
1808 codec_warn(codec
, "HDMI: failed to get afg sub nodes\n");
1812 for (i
= 0; i
< nodes
; i
++, nid
++) {
1816 caps
= get_wcaps(codec
, nid
);
1817 type
= get_wcaps_type(caps
);
1819 if (!(caps
& AC_WCAP_DIGITAL
))
1823 case AC_WID_AUD_OUT
:
1824 hdmi_add_cvt(codec
, nid
);
1827 hdmi_add_pin(codec
, nid
);
1837 static bool check_non_pcm_per_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1839 struct hda_spdif_out
*spdif
;
1842 mutex_lock(&codec
->spdif_mutex
);
1843 spdif
= snd_hda_spdif_out_of_nid(codec
, cvt_nid
);
1844 /* Add sanity check to pass klockwork check.
1845 * This should never happen.
1847 if (WARN_ON(spdif
== NULL
))
1849 non_pcm
= !!(spdif
->status
& IEC958_AES0_NONAUDIO
);
1850 mutex_unlock(&codec
->spdif_mutex
);
1858 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
1859 struct hda_codec
*codec
,
1860 unsigned int stream_tag
,
1861 unsigned int format
,
1862 struct snd_pcm_substream
*substream
)
1864 hda_nid_t cvt_nid
= hinfo
->nid
;
1865 struct hdmi_spec
*spec
= codec
->spec
;
1867 struct hdmi_spec_per_pin
*per_pin
;
1868 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1873 mutex_lock(&spec
->pcm_lock
);
1874 pin_idx
= hinfo_to_pin_index(codec
, hinfo
);
1875 if (spec
->dyn_pcm_assign
&& pin_idx
< 0) {
1876 /* when dyn_pcm_assign and pcm is not bound to a pin
1877 * skip pin setup and return 0 to make audio playback
1880 pin_cvt_fixup(codec
, NULL
, cvt_nid
);
1881 snd_hda_codec_setup_stream(codec
, cvt_nid
,
1882 stream_tag
, 0, format
);
1886 if (snd_BUG_ON(pin_idx
< 0)) {
1890 per_pin
= get_pin(spec
, pin_idx
);
1892 /* Verify pin:cvt selections to avoid silent audio after S3.
1893 * After S3, the audio driver restores pin:cvt selections
1894 * but this can happen before gfx is ready and such selection
1895 * is overlooked by HW. Thus multiple pins can share a same
1896 * default convertor and mute control will affect each other,
1897 * which can cause a resumed audio playback become silent
1900 pin_cvt_fixup(codec
, per_pin
, 0);
1902 /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1903 /* Todo: add DP1.2 MST audio support later */
1904 if (codec_has_acomp(codec
))
1905 snd_hdac_sync_audio_rate(&codec
->core
, per_pin
->pin_nid
,
1906 per_pin
->dev_id
, runtime
->rate
);
1908 non_pcm
= check_non_pcm_per_cvt(codec
, cvt_nid
);
1909 mutex_lock(&per_pin
->lock
);
1910 per_pin
->channels
= substream
->runtime
->channels
;
1911 per_pin
->setup
= true;
1913 if (get_wcaps(codec
, cvt_nid
) & AC_WCAP_STRIPE
) {
1914 stripe
= snd_hdac_get_stream_stripe_ctl(&codec
->bus
->core
,
1916 snd_hda_codec_write(codec
, cvt_nid
, 0,
1917 AC_VERB_SET_STRIPE_CONTROL
,
1921 hdmi_setup_audio_infoframe(codec
, per_pin
, non_pcm
);
1922 mutex_unlock(&per_pin
->lock
);
1923 if (spec
->dyn_pin_out
) {
1924 snd_hda_set_dev_select(codec
, per_pin
->pin_nid
,
1926 pinctl
= snd_hda_codec_read(codec
, per_pin
->pin_nid
, 0,
1927 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
1928 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
1929 AC_VERB_SET_PIN_WIDGET_CONTROL
,
1933 /* snd_hda_set_dev_select() has been called before */
1934 err
= spec
->ops
.setup_stream(codec
, cvt_nid
, per_pin
->pin_nid
,
1935 per_pin
->dev_id
, stream_tag
, format
);
1937 mutex_unlock(&spec
->pcm_lock
);
1941 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream
*hinfo
,
1942 struct hda_codec
*codec
,
1943 struct snd_pcm_substream
*substream
)
1945 snd_hda_codec_cleanup_stream(codec
, hinfo
->nid
);
1949 static int hdmi_pcm_close(struct hda_pcm_stream
*hinfo
,
1950 struct hda_codec
*codec
,
1951 struct snd_pcm_substream
*substream
)
1953 struct hdmi_spec
*spec
= codec
->spec
;
1954 int cvt_idx
, pin_idx
, pcm_idx
;
1955 struct hdmi_spec_per_cvt
*per_cvt
;
1956 struct hdmi_spec_per_pin
*per_pin
;
1961 pcm_idx
= hinfo_to_pcm_index(codec
, hinfo
);
1962 if (snd_BUG_ON(pcm_idx
< 0))
1964 cvt_idx
= cvt_nid_to_cvt_index(codec
, hinfo
->nid
);
1965 if (snd_BUG_ON(cvt_idx
< 0))
1967 per_cvt
= get_cvt(spec
, cvt_idx
);
1969 snd_BUG_ON(!per_cvt
->assigned
);
1970 per_cvt
->assigned
= 0;
1973 azx_stream(get_azx_dev(substream
))->stripe
= 0;
1975 mutex_lock(&spec
->pcm_lock
);
1976 snd_hda_spdif_ctls_unassign(codec
, pcm_idx
);
1977 clear_bit(pcm_idx
, &spec
->pcm_in_use
);
1978 pin_idx
= hinfo_to_pin_index(codec
, hinfo
);
1979 if (spec
->dyn_pcm_assign
&& pin_idx
< 0)
1982 if (snd_BUG_ON(pin_idx
< 0)) {
1986 per_pin
= get_pin(spec
, pin_idx
);
1988 if (spec
->dyn_pin_out
) {
1989 snd_hda_set_dev_select(codec
, per_pin
->pin_nid
,
1991 pinctl
= snd_hda_codec_read(codec
, per_pin
->pin_nid
, 0,
1992 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
1993 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
1994 AC_VERB_SET_PIN_WIDGET_CONTROL
,
1998 mutex_lock(&per_pin
->lock
);
1999 per_pin
->chmap_set
= false;
2000 memset(per_pin
->chmap
, 0, sizeof(per_pin
->chmap
));
2002 per_pin
->setup
= false;
2003 per_pin
->channels
= 0;
2004 mutex_unlock(&per_pin
->lock
);
2006 mutex_unlock(&spec
->pcm_lock
);
2012 static const struct hda_pcm_ops generic_ops
= {
2013 .open
= hdmi_pcm_open
,
2014 .close
= hdmi_pcm_close
,
2015 .prepare
= generic_hdmi_playback_pcm_prepare
,
2016 .cleanup
= generic_hdmi_playback_pcm_cleanup
,
2019 static int hdmi_get_spk_alloc(struct hdac_device
*hdac
, int pcm_idx
)
2021 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
2022 struct hdmi_spec
*spec
= codec
->spec
;
2023 struct hdmi_spec_per_pin
*per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
2028 return per_pin
->sink_eld
.info
.spk_alloc
;
2031 static void hdmi_get_chmap(struct hdac_device
*hdac
, int pcm_idx
,
2032 unsigned char *chmap
)
2034 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
2035 struct hdmi_spec
*spec
= codec
->spec
;
2036 struct hdmi_spec_per_pin
*per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
2038 /* chmap is already set to 0 in caller */
2042 memcpy(chmap
, per_pin
->chmap
, ARRAY_SIZE(per_pin
->chmap
));
2045 static void hdmi_set_chmap(struct hdac_device
*hdac
, int pcm_idx
,
2046 unsigned char *chmap
, int prepared
)
2048 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
2049 struct hdmi_spec
*spec
= codec
->spec
;
2050 struct hdmi_spec_per_pin
*per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
2054 mutex_lock(&per_pin
->lock
);
2055 per_pin
->chmap_set
= true;
2056 memcpy(per_pin
->chmap
, chmap
, ARRAY_SIZE(per_pin
->chmap
));
2058 hdmi_setup_audio_infoframe(codec
, per_pin
, per_pin
->non_pcm
);
2059 mutex_unlock(&per_pin
->lock
);
2062 static bool is_hdmi_pcm_attached(struct hdac_device
*hdac
, int pcm_idx
)
2064 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
2065 struct hdmi_spec
*spec
= codec
->spec
;
2066 struct hdmi_spec_per_pin
*per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
2068 return per_pin
? true:false;
2071 static int generic_hdmi_build_pcms(struct hda_codec
*codec
)
2073 struct hdmi_spec
*spec
= codec
->spec
;
2077 * for non-mst mode, pcm number is the same as before
2078 * for DP MST mode without extra PCM, pcm number is same
2079 * for DP MST mode with extra PCMs, pcm number is
2080 * (nid number + dev_num - 1)
2081 * dev_num is the device entry number in a pin
2084 if (codec
->mst_no_extra_pcms
)
2085 pcm_num
= spec
->num_nids
;
2087 pcm_num
= spec
->num_nids
+ spec
->dev_num
- 1;
2089 codec_dbg(codec
, "hdmi: pcm_num set to %d\n", pcm_num
);
2091 for (idx
= 0; idx
< pcm_num
; idx
++) {
2092 struct hda_pcm
*info
;
2093 struct hda_pcm_stream
*pstr
;
2095 info
= snd_hda_codec_pcm_new(codec
, "HDMI %d", idx
);
2099 spec
->pcm_rec
[idx
].pcm
= info
;
2101 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
2102 info
->own_chmap
= true;
2104 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
2105 pstr
->substreams
= 1;
2106 pstr
->ops
= generic_ops
;
2107 /* pcm number is less than 16 */
2108 if (spec
->pcm_used
>= 16)
2110 /* other pstr fields are set in open */
2116 static void free_hdmi_jack_priv(struct snd_jack
*jack
)
2118 struct hdmi_pcm
*pcm
= jack
->private_data
;
2123 static int generic_hdmi_build_jack(struct hda_codec
*codec
, int pcm_idx
)
2125 char hdmi_str
[32] = "HDMI/DP";
2126 struct hdmi_spec
*spec
= codec
->spec
;
2127 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pcm_idx
);
2128 struct snd_jack
*jack
;
2129 int pcmdev
= get_pcm_rec(spec
, pcm_idx
)->device
;
2133 sprintf(hdmi_str
+ strlen(hdmi_str
), ",pcm=%d", pcmdev
);
2134 if (!spec
->dyn_pcm_assign
&&
2135 !is_jack_detectable(codec
, per_pin
->pin_nid
))
2136 strncat(hdmi_str
, " Phantom",
2137 sizeof(hdmi_str
) - strlen(hdmi_str
) - 1);
2139 err
= snd_jack_new(codec
->card
, hdmi_str
, SND_JACK_AVOUT
, &jack
,
2144 spec
->pcm_rec
[pcm_idx
].jack
= jack
;
2145 jack
->private_data
= &spec
->pcm_rec
[pcm_idx
];
2146 jack
->private_free
= free_hdmi_jack_priv
;
2150 static int generic_hdmi_build_controls(struct hda_codec
*codec
)
2152 struct hdmi_spec
*spec
= codec
->spec
;
2154 int pin_idx
, pcm_idx
;
2156 for (pcm_idx
= 0; pcm_idx
< spec
->pcm_used
; pcm_idx
++) {
2157 if (!get_pcm_rec(spec
, pcm_idx
)->pcm
) {
2158 /* no PCM: mark this for skipping permanently */
2159 set_bit(pcm_idx
, &spec
->pcm_bitmap
);
2163 err
= generic_hdmi_build_jack(codec
, pcm_idx
);
2167 /* create the spdif for each pcm
2168 * pin will be bound when monitor is connected
2170 if (spec
->dyn_pcm_assign
)
2171 err
= snd_hda_create_dig_out_ctls(codec
,
2172 0, spec
->cvt_nids
[0],
2175 struct hdmi_spec_per_pin
*per_pin
=
2176 get_pin(spec
, pcm_idx
);
2177 err
= snd_hda_create_dig_out_ctls(codec
,
2179 per_pin
->mux_nids
[0],
2184 snd_hda_spdif_ctls_unassign(codec
, pcm_idx
);
2186 dev
= get_pcm_rec(spec
, pcm_idx
)->device
;
2187 if (dev
!= SNDRV_PCM_INVALID_DEVICE
) {
2188 /* add control for ELD Bytes */
2189 err
= hdmi_create_eld_ctl(codec
, pcm_idx
, dev
);
2195 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2196 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2198 hdmi_present_sense(per_pin
, 0);
2201 /* add channel maps */
2202 for (pcm_idx
= 0; pcm_idx
< spec
->pcm_used
; pcm_idx
++) {
2203 struct hda_pcm
*pcm
;
2205 pcm
= get_pcm_rec(spec
, pcm_idx
);
2206 if (!pcm
|| !pcm
->pcm
)
2208 err
= snd_hdac_add_chmap_ctls(pcm
->pcm
, pcm_idx
, &spec
->chmap
);
2216 static int generic_hdmi_init_per_pins(struct hda_codec
*codec
)
2218 struct hdmi_spec
*spec
= codec
->spec
;
2221 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2222 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2224 per_pin
->codec
= codec
;
2225 mutex_init(&per_pin
->lock
);
2226 INIT_DELAYED_WORK(&per_pin
->work
, hdmi_repoll_eld
);
2227 eld_proc_new(per_pin
, pin_idx
);
2232 static int generic_hdmi_init(struct hda_codec
*codec
)
2234 struct hdmi_spec
*spec
= codec
->spec
;
2237 mutex_lock(&spec
->bind_lock
);
2238 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2239 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2240 hda_nid_t pin_nid
= per_pin
->pin_nid
;
2241 int dev_id
= per_pin
->dev_id
;
2243 snd_hda_set_dev_select(codec
, pin_nid
, dev_id
);
2244 hdmi_init_pin(codec
, pin_nid
);
2245 if (codec_has_acomp(codec
))
2247 snd_hda_jack_detect_enable_callback_mst(codec
, pin_nid
, dev_id
,
2250 mutex_unlock(&spec
->bind_lock
);
2254 static void hdmi_array_init(struct hdmi_spec
*spec
, int nums
)
2256 snd_array_init(&spec
->pins
, sizeof(struct hdmi_spec_per_pin
), nums
);
2257 snd_array_init(&spec
->cvts
, sizeof(struct hdmi_spec_per_cvt
), nums
);
2260 static void hdmi_array_free(struct hdmi_spec
*spec
)
2262 snd_array_free(&spec
->pins
);
2263 snd_array_free(&spec
->cvts
);
2266 static void generic_spec_free(struct hda_codec
*codec
)
2268 struct hdmi_spec
*spec
= codec
->spec
;
2271 hdmi_array_free(spec
);
2275 codec
->dp_mst
= false;
2278 static void generic_hdmi_free(struct hda_codec
*codec
)
2280 struct hdmi_spec
*spec
= codec
->spec
;
2281 int pin_idx
, pcm_idx
;
2283 if (spec
->acomp_registered
) {
2284 snd_hdac_acomp_exit(&codec
->bus
->core
);
2285 } else if (codec_has_acomp(codec
)) {
2286 snd_hdac_acomp_register_notifier(&codec
->bus
->core
, NULL
);
2288 codec
->relaxed_resume
= 0;
2290 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2291 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2292 cancel_delayed_work_sync(&per_pin
->work
);
2293 eld_proc_free(per_pin
);
2296 for (pcm_idx
= 0; pcm_idx
< spec
->pcm_used
; pcm_idx
++) {
2297 if (spec
->pcm_rec
[pcm_idx
].jack
== NULL
)
2299 if (spec
->dyn_pcm_assign
)
2300 snd_device_free(codec
->card
,
2301 spec
->pcm_rec
[pcm_idx
].jack
);
2303 spec
->pcm_rec
[pcm_idx
].jack
= NULL
;
2306 generic_spec_free(codec
);
2310 static int generic_hdmi_resume(struct hda_codec
*codec
)
2312 struct hdmi_spec
*spec
= codec
->spec
;
2315 codec
->patch_ops
.init(codec
);
2316 snd_hda_regmap_sync(codec
);
2318 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2319 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2320 hdmi_present_sense(per_pin
, 1);
2326 static const struct hda_codec_ops generic_hdmi_patch_ops
= {
2327 .init
= generic_hdmi_init
,
2328 .free
= generic_hdmi_free
,
2329 .build_pcms
= generic_hdmi_build_pcms
,
2330 .build_controls
= generic_hdmi_build_controls
,
2331 .unsol_event
= hdmi_unsol_event
,
2333 .resume
= generic_hdmi_resume
,
2337 static const struct hdmi_ops generic_standard_hdmi_ops
= {
2338 .pin_get_eld
= hdmi_pin_get_eld
,
2339 .pin_setup_infoframe
= hdmi_pin_setup_infoframe
,
2340 .pin_hbr_setup
= hdmi_pin_hbr_setup
,
2341 .setup_stream
= hdmi_setup_stream
,
2344 /* allocate codec->spec and assign/initialize generic parser ops */
2345 static int alloc_generic_hdmi(struct hda_codec
*codec
)
2347 struct hdmi_spec
*spec
;
2349 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
2353 spec
->codec
= codec
;
2354 spec
->ops
= generic_standard_hdmi_ops
;
2355 spec
->dev_num
= 1; /* initialize to 1 */
2356 mutex_init(&spec
->pcm_lock
);
2357 mutex_init(&spec
->bind_lock
);
2358 snd_hdac_register_chmap_ops(&codec
->core
, &spec
->chmap
);
2360 spec
->chmap
.ops
.get_chmap
= hdmi_get_chmap
;
2361 spec
->chmap
.ops
.set_chmap
= hdmi_set_chmap
;
2362 spec
->chmap
.ops
.is_pcm_attached
= is_hdmi_pcm_attached
;
2363 spec
->chmap
.ops
.get_spk_alloc
= hdmi_get_spk_alloc
,
2366 hdmi_array_init(spec
, 4);
2368 codec
->patch_ops
= generic_hdmi_patch_ops
;
2373 /* generic HDMI parser */
2374 static int patch_generic_hdmi(struct hda_codec
*codec
)
2378 err
= alloc_generic_hdmi(codec
);
2382 err
= hdmi_parse_codec(codec
);
2384 generic_spec_free(codec
);
2388 generic_hdmi_init_per_pins(codec
);
2393 * generic audio component binding
2396 /* turn on / off the unsol event jack detection dynamically */
2397 static void reprogram_jack_detect(struct hda_codec
*codec
, hda_nid_t nid
,
2398 int dev_id
, bool use_acomp
)
2400 struct hda_jack_tbl
*tbl
;
2402 tbl
= snd_hda_jack_tbl_get_mst(codec
, nid
, dev_id
);
2404 /* clear unsol even if component notifier is used, or re-enable
2405 * if notifier is cleared
2407 unsigned int val
= use_acomp
? 0 : (AC_USRSP_EN
| tbl
->tag
);
2408 snd_hda_codec_write_cache(codec
, nid
, 0,
2409 AC_VERB_SET_UNSOLICITED_ENABLE
, val
);
2413 /* set up / clear component notifier dynamically */
2414 static void generic_acomp_notifier_set(struct drm_audio_component
*acomp
,
2417 struct hdmi_spec
*spec
;
2420 spec
= container_of(acomp
->audio_ops
, struct hdmi_spec
, drm_audio_ops
);
2421 mutex_lock(&spec
->bind_lock
);
2422 spec
->use_acomp_notifier
= use_acomp
;
2423 spec
->codec
->relaxed_resume
= use_acomp
;
2424 /* reprogram each jack detection logic depending on the notifier */
2425 for (i
= 0; i
< spec
->num_pins
; i
++)
2426 reprogram_jack_detect(spec
->codec
,
2427 get_pin(spec
, i
)->pin_nid
,
2428 get_pin(spec
, i
)->dev_id
,
2430 mutex_unlock(&spec
->bind_lock
);
2433 /* enable / disable the notifier via master bind / unbind */
2434 static int generic_acomp_master_bind(struct device
*dev
,
2435 struct drm_audio_component
*acomp
)
2437 generic_acomp_notifier_set(acomp
, true);
2441 static void generic_acomp_master_unbind(struct device
*dev
,
2442 struct drm_audio_component
*acomp
)
2444 generic_acomp_notifier_set(acomp
, false);
2447 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2448 static int match_bound_vga(struct device
*dev
, int subtype
, void *data
)
2450 struct hdac_bus
*bus
= data
;
2451 struct pci_dev
*pci
, *master
;
2453 if (!dev_is_pci(dev
) || !dev_is_pci(bus
->dev
))
2455 master
= to_pci_dev(bus
->dev
);
2456 pci
= to_pci_dev(dev
);
2457 return master
->bus
== pci
->bus
;
2460 /* audio component notifier for AMD/Nvidia HDMI codecs */
2461 static void generic_acomp_pin_eld_notify(void *audio_ptr
, int port
, int dev_id
)
2463 struct hda_codec
*codec
= audio_ptr
;
2464 struct hdmi_spec
*spec
= codec
->spec
;
2465 hda_nid_t pin_nid
= spec
->port2pin(codec
, port
);
2469 if (get_wcaps_type(get_wcaps(codec
, pin_nid
)) != AC_WID_PIN
)
2471 /* skip notification during system suspend (but not in runtime PM);
2472 * the state will be updated at resume
2474 if (snd_power_get_state(codec
->card
) != SNDRV_CTL_POWER_D0
)
2476 /* ditto during suspend/resume process itself */
2477 if (snd_hdac_is_in_pm(&codec
->core
))
2480 check_presence_and_report(codec
, pin_nid
, dev_id
);
2483 /* set up the private drm_audio_ops from the template */
2484 static void setup_drm_audio_ops(struct hda_codec
*codec
,
2485 const struct drm_audio_component_audio_ops
*ops
)
2487 struct hdmi_spec
*spec
= codec
->spec
;
2489 spec
->drm_audio_ops
.audio_ptr
= codec
;
2490 /* intel_audio_codec_enable() or intel_audio_codec_disable()
2491 * will call pin_eld_notify with using audio_ptr pointer
2492 * We need make sure audio_ptr is really setup
2495 spec
->drm_audio_ops
.pin2port
= ops
->pin2port
;
2496 spec
->drm_audio_ops
.pin_eld_notify
= ops
->pin_eld_notify
;
2497 spec
->drm_audio_ops
.master_bind
= ops
->master_bind
;
2498 spec
->drm_audio_ops
.master_unbind
= ops
->master_unbind
;
2501 /* initialize the generic HDMI audio component */
2502 static void generic_acomp_init(struct hda_codec
*codec
,
2503 const struct drm_audio_component_audio_ops
*ops
,
2504 int (*port2pin
)(struct hda_codec
*, int))
2506 struct hdmi_spec
*spec
= codec
->spec
;
2508 spec
->port2pin
= port2pin
;
2509 setup_drm_audio_ops(codec
, ops
);
2510 if (!snd_hdac_acomp_init(&codec
->bus
->core
, &spec
->drm_audio_ops
,
2511 match_bound_vga
, 0)) {
2512 spec
->acomp_registered
= true;
2513 codec
->bus
->keep_power
= 0;
2518 * Intel codec parsers and helpers
2521 #define INTEL_GET_VENDOR_VERB 0xf81
2522 #define INTEL_SET_VENDOR_VERB 0x781
2523 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
2524 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2526 static void intel_haswell_enable_all_pins(struct hda_codec
*codec
,
2529 unsigned int vendor_param
;
2530 struct hdmi_spec
*spec
= codec
->spec
;
2532 vendor_param
= snd_hda_codec_read(codec
, spec
->vendor_nid
, 0,
2533 INTEL_GET_VENDOR_VERB
, 0);
2534 if (vendor_param
== -1 || vendor_param
& INTEL_EN_ALL_PIN_CVTS
)
2537 vendor_param
|= INTEL_EN_ALL_PIN_CVTS
;
2538 vendor_param
= snd_hda_codec_read(codec
, spec
->vendor_nid
, 0,
2539 INTEL_SET_VENDOR_VERB
, vendor_param
);
2540 if (vendor_param
== -1)
2544 snd_hda_codec_update_widgets(codec
);
2547 static void intel_haswell_fixup_enable_dp12(struct hda_codec
*codec
)
2549 unsigned int vendor_param
;
2550 struct hdmi_spec
*spec
= codec
->spec
;
2552 vendor_param
= snd_hda_codec_read(codec
, spec
->vendor_nid
, 0,
2553 INTEL_GET_VENDOR_VERB
, 0);
2554 if (vendor_param
== -1 || vendor_param
& INTEL_EN_DP12
)
2557 /* enable DP1.2 mode */
2558 vendor_param
|= INTEL_EN_DP12
;
2559 snd_hdac_regmap_add_vendor_verb(&codec
->core
, INTEL_SET_VENDOR_VERB
);
2560 snd_hda_codec_write_cache(codec
, spec
->vendor_nid
, 0,
2561 INTEL_SET_VENDOR_VERB
, vendor_param
);
2564 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2565 * Otherwise you may get severe h/w communication errors.
2567 static void haswell_set_power_state(struct hda_codec
*codec
, hda_nid_t fg
,
2568 unsigned int power_state
)
2570 if (power_state
== AC_PWRST_D0
) {
2571 intel_haswell_enable_all_pins(codec
, false);
2572 intel_haswell_fixup_enable_dp12(codec
);
2575 snd_hda_codec_read(codec
, fg
, 0, AC_VERB_SET_POWER_STATE
, power_state
);
2576 snd_hda_codec_set_power_to_all(codec
, fg
, power_state
);
2579 /* There is a fixed mapping between audio pin node and display port.
2580 * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2581 * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2582 * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2583 * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2586 * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2587 * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2588 * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2590 static int intel_base_nid(struct hda_codec
*codec
)
2592 switch (codec
->core
.vendor_id
) {
2593 case 0x80860054: /* ILK */
2594 case 0x80862804: /* ILK */
2595 case 0x80862882: /* VLV */
2602 static int intel_pin2port(void *audio_ptr
, int pin_nid
)
2604 struct hda_codec
*codec
= audio_ptr
;
2605 struct hdmi_spec
*spec
= codec
->spec
;
2608 if (!spec
->port_num
) {
2609 base_nid
= intel_base_nid(codec
);
2610 if (WARN_ON(pin_nid
< base_nid
|| pin_nid
>= base_nid
+ 3))
2612 return pin_nid
- base_nid
+ 1;
2616 * looking for the pin number in the mapping table and return
2617 * the index which indicate the port number
2619 for (i
= 0; i
< spec
->port_num
; i
++) {
2620 if (pin_nid
== spec
->port_map
[i
])
2624 codec_info(codec
, "Can't find the HDMI/DP port for pin %d\n", pin_nid
);
2628 static int intel_port2pin(struct hda_codec
*codec
, int port
)
2630 struct hdmi_spec
*spec
= codec
->spec
;
2632 if (!spec
->port_num
) {
2633 /* we assume only from port-B to port-D */
2634 if (port
< 1 || port
> 3)
2636 return port
+ intel_base_nid(codec
) - 1;
2639 if (port
< 0 || port
>= spec
->port_num
)
2641 return spec
->port_map
[port
];
2644 static void intel_pin_eld_notify(void *audio_ptr
, int port
, int pipe
)
2646 struct hda_codec
*codec
= audio_ptr
;
2650 pin_nid
= intel_port2pin(codec
, port
);
2653 /* skip notification during system suspend (but not in runtime PM);
2654 * the state will be updated at resume
2656 if (snd_power_get_state(codec
->card
) != SNDRV_CTL_POWER_D0
)
2658 /* ditto during suspend/resume process itself */
2659 if (snd_hdac_is_in_pm(&codec
->core
))
2662 snd_hdac_i915_set_bclk(&codec
->bus
->core
);
2663 check_presence_and_report(codec
, pin_nid
, dev_id
);
2666 static const struct drm_audio_component_audio_ops intel_audio_ops
= {
2667 .pin2port
= intel_pin2port
,
2668 .pin_eld_notify
= intel_pin_eld_notify
,
2671 /* register i915 component pin_eld_notify callback */
2672 static void register_i915_notifier(struct hda_codec
*codec
)
2674 struct hdmi_spec
*spec
= codec
->spec
;
2676 spec
->use_acomp_notifier
= true;
2677 spec
->port2pin
= intel_port2pin
;
2678 setup_drm_audio_ops(codec
, &intel_audio_ops
);
2679 snd_hdac_acomp_register_notifier(&codec
->bus
->core
,
2680 &spec
->drm_audio_ops
);
2681 /* no need for forcible resume for jack check thanks to notifier */
2682 codec
->relaxed_resume
= 1;
2685 /* setup_stream ops override for HSW+ */
2686 static int i915_hsw_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
2687 hda_nid_t pin_nid
, int dev_id
, u32 stream_tag
,
2690 haswell_verify_D0(codec
, cvt_nid
, pin_nid
);
2691 return hdmi_setup_stream(codec
, cvt_nid
, pin_nid
, dev_id
,
2692 stream_tag
, format
);
2695 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2696 static void i915_pin_cvt_fixup(struct hda_codec
*codec
,
2697 struct hdmi_spec_per_pin
*per_pin
,
2701 snd_hda_set_dev_select(codec
, per_pin
->pin_nid
,
2703 intel_verify_pin_cvt_connect(codec
, per_pin
);
2704 intel_not_share_assigned_cvt(codec
, per_pin
->pin_nid
,
2705 per_pin
->dev_id
, per_pin
->mux_idx
);
2707 intel_not_share_assigned_cvt_nid(codec
, 0, 0, cvt_nid
);
2711 /* precondition and allocation for Intel codecs */
2712 static int alloc_intel_hdmi(struct hda_codec
*codec
)
2716 /* requires i915 binding */
2717 if (!codec
->bus
->core
.audio_component
) {
2718 codec_info(codec
, "No i915 binding for Intel HDMI/DP codec\n");
2719 /* set probe_id here to prevent generic fallback binding */
2720 codec
->probe_id
= HDA_CODEC_ID_SKIP_PROBE
;
2724 err
= alloc_generic_hdmi(codec
);
2727 /* no need to handle unsol events */
2728 codec
->patch_ops
.unsol_event
= NULL
;
2732 /* parse and post-process for Intel codecs */
2733 static int parse_intel_hdmi(struct hda_codec
*codec
)
2735 int err
, retries
= 3;
2738 err
= hdmi_parse_codec(codec
);
2739 } while (err
< 0 && retries
--);
2742 generic_spec_free(codec
);
2746 generic_hdmi_init_per_pins(codec
);
2747 register_i915_notifier(codec
);
2751 /* Intel Haswell and onwards; audio component with eld notifier */
2752 static int intel_hsw_common_init(struct hda_codec
*codec
, hda_nid_t vendor_nid
,
2753 const int *port_map
, int port_num
)
2755 struct hdmi_spec
*spec
;
2758 err
= alloc_intel_hdmi(codec
);
2762 codec
->dp_mst
= true;
2763 spec
->dyn_pcm_assign
= true;
2764 spec
->vendor_nid
= vendor_nid
;
2765 spec
->port_map
= port_map
;
2766 spec
->port_num
= port_num
;
2767 spec
->intel_hsw_fixup
= true;
2769 intel_haswell_enable_all_pins(codec
, true);
2770 intel_haswell_fixup_enable_dp12(codec
);
2772 codec
->display_power_control
= 1;
2774 codec
->patch_ops
.set_power_state
= haswell_set_power_state
;
2775 codec
->depop_delay
= 0;
2776 codec
->auto_runtime_pm
= 1;
2778 spec
->ops
.setup_stream
= i915_hsw_setup_stream
;
2779 spec
->ops
.pin_cvt_fixup
= i915_pin_cvt_fixup
;
2781 return parse_intel_hdmi(codec
);
2784 static int patch_i915_hsw_hdmi(struct hda_codec
*codec
)
2786 return intel_hsw_common_init(codec
, 0x08, NULL
, 0);
2789 static int patch_i915_glk_hdmi(struct hda_codec
*codec
)
2791 return intel_hsw_common_init(codec
, 0x0b, NULL
, 0);
2794 static int patch_i915_icl_hdmi(struct hda_codec
*codec
)
2797 * pin to port mapping table where the value indicate the pin number and
2798 * the index indicate the port number.
2800 static const int map
[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
2802 return intel_hsw_common_init(codec
, 0x02, map
, ARRAY_SIZE(map
));
2805 static int patch_i915_tgl_hdmi(struct hda_codec
*codec
)
2808 * pin to port mapping table where the value indicate the pin number and
2809 * the index indicate the port number.
2811 static const int map
[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
2813 return intel_hsw_common_init(codec
, 0x02, map
, ARRAY_SIZE(map
));
2816 /* Intel Baytrail and Braswell; with eld notifier */
2817 static int patch_i915_byt_hdmi(struct hda_codec
*codec
)
2819 struct hdmi_spec
*spec
;
2822 err
= alloc_intel_hdmi(codec
);
2827 /* For Valleyview/Cherryview, only the display codec is in the display
2828 * power well and can use link_power ops to request/release the power.
2830 codec
->display_power_control
= 1;
2832 codec
->depop_delay
= 0;
2833 codec
->auto_runtime_pm
= 1;
2835 spec
->ops
.pin_cvt_fixup
= i915_pin_cvt_fixup
;
2837 return parse_intel_hdmi(codec
);
2840 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2841 static int patch_i915_cpt_hdmi(struct hda_codec
*codec
)
2845 err
= alloc_intel_hdmi(codec
);
2848 return parse_intel_hdmi(codec
);
2852 * Shared non-generic implementations
2855 static int simple_playback_build_pcms(struct hda_codec
*codec
)
2857 struct hdmi_spec
*spec
= codec
->spec
;
2858 struct hda_pcm
*info
;
2860 struct hda_pcm_stream
*pstr
;
2861 struct hdmi_spec_per_cvt
*per_cvt
;
2863 per_cvt
= get_cvt(spec
, 0);
2864 chans
= get_wcaps(codec
, per_cvt
->cvt_nid
);
2865 chans
= get_wcaps_channels(chans
);
2867 info
= snd_hda_codec_pcm_new(codec
, "HDMI 0");
2870 spec
->pcm_rec
[0].pcm
= info
;
2871 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
2872 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
2873 *pstr
= spec
->pcm_playback
;
2874 pstr
->nid
= per_cvt
->cvt_nid
;
2875 if (pstr
->channels_max
<= 2 && chans
&& chans
<= 16)
2876 pstr
->channels_max
= chans
;
2881 /* unsolicited event for jack sensing */
2882 static void simple_hdmi_unsol_event(struct hda_codec
*codec
,
2885 snd_hda_jack_set_dirty_all(codec
);
2886 snd_hda_jack_report_sync(codec
);
2889 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2890 * as long as spec->pins[] is set correctly
2892 #define simple_hdmi_build_jack generic_hdmi_build_jack
2894 static int simple_playback_build_controls(struct hda_codec
*codec
)
2896 struct hdmi_spec
*spec
= codec
->spec
;
2897 struct hdmi_spec_per_cvt
*per_cvt
;
2900 per_cvt
= get_cvt(spec
, 0);
2901 err
= snd_hda_create_dig_out_ctls(codec
, per_cvt
->cvt_nid
,
2906 return simple_hdmi_build_jack(codec
, 0);
2909 static int simple_playback_init(struct hda_codec
*codec
)
2911 struct hdmi_spec
*spec
= codec
->spec
;
2912 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, 0);
2913 hda_nid_t pin
= per_pin
->pin_nid
;
2915 snd_hda_codec_write(codec
, pin
, 0,
2916 AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
);
2917 /* some codecs require to unmute the pin */
2918 if (get_wcaps(codec
, pin
) & AC_WCAP_OUT_AMP
)
2919 snd_hda_codec_write(codec
, pin
, 0, AC_VERB_SET_AMP_GAIN_MUTE
,
2921 snd_hda_jack_detect_enable(codec
, pin
, per_pin
->dev_id
);
2925 static void simple_playback_free(struct hda_codec
*codec
)
2927 struct hdmi_spec
*spec
= codec
->spec
;
2929 hdmi_array_free(spec
);
2934 * Nvidia specific implementations
2937 #define Nv_VERB_SET_Channel_Allocation 0xF79
2938 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2939 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2940 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2942 #define nvhdmi_master_con_nid_7x 0x04
2943 #define nvhdmi_master_pin_nid_7x 0x05
2945 static const hda_nid_t nvhdmi_con_nids_7x
[4] = {
2946 /*front, rear, clfe, rear_surr */
2950 static const struct hda_verb nvhdmi_basic_init_7x_2ch
[] = {
2951 /* set audio protect on */
2952 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
2953 /* enable digital output on pin widget */
2954 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2958 static const struct hda_verb nvhdmi_basic_init_7x_8ch
[] = {
2959 /* set audio protect on */
2960 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
2961 /* enable digital output on pin widget */
2962 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2963 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2964 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2965 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2966 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2970 #ifdef LIMITED_RATE_FMT_SUPPORT
2971 /* support only the safe format and rate */
2972 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2973 #define SUPPORTED_MAXBPS 16
2974 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2976 /* support all rates and formats */
2977 #define SUPPORTED_RATES \
2978 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2979 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2980 SNDRV_PCM_RATE_192000)
2981 #define SUPPORTED_MAXBPS 24
2982 #define SUPPORTED_FORMATS \
2983 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2986 static int nvhdmi_7x_init_2ch(struct hda_codec
*codec
)
2988 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_2ch
);
2992 static int nvhdmi_7x_init_8ch(struct hda_codec
*codec
)
2994 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_8ch
);
2998 static const unsigned int channels_2_6_8
[] = {
3002 static const unsigned int channels_2_8
[] = {
3006 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels
= {
3007 .count
= ARRAY_SIZE(channels_2_6_8
),
3008 .list
= channels_2_6_8
,
3012 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels
= {
3013 .count
= ARRAY_SIZE(channels_2_8
),
3014 .list
= channels_2_8
,
3018 static int simple_playback_pcm_open(struct hda_pcm_stream
*hinfo
,
3019 struct hda_codec
*codec
,
3020 struct snd_pcm_substream
*substream
)
3022 struct hdmi_spec
*spec
= codec
->spec
;
3023 const struct snd_pcm_hw_constraint_list
*hw_constraints_channels
= NULL
;
3025 switch (codec
->preset
->vendor_id
) {
3030 hw_constraints_channels
= &hw_constraints_2_8_channels
;
3033 hw_constraints_channels
= &hw_constraints_2_6_8_channels
;
3039 if (hw_constraints_channels
!= NULL
) {
3040 snd_pcm_hw_constraint_list(substream
->runtime
, 0,
3041 SNDRV_PCM_HW_PARAM_CHANNELS
,
3042 hw_constraints_channels
);
3044 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
3045 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
3048 return snd_hda_multi_out_dig_open(codec
, &spec
->multiout
);
3051 static int simple_playback_pcm_close(struct hda_pcm_stream
*hinfo
,
3052 struct hda_codec
*codec
,
3053 struct snd_pcm_substream
*substream
)
3055 struct hdmi_spec
*spec
= codec
->spec
;
3056 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
3059 static int simple_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
3060 struct hda_codec
*codec
,
3061 unsigned int stream_tag
,
3062 unsigned int format
,
3063 struct snd_pcm_substream
*substream
)
3065 struct hdmi_spec
*spec
= codec
->spec
;
3066 return snd_hda_multi_out_dig_prepare(codec
, &spec
->multiout
,
3067 stream_tag
, format
, substream
);
3070 static const struct hda_pcm_stream simple_pcm_playback
= {
3075 .open
= simple_playback_pcm_open
,
3076 .close
= simple_playback_pcm_close
,
3077 .prepare
= simple_playback_pcm_prepare
3081 static const struct hda_codec_ops simple_hdmi_patch_ops
= {
3082 .build_controls
= simple_playback_build_controls
,
3083 .build_pcms
= simple_playback_build_pcms
,
3084 .init
= simple_playback_init
,
3085 .free
= simple_playback_free
,
3086 .unsol_event
= simple_hdmi_unsol_event
,
3089 static int patch_simple_hdmi(struct hda_codec
*codec
,
3090 hda_nid_t cvt_nid
, hda_nid_t pin_nid
)
3092 struct hdmi_spec
*spec
;
3093 struct hdmi_spec_per_cvt
*per_cvt
;
3094 struct hdmi_spec_per_pin
*per_pin
;
3096 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
3100 spec
->codec
= codec
;
3102 hdmi_array_init(spec
, 1);
3104 spec
->multiout
.num_dacs
= 0; /* no analog */
3105 spec
->multiout
.max_channels
= 2;
3106 spec
->multiout
.dig_out_nid
= cvt_nid
;
3109 per_pin
= snd_array_new(&spec
->pins
);
3110 per_cvt
= snd_array_new(&spec
->cvts
);
3111 if (!per_pin
|| !per_cvt
) {
3112 simple_playback_free(codec
);
3115 per_cvt
->cvt_nid
= cvt_nid
;
3116 per_pin
->pin_nid
= pin_nid
;
3117 spec
->pcm_playback
= simple_pcm_playback
;
3119 codec
->patch_ops
= simple_hdmi_patch_ops
;
3124 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec
*codec
,
3127 unsigned int chanmask
;
3128 int chan
= channels
? (channels
- 1) : 1;
3147 /* Set the audio infoframe channel allocation and checksum fields. The
3148 * channel count is computed implicitly by the hardware. */
3149 snd_hda_codec_write(codec
, 0x1, 0,
3150 Nv_VERB_SET_Channel_Allocation
, chanmask
);
3152 snd_hda_codec_write(codec
, 0x1, 0,
3153 Nv_VERB_SET_Info_Frame_Checksum
,
3154 (0x71 - chan
- chanmask
));
3157 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream
*hinfo
,
3158 struct hda_codec
*codec
,
3159 struct snd_pcm_substream
*substream
)
3161 struct hdmi_spec
*spec
= codec
->spec
;
3164 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
,
3165 0, AC_VERB_SET_CHANNEL_STREAMID
, 0);
3166 for (i
= 0; i
< 4; i
++) {
3167 /* set the stream id */
3168 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
3169 AC_VERB_SET_CHANNEL_STREAMID
, 0);
3170 /* set the stream format */
3171 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
3172 AC_VERB_SET_STREAM_FORMAT
, 0);
3175 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3176 * streams are disabled. */
3177 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
3179 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
3182 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream
*hinfo
,
3183 struct hda_codec
*codec
,
3184 unsigned int stream_tag
,
3185 unsigned int format
,
3186 struct snd_pcm_substream
*substream
)
3189 unsigned int dataDCC2
, channel_id
;
3191 struct hdmi_spec
*spec
= codec
->spec
;
3192 struct hda_spdif_out
*spdif
;
3193 struct hdmi_spec_per_cvt
*per_cvt
;
3195 mutex_lock(&codec
->spdif_mutex
);
3196 per_cvt
= get_cvt(spec
, 0);
3197 spdif
= snd_hda_spdif_out_of_nid(codec
, per_cvt
->cvt_nid
);
3199 chs
= substream
->runtime
->channels
;
3203 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3204 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
))
3205 snd_hda_codec_write(codec
,
3206 nvhdmi_master_con_nid_7x
,
3208 AC_VERB_SET_DIGI_CONVERT_1
,
3209 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
3211 /* set the stream id */
3212 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
3213 AC_VERB_SET_CHANNEL_STREAMID
, (stream_tag
<< 4) | 0x0);
3215 /* set the stream format */
3216 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
3217 AC_VERB_SET_STREAM_FORMAT
, format
);
3219 /* turn on again (if needed) */
3220 /* enable and set the channel status audio/data flag */
3221 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
)) {
3222 snd_hda_codec_write(codec
,
3223 nvhdmi_master_con_nid_7x
,
3225 AC_VERB_SET_DIGI_CONVERT_1
,
3226 spdif
->ctls
& 0xff);
3227 snd_hda_codec_write(codec
,
3228 nvhdmi_master_con_nid_7x
,
3230 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
3233 for (i
= 0; i
< 4; i
++) {
3239 /* turn off SPDIF once;
3240 *otherwise the IEC958 bits won't be updated
3242 if (codec
->spdif_status_reset
&&
3243 (spdif
->ctls
& AC_DIG1_ENABLE
))
3244 snd_hda_codec_write(codec
,
3245 nvhdmi_con_nids_7x
[i
],
3247 AC_VERB_SET_DIGI_CONVERT_1
,
3248 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
3249 /* set the stream id */
3250 snd_hda_codec_write(codec
,
3251 nvhdmi_con_nids_7x
[i
],
3253 AC_VERB_SET_CHANNEL_STREAMID
,
3254 (stream_tag
<< 4) | channel_id
);
3255 /* set the stream format */
3256 snd_hda_codec_write(codec
,
3257 nvhdmi_con_nids_7x
[i
],
3259 AC_VERB_SET_STREAM_FORMAT
,
3261 /* turn on again (if needed) */
3262 /* enable and set the channel status audio/data flag */
3263 if (codec
->spdif_status_reset
&&
3264 (spdif
->ctls
& AC_DIG1_ENABLE
)) {
3265 snd_hda_codec_write(codec
,
3266 nvhdmi_con_nids_7x
[i
],
3268 AC_VERB_SET_DIGI_CONVERT_1
,
3269 spdif
->ctls
& 0xff);
3270 snd_hda_codec_write(codec
,
3271 nvhdmi_con_nids_7x
[i
],
3273 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
3277 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, chs
);
3279 mutex_unlock(&codec
->spdif_mutex
);
3283 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x
= {
3287 .nid
= nvhdmi_master_con_nid_7x
,
3288 .rates
= SUPPORTED_RATES
,
3289 .maxbps
= SUPPORTED_MAXBPS
,
3290 .formats
= SUPPORTED_FORMATS
,
3292 .open
= simple_playback_pcm_open
,
3293 .close
= nvhdmi_8ch_7x_pcm_close
,
3294 .prepare
= nvhdmi_8ch_7x_pcm_prepare
3298 static int patch_nvhdmi_2ch(struct hda_codec
*codec
)
3300 struct hdmi_spec
*spec
;
3301 int err
= patch_simple_hdmi(codec
, nvhdmi_master_con_nid_7x
,
3302 nvhdmi_master_pin_nid_7x
);
3306 codec
->patch_ops
.init
= nvhdmi_7x_init_2ch
;
3307 /* override the PCM rates, etc, as the codec doesn't give full list */
3309 spec
->pcm_playback
.rates
= SUPPORTED_RATES
;
3310 spec
->pcm_playback
.maxbps
= SUPPORTED_MAXBPS
;
3311 spec
->pcm_playback
.formats
= SUPPORTED_FORMATS
;
3315 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec
*codec
)
3317 struct hdmi_spec
*spec
= codec
->spec
;
3318 int err
= simple_playback_build_pcms(codec
);
3320 struct hda_pcm
*info
= get_pcm_rec(spec
, 0);
3321 info
->own_chmap
= true;
3326 static int nvhdmi_7x_8ch_build_controls(struct hda_codec
*codec
)
3328 struct hdmi_spec
*spec
= codec
->spec
;
3329 struct hda_pcm
*info
;
3330 struct snd_pcm_chmap
*chmap
;
3333 err
= simple_playback_build_controls(codec
);
3337 /* add channel maps */
3338 info
= get_pcm_rec(spec
, 0);
3339 err
= snd_pcm_add_chmap_ctls(info
->pcm
,
3340 SNDRV_PCM_STREAM_PLAYBACK
,
3341 snd_pcm_alt_chmaps
, 8, 0, &chmap
);
3344 switch (codec
->preset
->vendor_id
) {
3349 chmap
->channel_mask
= (1U << 2) | (1U << 8);
3352 chmap
->channel_mask
= (1U << 2) | (1U << 6) | (1U << 8);
3357 static int patch_nvhdmi_8ch_7x(struct hda_codec
*codec
)
3359 struct hdmi_spec
*spec
;
3360 int err
= patch_nvhdmi_2ch(codec
);
3364 spec
->multiout
.max_channels
= 8;
3365 spec
->pcm_playback
= nvhdmi_pcm_playback_8ch_7x
;
3366 codec
->patch_ops
.init
= nvhdmi_7x_init_8ch
;
3367 codec
->patch_ops
.build_pcms
= nvhdmi_7x_8ch_build_pcms
;
3368 codec
->patch_ops
.build_controls
= nvhdmi_7x_8ch_build_controls
;
3370 /* Initialize the audio infoframe channel mask and checksum to something
3372 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
3378 * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3382 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap
*chmap
,
3383 struct hdac_cea_channel_speaker_allocation
*cap
, int channels
)
3385 if (cap
->ca_index
== 0x00 && channels
== 2)
3386 return SNDRV_CTL_TLVT_CHMAP_FIXED
;
3388 /* If the speaker allocation matches the channel count, it is OK. */
3389 if (cap
->channels
!= channels
)
3392 /* all channels are remappable freely */
3393 return SNDRV_CTL_TLVT_CHMAP_VAR
;
3396 static int nvhdmi_chmap_validate(struct hdac_chmap
*chmap
,
3397 int ca
, int chs
, unsigned char *map
)
3399 if (ca
== 0x00 && (map
[0] != SNDRV_CHMAP_FL
|| map
[1] != SNDRV_CHMAP_FR
))
3405 /* map from pin NID to port; port is 0-based */
3406 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
3407 static int nvhdmi_pin2port(void *audio_ptr
, int pin_nid
)
3412 /* reverse-map from port to pin NID: see above */
3413 static int nvhdmi_port2pin(struct hda_codec
*codec
, int port
)
3418 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops
= {
3419 .pin2port
= nvhdmi_pin2port
,
3420 .pin_eld_notify
= generic_acomp_pin_eld_notify
,
3421 .master_bind
= generic_acomp_master_bind
,
3422 .master_unbind
= generic_acomp_master_unbind
,
3425 static int patch_nvhdmi(struct hda_codec
*codec
)
3427 struct hdmi_spec
*spec
;
3430 err
= alloc_generic_hdmi(codec
);
3433 codec
->dp_mst
= true;
3436 spec
->dyn_pcm_assign
= true;
3438 err
= hdmi_parse_codec(codec
);
3440 generic_spec_free(codec
);
3444 generic_hdmi_init_per_pins(codec
);
3446 spec
->dyn_pin_out
= true;
3448 spec
->chmap
.ops
.chmap_cea_alloc_validate_get_type
=
3449 nvhdmi_chmap_cea_alloc_validate_get_type
;
3450 spec
->chmap
.ops
.chmap_validate
= nvhdmi_chmap_validate
;
3452 codec
->link_down_at_suspend
= 1;
3454 generic_acomp_init(codec
, &nvhdmi_audio_ops
, nvhdmi_port2pin
);
3459 static int patch_nvhdmi_legacy(struct hda_codec
*codec
)
3461 struct hdmi_spec
*spec
;
3464 err
= patch_generic_hdmi(codec
);
3469 spec
->dyn_pin_out
= true;
3471 spec
->chmap
.ops
.chmap_cea_alloc_validate_get_type
=
3472 nvhdmi_chmap_cea_alloc_validate_get_type
;
3473 spec
->chmap
.ops
.chmap_validate
= nvhdmi_chmap_validate
;
3475 codec
->link_down_at_suspend
= 1;
3481 * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3482 * accessed using vendor-defined verbs. These registers can be used for
3483 * interoperability between the HDA and HDMI drivers.
3486 /* Audio Function Group node */
3487 #define NVIDIA_AFG_NID 0x01
3490 * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3491 * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3492 * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3493 * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3494 * additional bit (at position 30) to signal the validity of the format.
3496 * | 31 | 30 | 29 16 | 15 0 |
3497 * +---------+-------+--------+--------+
3498 * | TRIGGER | VALID | UNUSED | FORMAT |
3499 * +-----------------------------------|
3501 * Note that for the trigger bit to take effect it needs to change value
3502 * (i.e. it needs to be toggled).
3504 #define NVIDIA_GET_SCRATCH0 0xfa6
3505 #define NVIDIA_SET_SCRATCH0_BYTE0 0xfa7
3506 #define NVIDIA_SET_SCRATCH0_BYTE1 0xfa8
3507 #define NVIDIA_SET_SCRATCH0_BYTE2 0xfa9
3508 #define NVIDIA_SET_SCRATCH0_BYTE3 0xfaa
3509 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3510 #define NVIDIA_SCRATCH_VALID (1 << 6)
3512 #define NVIDIA_GET_SCRATCH1 0xfab
3513 #define NVIDIA_SET_SCRATCH1_BYTE0 0xfac
3514 #define NVIDIA_SET_SCRATCH1_BYTE1 0xfad
3515 #define NVIDIA_SET_SCRATCH1_BYTE2 0xfae
3516 #define NVIDIA_SET_SCRATCH1_BYTE3 0xfaf
3519 * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3520 * the format is invalidated so that the HDMI codec can be disabled.
3522 static void tegra_hdmi_set_format(struct hda_codec
*codec
, unsigned int format
)
3526 /* bits [31:30] contain the trigger and valid bits */
3527 value
= snd_hda_codec_read(codec
, NVIDIA_AFG_NID
, 0,
3528 NVIDIA_GET_SCRATCH0
, 0);
3529 value
= (value
>> 24) & 0xff;
3531 /* bits [15:0] are used to store the HDA format */
3532 snd_hda_codec_write(codec
, NVIDIA_AFG_NID
, 0,
3533 NVIDIA_SET_SCRATCH0_BYTE0
,
3534 (format
>> 0) & 0xff);
3535 snd_hda_codec_write(codec
, NVIDIA_AFG_NID
, 0,
3536 NVIDIA_SET_SCRATCH0_BYTE1
,
3537 (format
>> 8) & 0xff);
3539 /* bits [16:24] are unused */
3540 snd_hda_codec_write(codec
, NVIDIA_AFG_NID
, 0,
3541 NVIDIA_SET_SCRATCH0_BYTE2
, 0);
3544 * Bit 30 signals that the data is valid and hence that HDMI audio can
3548 value
&= ~NVIDIA_SCRATCH_VALID
;
3550 value
|= NVIDIA_SCRATCH_VALID
;
3553 * Whenever the trigger bit is toggled, an interrupt is raised in the
3554 * HDMI codec. The HDMI driver will use that as trigger to update its
3557 value
^= NVIDIA_SCRATCH_TRIGGER
;
3559 snd_hda_codec_write(codec
, NVIDIA_AFG_NID
, 0,
3560 NVIDIA_SET_SCRATCH0_BYTE3
, value
);
3563 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream
*hinfo
,
3564 struct hda_codec
*codec
,
3565 unsigned int stream_tag
,
3566 unsigned int format
,
3567 struct snd_pcm_substream
*substream
)
3571 err
= generic_hdmi_playback_pcm_prepare(hinfo
, codec
, stream_tag
,
3576 /* notify the HDMI codec of the format change */
3577 tegra_hdmi_set_format(codec
, format
);
3582 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream
*hinfo
,
3583 struct hda_codec
*codec
,
3584 struct snd_pcm_substream
*substream
)
3586 /* invalidate the format in the HDMI codec */
3587 tegra_hdmi_set_format(codec
, 0);
3589 return generic_hdmi_playback_pcm_cleanup(hinfo
, codec
, substream
);
3592 static struct hda_pcm
*hda_find_pcm_by_type(struct hda_codec
*codec
, int type
)
3594 struct hdmi_spec
*spec
= codec
->spec
;
3597 for (i
= 0; i
< spec
->num_pins
; i
++) {
3598 struct hda_pcm
*pcm
= get_pcm_rec(spec
, i
);
3600 if (pcm
->pcm_type
== type
)
3607 static int tegra_hdmi_build_pcms(struct hda_codec
*codec
)
3609 struct hda_pcm_stream
*stream
;
3610 struct hda_pcm
*pcm
;
3613 err
= generic_hdmi_build_pcms(codec
);
3617 pcm
= hda_find_pcm_by_type(codec
, HDA_PCM_TYPE_HDMI
);
3622 * Override ->prepare() and ->cleanup() operations to notify the HDMI
3623 * codec about format changes.
3625 stream
= &pcm
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
3626 stream
->ops
.prepare
= tegra_hdmi_pcm_prepare
;
3627 stream
->ops
.cleanup
= tegra_hdmi_pcm_cleanup
;
3632 static int patch_tegra_hdmi(struct hda_codec
*codec
)
3636 err
= patch_generic_hdmi(codec
);
3640 codec
->patch_ops
.build_pcms
= tegra_hdmi_build_pcms
;
3646 * ATI/AMD-specific implementations
3649 #define is_amdhdmi_rev3_or_later(codec) \
3650 ((codec)->core.vendor_id == 0x1002aa01 && \
3651 ((codec)->core.revision_id & 0xff00) >= 0x0300)
3652 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3654 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3655 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3656 #define ATI_VERB_SET_DOWNMIX_INFO 0x772
3657 #define ATI_VERB_SET_MULTICHANNEL_01 0x777
3658 #define ATI_VERB_SET_MULTICHANNEL_23 0x778
3659 #define ATI_VERB_SET_MULTICHANNEL_45 0x779
3660 #define ATI_VERB_SET_MULTICHANNEL_67 0x77a
3661 #define ATI_VERB_SET_HBR_CONTROL 0x77c
3662 #define ATI_VERB_SET_MULTICHANNEL_1 0x785
3663 #define ATI_VERB_SET_MULTICHANNEL_3 0x786
3664 #define ATI_VERB_SET_MULTICHANNEL_5 0x787
3665 #define ATI_VERB_SET_MULTICHANNEL_7 0x788
3666 #define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
3667 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3668 #define ATI_VERB_GET_DOWNMIX_INFO 0xf72
3669 #define ATI_VERB_GET_MULTICHANNEL_01 0xf77
3670 #define ATI_VERB_GET_MULTICHANNEL_23 0xf78
3671 #define ATI_VERB_GET_MULTICHANNEL_45 0xf79
3672 #define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
3673 #define ATI_VERB_GET_HBR_CONTROL 0xf7c
3674 #define ATI_VERB_GET_MULTICHANNEL_1 0xf85
3675 #define ATI_VERB_GET_MULTICHANNEL_3 0xf86
3676 #define ATI_VERB_GET_MULTICHANNEL_5 0xf87
3677 #define ATI_VERB_GET_MULTICHANNEL_7 0xf88
3678 #define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
3680 /* AMD specific HDA cvt verbs */
3681 #define ATI_VERB_SET_RAMP_RATE 0x770
3682 #define ATI_VERB_GET_RAMP_RATE 0xf70
3684 #define ATI_OUT_ENABLE 0x1
3686 #define ATI_MULTICHANNEL_MODE_PAIRED 0
3687 #define ATI_MULTICHANNEL_MODE_SINGLE 1
3689 #define ATI_HBR_CAPABLE 0x01
3690 #define ATI_HBR_ENABLE 0x10
3692 static int atihdmi_pin_get_eld(struct hda_codec
*codec
, hda_nid_t nid
,
3693 int dev_id
, unsigned char *buf
, int *eld_size
)
3695 WARN_ON(dev_id
!= 0);
3696 /* call hda_eld.c ATI/AMD-specific function */
3697 return snd_hdmi_get_eld_ati(codec
, nid
, buf
, eld_size
,
3698 is_amdhdmi_rev3_or_later(codec
));
3701 static void atihdmi_pin_setup_infoframe(struct hda_codec
*codec
,
3702 hda_nid_t pin_nid
, int dev_id
, int ca
,
3703 int active_channels
, int conn_type
)
3705 WARN_ON(dev_id
!= 0);
3706 snd_hda_codec_write(codec
, pin_nid
, 0, ATI_VERB_SET_CHANNEL_ALLOCATION
, ca
);
3709 static int atihdmi_paired_swap_fc_lfe(int pos
)
3712 * ATI/AMD have automatic FC/LFE swap built-in
3713 * when in pairwise mapping mode.
3717 /* see channel_allocations[].speakers[] */
3726 static int atihdmi_paired_chmap_validate(struct hdac_chmap
*chmap
,
3727 int ca
, int chs
, unsigned char *map
)
3729 struct hdac_cea_channel_speaker_allocation
*cap
;
3732 /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3734 cap
= snd_hdac_get_ch_alloc_from_ca(ca
);
3735 for (i
= 0; i
< chs
; ++i
) {
3736 int mask
= snd_hdac_chmap_to_spk_mask(map
[i
]);
3738 bool companion_ok
= false;
3743 for (j
= 0 + i
% 2; j
< 8; j
+= 2) {
3744 int chan_idx
= 7 - atihdmi_paired_swap_fc_lfe(j
);
3745 if (cap
->speakers
[chan_idx
] == mask
) {
3746 /* channel is in a supported position */
3749 if (i
% 2 == 0 && i
+ 1 < chs
) {
3750 /* even channel, check the odd companion */
3751 int comp_chan_idx
= 7 - atihdmi_paired_swap_fc_lfe(j
+ 1);
3752 int comp_mask_req
= snd_hdac_chmap_to_spk_mask(map
[i
+1]);
3753 int comp_mask_act
= cap
->speakers
[comp_chan_idx
];
3755 if (comp_mask_req
== comp_mask_act
)
3756 companion_ok
= true;
3768 i
++; /* companion channel already checked */
3774 static int atihdmi_pin_set_slot_channel(struct hdac_device
*hdac
,
3775 hda_nid_t pin_nid
, int hdmi_slot
, int stream_channel
)
3777 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
3779 int ati_channel_setup
= 0;
3784 if (!has_amd_full_remap_support(codec
)) {
3785 hdmi_slot
= atihdmi_paired_swap_fc_lfe(hdmi_slot
);
3787 /* In case this is an odd slot but without stream channel, do not
3788 * disable the slot since the corresponding even slot could have a
3789 * channel. In case neither have a channel, the slot pair will be
3790 * disabled when this function is called for the even slot. */
3791 if (hdmi_slot
% 2 != 0 && stream_channel
== 0xf)
3794 hdmi_slot
-= hdmi_slot
% 2;
3796 if (stream_channel
!= 0xf)
3797 stream_channel
-= stream_channel
% 2;
3800 verb
= ATI_VERB_SET_MULTICHANNEL_01
+ hdmi_slot
/2 + (hdmi_slot
% 2) * 0x00e;
3802 /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3804 if (stream_channel
!= 0xf)
3805 ati_channel_setup
= (stream_channel
<< 4) | ATI_OUT_ENABLE
;
3807 return snd_hda_codec_write(codec
, pin_nid
, 0, verb
, ati_channel_setup
);
3810 static int atihdmi_pin_get_slot_channel(struct hdac_device
*hdac
,
3811 hda_nid_t pin_nid
, int asp_slot
)
3813 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
3814 bool was_odd
= false;
3815 int ati_asp_slot
= asp_slot
;
3817 int ati_channel_setup
;
3822 if (!has_amd_full_remap_support(codec
)) {
3823 ati_asp_slot
= atihdmi_paired_swap_fc_lfe(asp_slot
);
3824 if (ati_asp_slot
% 2 != 0) {
3830 verb
= ATI_VERB_GET_MULTICHANNEL_01
+ ati_asp_slot
/2 + (ati_asp_slot
% 2) * 0x00e;
3832 ati_channel_setup
= snd_hda_codec_read(codec
, pin_nid
, 0, verb
, 0);
3834 if (!(ati_channel_setup
& ATI_OUT_ENABLE
))
3837 return ((ati_channel_setup
& 0xf0) >> 4) + !!was_odd
;
3840 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3841 struct hdac_chmap
*chmap
,
3842 struct hdac_cea_channel_speaker_allocation
*cap
,
3848 * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3849 * we need to take that into account (a single channel may take 2
3850 * channel slots if we need to carry a silent channel next to it).
3851 * On Rev3+ AMD codecs this function is not used.
3855 /* We only produce even-numbered channel count TLVs */
3856 if ((channels
% 2) != 0)
3859 for (c
= 0; c
< 7; c
+= 2) {
3860 if (cap
->speakers
[c
] || cap
->speakers
[c
+1])
3864 if (chanpairs
* 2 != channels
)
3867 return SNDRV_CTL_TLVT_CHMAP_PAIRED
;
3870 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap
*hchmap
,
3871 struct hdac_cea_channel_speaker_allocation
*cap
,
3872 unsigned int *chmap
, int channels
)
3874 /* produce paired maps for pre-rev3 ATI/AMD codecs */
3878 for (c
= 7; c
>= 0; c
--) {
3879 int chan
= 7 - atihdmi_paired_swap_fc_lfe(7 - c
);
3880 int spk
= cap
->speakers
[chan
];
3882 /* add N/A channel if the companion channel is occupied */
3883 if (cap
->speakers
[chan
+ (chan
% 2 ? -1 : 1)])
3884 chmap
[count
++] = SNDRV_CHMAP_NA
;
3889 chmap
[count
++] = snd_hdac_spk_to_chmap(spk
);
3892 WARN_ON(count
!= channels
);
3895 static int atihdmi_pin_hbr_setup(struct hda_codec
*codec
, hda_nid_t pin_nid
,
3896 int dev_id
, bool hbr
)
3898 int hbr_ctl
, hbr_ctl_new
;
3900 WARN_ON(dev_id
!= 0);
3902 hbr_ctl
= snd_hda_codec_read(codec
, pin_nid
, 0, ATI_VERB_GET_HBR_CONTROL
, 0);
3903 if (hbr_ctl
>= 0 && (hbr_ctl
& ATI_HBR_CAPABLE
)) {
3905 hbr_ctl_new
= hbr_ctl
| ATI_HBR_ENABLE
;
3907 hbr_ctl_new
= hbr_ctl
& ~ATI_HBR_ENABLE
;
3910 "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3912 hbr_ctl
== hbr_ctl_new
? "" : "new-",
3915 if (hbr_ctl
!= hbr_ctl_new
)
3916 snd_hda_codec_write(codec
, pin_nid
, 0,
3917 ATI_VERB_SET_HBR_CONTROL
,
3926 static int atihdmi_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
3927 hda_nid_t pin_nid
, int dev_id
,
3928 u32 stream_tag
, int format
)
3930 if (is_amdhdmi_rev3_or_later(codec
)) {
3931 int ramp_rate
= 180; /* default as per AMD spec */
3932 /* disable ramp-up/down for non-pcm as per AMD spec */
3933 if (format
& AC_FMT_TYPE_NON_PCM
)
3936 snd_hda_codec_write(codec
, cvt_nid
, 0, ATI_VERB_SET_RAMP_RATE
, ramp_rate
);
3939 return hdmi_setup_stream(codec
, cvt_nid
, pin_nid
, dev_id
,
3940 stream_tag
, format
);
3944 static int atihdmi_init(struct hda_codec
*codec
)
3946 struct hdmi_spec
*spec
= codec
->spec
;
3949 err
= generic_hdmi_init(codec
);
3954 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
3955 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
3957 /* make sure downmix information in infoframe is zero */
3958 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0, ATI_VERB_SET_DOWNMIX_INFO
, 0);
3960 /* enable channel-wise remap mode if supported */
3961 if (has_amd_full_remap_support(codec
))
3962 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
3963 ATI_VERB_SET_MULTICHANNEL_MODE
,
3964 ATI_MULTICHANNEL_MODE_SINGLE
);
3966 codec
->auto_runtime_pm
= 1;
3971 /* map from pin NID to port; port is 0-based */
3972 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
3973 static int atihdmi_pin2port(void *audio_ptr
, int pin_nid
)
3975 return pin_nid
/ 2 - 1;
3978 /* reverse-map from port to pin NID: see above */
3979 static int atihdmi_port2pin(struct hda_codec
*codec
, int port
)
3981 return port
* 2 + 3;
3984 static const struct drm_audio_component_audio_ops atihdmi_audio_ops
= {
3985 .pin2port
= atihdmi_pin2port
,
3986 .pin_eld_notify
= generic_acomp_pin_eld_notify
,
3987 .master_bind
= generic_acomp_master_bind
,
3988 .master_unbind
= generic_acomp_master_unbind
,
3991 static int patch_atihdmi(struct hda_codec
*codec
)
3993 struct hdmi_spec
*spec
;
3994 struct hdmi_spec_per_cvt
*per_cvt
;
3997 err
= patch_generic_hdmi(codec
);
4002 codec
->patch_ops
.init
= atihdmi_init
;
4006 spec
->ops
.pin_get_eld
= atihdmi_pin_get_eld
;
4007 spec
->ops
.pin_setup_infoframe
= atihdmi_pin_setup_infoframe
;
4008 spec
->ops
.pin_hbr_setup
= atihdmi_pin_hbr_setup
;
4009 spec
->ops
.setup_stream
= atihdmi_setup_stream
;
4011 spec
->chmap
.ops
.pin_get_slot_channel
= atihdmi_pin_get_slot_channel
;
4012 spec
->chmap
.ops
.pin_set_slot_channel
= atihdmi_pin_set_slot_channel
;
4014 if (!has_amd_full_remap_support(codec
)) {
4015 /* override to ATI/AMD-specific versions with pairwise mapping */
4016 spec
->chmap
.ops
.chmap_cea_alloc_validate_get_type
=
4017 atihdmi_paired_chmap_cea_alloc_validate_get_type
;
4018 spec
->chmap
.ops
.cea_alloc_to_tlv_chmap
=
4019 atihdmi_paired_cea_alloc_to_tlv_chmap
;
4020 spec
->chmap
.ops
.chmap_validate
= atihdmi_paired_chmap_validate
;
4023 /* ATI/AMD converters do not advertise all of their capabilities */
4024 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
4025 per_cvt
= get_cvt(spec
, cvt_idx
);
4026 per_cvt
->channels_max
= max(per_cvt
->channels_max
, 8u);
4027 per_cvt
->rates
|= SUPPORTED_RATES
;
4028 per_cvt
->formats
|= SUPPORTED_FORMATS
;
4029 per_cvt
->maxbps
= max(per_cvt
->maxbps
, 24u);
4032 spec
->chmap
.channels_max
= max(spec
->chmap
.channels_max
, 8u);
4034 /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4035 * the link-down as is. Tell the core to allow it.
4037 codec
->link_down_at_suspend
= 1;
4039 generic_acomp_init(codec
, &atihdmi_audio_ops
, atihdmi_port2pin
);
4044 /* VIA HDMI Implementation */
4045 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
4046 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
4048 static int patch_via_hdmi(struct hda_codec
*codec
)
4050 return patch_simple_hdmi(codec
, VIAHDMI_CVT_NID
, VIAHDMI_PIN_NID
);
4056 static const struct hda_device_id snd_hda_id_hdmi
[] = {
4057 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI", patch_atihdmi
),
4058 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI", patch_atihdmi
),
4059 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI", patch_atihdmi
),
4060 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI", patch_atihdmi
),
4061 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI", patch_generic_hdmi
),
4062 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI", patch_generic_hdmi
),
4063 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI", patch_generic_hdmi
),
4064 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI", patch_nvhdmi_2ch
),
4065 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x
),
4066 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x
),
4067 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI", patch_nvhdmi_8ch_7x
),
4068 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x
),
4069 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x
),
4070 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI", patch_nvhdmi_8ch_7x
),
4071 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP", patch_nvhdmi_legacy
),
4072 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP", patch_nvhdmi_legacy
),
4073 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP", patch_nvhdmi_legacy
),
4074 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP", patch_nvhdmi_legacy
),
4075 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI", patch_nvhdmi_legacy
),
4076 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP", patch_nvhdmi_legacy
),
4077 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP", patch_nvhdmi_legacy
),
4078 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP", patch_nvhdmi_legacy
),
4079 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP", patch_nvhdmi_legacy
),
4080 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP", patch_nvhdmi_legacy
),
4081 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP", patch_nvhdmi_legacy
),
4082 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP", patch_nvhdmi_legacy
),
4083 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP", patch_nvhdmi_legacy
),
4084 /* 17 is known to be absent */
4085 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP", patch_nvhdmi_legacy
),
4086 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP", patch_nvhdmi_legacy
),
4087 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP", patch_nvhdmi_legacy
),
4088 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP", patch_nvhdmi_legacy
),
4089 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP", patch_nvhdmi_legacy
),
4090 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI", patch_tegra_hdmi
),
4091 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI", patch_tegra_hdmi
),
4092 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI", patch_tegra_hdmi
),
4093 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi
),
4094 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi
),
4095 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi
),
4096 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi
),
4097 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi
),
4098 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP", patch_nvhdmi
),
4099 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP", patch_nvhdmi
),
4100 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi
),
4101 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP", patch_nvhdmi
),
4102 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP", patch_nvhdmi
),
4103 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP", patch_nvhdmi
),
4104 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP", patch_nvhdmi
),
4105 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP", patch_nvhdmi
),
4106 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP", patch_nvhdmi
),
4107 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP", patch_nvhdmi
),
4108 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP", patch_nvhdmi
),
4109 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP", patch_nvhdmi
),
4110 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI", patch_nvhdmi_2ch
),
4111 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP", patch_nvhdmi
),
4112 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP", patch_nvhdmi
),
4113 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP", patch_nvhdmi
),
4114 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP", patch_nvhdmi
),
4115 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP", patch_nvhdmi
),
4116 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP", patch_nvhdmi
),
4117 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP", patch_nvhdmi
),
4118 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP", patch_nvhdmi
),
4119 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP", patch_nvhdmi
),
4120 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP", patch_nvhdmi
),
4121 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP", patch_nvhdmi
),
4122 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP", patch_nvhdmi
),
4123 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP", patch_nvhdmi
),
4124 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP", patch_nvhdmi
),
4125 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP", patch_nvhdmi
),
4126 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP", patch_nvhdmi
),
4127 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP", patch_nvhdmi
),
4128 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP", patch_nvhdmi
),
4129 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP", patch_nvhdmi
),
4130 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP", patch_nvhdmi
),
4131 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP", patch_nvhdmi
),
4132 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP", patch_nvhdmi
),
4133 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP", patch_nvhdmi
),
4134 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP", patch_nvhdmi
),
4135 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch
),
4136 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI", patch_nvhdmi_2ch
),
4137 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi
),
4138 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi
),
4139 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi
),
4140 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP", patch_generic_hdmi
),
4141 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI", patch_i915_cpt_hdmi
),
4142 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI", patch_i915_glk_hdmi
),
4143 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI", patch_generic_hdmi
),
4144 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI", patch_generic_hdmi
),
4145 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI", patch_generic_hdmi
),
4146 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI", patch_i915_cpt_hdmi
),
4147 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi
),
4148 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi
),
4149 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI", patch_i915_hsw_hdmi
),
4150 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI", patch_i915_hsw_hdmi
),
4151 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI", patch_i915_hsw_hdmi
),
4152 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI", patch_i915_hsw_hdmi
),
4153 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI", patch_i915_hsw_hdmi
),
4154 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI", patch_i915_glk_hdmi
),
4155 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI", patch_i915_glk_hdmi
),
4156 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI", patch_i915_icl_hdmi
),
4157 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI", patch_i915_tgl_hdmi
),
4158 HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI", patch_i915_icl_hdmi
),
4159 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi
),
4160 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi
),
4161 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_i915_byt_hdmi
),
4162 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI", patch_generic_hdmi
),
4163 /* special ID for generic HDMI */
4164 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI
, "Generic HDMI", patch_generic_hdmi
),
4167 MODULE_DEVICE_TABLE(hdaudio
, snd_hda_id_hdmi
);
4169 MODULE_LICENSE("GPL");
4170 MODULE_DESCRIPTION("HDMI HD-audio codec");
4171 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4172 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4173 MODULE_ALIAS("snd-hda-codec-atihdmi");
4175 static struct hda_codec_driver hdmi_driver
= {
4176 .id
= snd_hda_id_hdmi
,
4179 module_hda_codec_driver(hdmi_driver
);