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ALSA: hda - fix an external mic jack problem on a HP machine
[thirdparty/kernel/linux.git] / sound / pci / hda / patch_sigmatel.c
1 /*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
7 * Matt Porter <mporter@embeddedalley.com>
8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27 #include <linux/init.h>
28 #include <linux/delay.h>
29 #include <linux/slab.h>
30 #include <linux/pci.h>
31 #include <linux/dmi.h>
32 #include <linux/module.h>
33 #include <sound/core.h>
34 #include <sound/jack.h>
35 #include <sound/tlv.h>
36 #include "hda_codec.h"
37 #include "hda_local.h"
38 #include "hda_auto_parser.h"
39 #include "hda_beep.h"
40 #include "hda_jack.h"
41 #include "hda_generic.h"
42
43 enum {
44 STAC_VREF_EVENT = 8,
45 STAC_PWR_EVENT,
46 };
47
48 enum {
49 STAC_REF,
50 STAC_9200_OQO,
51 STAC_9200_DELL_D21,
52 STAC_9200_DELL_D22,
53 STAC_9200_DELL_D23,
54 STAC_9200_DELL_M21,
55 STAC_9200_DELL_M22,
56 STAC_9200_DELL_M23,
57 STAC_9200_DELL_M24,
58 STAC_9200_DELL_M25,
59 STAC_9200_DELL_M26,
60 STAC_9200_DELL_M27,
61 STAC_9200_M4,
62 STAC_9200_M4_2,
63 STAC_9200_PANASONIC,
64 STAC_9200_EAPD_INIT,
65 STAC_9200_MODELS
66 };
67
68 enum {
69 STAC_9205_REF,
70 STAC_9205_DELL_M42,
71 STAC_9205_DELL_M43,
72 STAC_9205_DELL_M44,
73 STAC_9205_EAPD,
74 STAC_9205_MODELS
75 };
76
77 enum {
78 STAC_92HD73XX_NO_JD, /* no jack-detection */
79 STAC_92HD73XX_REF,
80 STAC_92HD73XX_INTEL,
81 STAC_DELL_M6_AMIC,
82 STAC_DELL_M6_DMIC,
83 STAC_DELL_M6_BOTH,
84 STAC_DELL_EQ,
85 STAC_ALIENWARE_M17X,
86 STAC_92HD89XX_HP_FRONT_JACK,
87 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
88 STAC_92HD73XX_MODELS
89 };
90
91 enum {
92 STAC_92HD83XXX_REF,
93 STAC_92HD83XXX_PWR_REF,
94 STAC_DELL_S14,
95 STAC_DELL_VOSTRO_3500,
96 STAC_92HD83XXX_HP_cNB11_INTQUAD,
97 STAC_HP_DV7_4000,
98 STAC_HP_ZEPHYR,
99 STAC_92HD83XXX_HP_LED,
100 STAC_92HD83XXX_HP_INV_LED,
101 STAC_92HD83XXX_HP_MIC_LED,
102 STAC_HP_LED_GPIO10,
103 STAC_92HD83XXX_HEADSET_JACK,
104 STAC_92HD83XXX_HP,
105 STAC_HP_ENVY_BASS,
106 STAC_HP_BNB13_EQ,
107 STAC_92HD83XXX_MODELS
108 };
109
110 enum {
111 STAC_92HD71BXX_REF,
112 STAC_DELL_M4_1,
113 STAC_DELL_M4_2,
114 STAC_DELL_M4_3,
115 STAC_HP_M4,
116 STAC_HP_DV4,
117 STAC_HP_DV5,
118 STAC_HP_HDX,
119 STAC_92HD71BXX_HP,
120 STAC_92HD71BXX_NO_DMIC,
121 STAC_92HD71BXX_NO_SMUX,
122 STAC_92HD71BXX_MODELS
123 };
124
125 enum {
126 STAC_92HD95_HP_LED,
127 STAC_92HD95_HP_BASS,
128 STAC_92HD95_MODELS
129 };
130
131 enum {
132 STAC_925x_REF,
133 STAC_M1,
134 STAC_M1_2,
135 STAC_M2,
136 STAC_M2_2,
137 STAC_M3,
138 STAC_M5,
139 STAC_M6,
140 STAC_925x_MODELS
141 };
142
143 enum {
144 STAC_D945_REF,
145 STAC_D945GTP3,
146 STAC_D945GTP5,
147 STAC_INTEL_MAC_V1,
148 STAC_INTEL_MAC_V2,
149 STAC_INTEL_MAC_V3,
150 STAC_INTEL_MAC_V4,
151 STAC_INTEL_MAC_V5,
152 STAC_INTEL_MAC_AUTO,
153 STAC_ECS_202,
154 STAC_922X_DELL_D81,
155 STAC_922X_DELL_D82,
156 STAC_922X_DELL_M81,
157 STAC_922X_DELL_M82,
158 STAC_922X_INTEL_MAC_GPIO,
159 STAC_922X_MODELS
160 };
161
162 enum {
163 STAC_D965_REF_NO_JD, /* no jack-detection */
164 STAC_D965_REF,
165 STAC_D965_3ST,
166 STAC_D965_5ST,
167 STAC_D965_5ST_NO_FP,
168 STAC_D965_VERBS,
169 STAC_DELL_3ST,
170 STAC_DELL_BIOS,
171 STAC_DELL_BIOS_AMIC,
172 STAC_DELL_BIOS_SPDIF,
173 STAC_927X_DELL_DMIC,
174 STAC_927X_VOLKNOB,
175 STAC_927X_MODELS
176 };
177
178 enum {
179 STAC_9872_VAIO,
180 STAC_9872_MODELS
181 };
182
183 struct sigmatel_spec {
184 struct hda_gen_spec gen;
185
186 unsigned int eapd_switch: 1;
187 unsigned int linear_tone_beep:1;
188 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
189 unsigned int volknob_init:1; /* special volume-knob initialization */
190 unsigned int powerdown_adcs:1;
191 unsigned int have_spdif_mux:1;
192
193 /* gpio lines */
194 unsigned int eapd_mask;
195 unsigned int gpio_mask;
196 unsigned int gpio_dir;
197 unsigned int gpio_data;
198 unsigned int gpio_mute;
199 unsigned int gpio_led;
200 unsigned int gpio_led_polarity;
201 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
202 unsigned int vref_led;
203 int default_polarity;
204
205 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
206 unsigned int mic_enabled; /* current mic mute state (bitmask) */
207
208 /* stream */
209 unsigned int stream_delay;
210
211 /* analog loopback */
212 const struct snd_kcontrol_new *aloopback_ctl;
213 unsigned int aloopback;
214 unsigned char aloopback_mask;
215 unsigned char aloopback_shift;
216
217 /* power management */
218 unsigned int power_map_bits;
219 unsigned int num_pwrs;
220 const hda_nid_t *pwr_nids;
221 unsigned int active_adcs;
222
223 /* beep widgets */
224 hda_nid_t anabeep_nid;
225
226 /* SPDIF-out mux */
227 const char * const *spdif_labels;
228 struct hda_input_mux spdif_mux;
229 unsigned int cur_smux[2];
230 };
231
232 #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
233 #define AC_VERB_IDT_GET_POWER_MAP 0xfec
234
235 static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
236 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
237 0x0f, 0x10, 0x11
238 };
239
240 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
241 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
242 0x0f, 0x10
243 };
244
245 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
246 0x0a, 0x0d, 0x0f
247 };
248
249
250 /*
251 * PCM hooks
252 */
253 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
254 struct hda_codec *codec,
255 struct snd_pcm_substream *substream,
256 int action)
257 {
258 struct sigmatel_spec *spec = codec->spec;
259 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
260 msleep(spec->stream_delay);
261 }
262
263 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
264 struct hda_codec *codec,
265 struct snd_pcm_substream *substream,
266 int action)
267 {
268 struct sigmatel_spec *spec = codec->spec;
269 int i, idx = 0;
270
271 if (!spec->powerdown_adcs)
272 return;
273
274 for (i = 0; i < spec->gen.num_all_adcs; i++) {
275 if (spec->gen.all_adcs[i] == hinfo->nid) {
276 idx = i;
277 break;
278 }
279 }
280
281 switch (action) {
282 case HDA_GEN_PCM_ACT_OPEN:
283 msleep(40);
284 snd_hda_codec_write(codec, hinfo->nid, 0,
285 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
286 spec->active_adcs |= (1 << idx);
287 break;
288 case HDA_GEN_PCM_ACT_CLOSE:
289 snd_hda_codec_write(codec, hinfo->nid, 0,
290 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
291 spec->active_adcs &= ~(1 << idx);
292 break;
293 }
294 }
295
296 /*
297 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
298 * funky external mute control using GPIO pins.
299 */
300
301 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
302 unsigned int dir_mask, unsigned int data)
303 {
304 unsigned int gpiostate, gpiomask, gpiodir;
305
306 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
307
308 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
309 AC_VERB_GET_GPIO_DATA, 0);
310 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
311
312 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
313 AC_VERB_GET_GPIO_MASK, 0);
314 gpiomask |= mask;
315
316 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
317 AC_VERB_GET_GPIO_DIRECTION, 0);
318 gpiodir |= dir_mask;
319
320 /* Configure GPIOx as CMOS */
321 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
322
323 snd_hda_codec_write(codec, codec->afg, 0,
324 AC_VERB_SET_GPIO_MASK, gpiomask);
325 snd_hda_codec_read(codec, codec->afg, 0,
326 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
327
328 msleep(1);
329
330 snd_hda_codec_read(codec, codec->afg, 0,
331 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
332 }
333
334 /* hook for controlling mic-mute LED GPIO */
335 static void stac_capture_led_hook(struct hda_codec *codec,
336 struct snd_kcontrol *kcontrol,
337 struct snd_ctl_elem_value *ucontrol)
338 {
339 struct sigmatel_spec *spec = codec->spec;
340 unsigned int mask;
341 bool cur_mute, prev_mute;
342
343 if (!kcontrol || !ucontrol)
344 return;
345
346 mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
347 prev_mute = !spec->mic_enabled;
348 if (ucontrol->value.integer.value[0] ||
349 ucontrol->value.integer.value[1])
350 spec->mic_enabled |= mask;
351 else
352 spec->mic_enabled &= ~mask;
353 cur_mute = !spec->mic_enabled;
354 if (cur_mute != prev_mute) {
355 if (cur_mute)
356 spec->gpio_data |= spec->mic_mute_led_gpio;
357 else
358 spec->gpio_data &= ~spec->mic_mute_led_gpio;
359 stac_gpio_set(codec, spec->gpio_mask,
360 spec->gpio_dir, spec->gpio_data);
361 }
362 }
363
364 static int stac_vrefout_set(struct hda_codec *codec,
365 hda_nid_t nid, unsigned int new_vref)
366 {
367 int error, pinctl;
368
369 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
370 pinctl = snd_hda_codec_read(codec, nid, 0,
371 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
372
373 if (pinctl < 0)
374 return pinctl;
375
376 pinctl &= 0xff;
377 pinctl &= ~AC_PINCTL_VREFEN;
378 pinctl |= (new_vref & AC_PINCTL_VREFEN);
379
380 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
381 if (error < 0)
382 return error;
383
384 return 1;
385 }
386
387 /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
388 /* this hook is set in stac_setup_gpio() */
389 static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
390 hda_nid_t nid,
391 unsigned int power_state)
392 {
393 if (nid == codec->afg && power_state == AC_PWRST_D3)
394 return AC_PWRST_D1;
395 return snd_hda_gen_path_power_filter(codec, nid, power_state);
396 }
397
398 /* update mute-LED accoring to the master switch */
399 static void stac_update_led_status(struct hda_codec *codec, int enabled)
400 {
401 struct sigmatel_spec *spec = codec->spec;
402 int muted = !enabled;
403
404 if (!spec->gpio_led)
405 return;
406
407 /* LED state is inverted on these systems */
408 if (spec->gpio_led_polarity)
409 muted = !muted;
410
411 if (!spec->vref_mute_led_nid) {
412 if (muted)
413 spec->gpio_data |= spec->gpio_led;
414 else
415 spec->gpio_data &= ~spec->gpio_led;
416 stac_gpio_set(codec, spec->gpio_mask,
417 spec->gpio_dir, spec->gpio_data);
418 } else {
419 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
420 stac_vrefout_set(codec, spec->vref_mute_led_nid,
421 spec->vref_led);
422 }
423 }
424
425 /* vmaster hook to update mute LED */
426 static void stac_vmaster_hook(void *private_data, int val)
427 {
428 stac_update_led_status(private_data, val);
429 }
430
431 /* automute hook to handle GPIO mute and EAPD updates */
432 static void stac_update_outputs(struct hda_codec *codec)
433 {
434 struct sigmatel_spec *spec = codec->spec;
435
436 if (spec->gpio_mute)
437 spec->gen.master_mute =
438 !(snd_hda_codec_read(codec, codec->afg, 0,
439 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
440
441 snd_hda_gen_update_outputs(codec);
442
443 if (spec->eapd_mask && spec->eapd_switch) {
444 unsigned int val = spec->gpio_data;
445 if (spec->gen.speaker_muted)
446 val &= ~spec->eapd_mask;
447 else
448 val |= spec->eapd_mask;
449 if (spec->gpio_data != val) {
450 spec->gpio_data = val;
451 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
452 val);
453 }
454 }
455 }
456
457 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
458 bool enable, bool do_write)
459 {
460 struct sigmatel_spec *spec = codec->spec;
461 unsigned int idx, val;
462
463 for (idx = 0; idx < spec->num_pwrs; idx++) {
464 if (spec->pwr_nids[idx] == nid)
465 break;
466 }
467 if (idx >= spec->num_pwrs)
468 return;
469
470 idx = 1 << idx;
471
472 val = spec->power_map_bits;
473 if (enable)
474 val &= ~idx;
475 else
476 val |= idx;
477
478 /* power down unused output ports */
479 if (val != spec->power_map_bits) {
480 spec->power_map_bits = val;
481 if (do_write)
482 snd_hda_codec_write(codec, codec->afg, 0,
483 AC_VERB_IDT_SET_POWER_MAP, val);
484 }
485 }
486
487 /* update power bit per jack plug/unplug */
488 static void jack_update_power(struct hda_codec *codec,
489 struct hda_jack_tbl *jack)
490 {
491 struct sigmatel_spec *spec = codec->spec;
492 int i;
493
494 if (!spec->num_pwrs)
495 return;
496
497 if (jack && jack->nid) {
498 stac_toggle_power_map(codec, jack->nid,
499 snd_hda_jack_detect(codec, jack->nid),
500 true);
501 return;
502 }
503
504 /* update all jacks */
505 for (i = 0; i < spec->num_pwrs; i++) {
506 hda_nid_t nid = spec->pwr_nids[i];
507 jack = snd_hda_jack_tbl_get(codec, nid);
508 if (!jack || !jack->action)
509 continue;
510 if (jack->action == STAC_PWR_EVENT ||
511 jack->action <= HDA_GEN_LAST_EVENT)
512 stac_toggle_power_map(codec, nid,
513 snd_hda_jack_detect(codec, nid),
514 false);
515 }
516
517 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
518 spec->power_map_bits);
519 }
520
521 static void stac_hp_automute(struct hda_codec *codec,
522 struct hda_jack_tbl *jack)
523 {
524 snd_hda_gen_hp_automute(codec, jack);
525 jack_update_power(codec, jack);
526 }
527
528 static void stac_line_automute(struct hda_codec *codec,
529 struct hda_jack_tbl *jack)
530 {
531 snd_hda_gen_line_automute(codec, jack);
532 jack_update_power(codec, jack);
533 }
534
535 static void stac_mic_autoswitch(struct hda_codec *codec,
536 struct hda_jack_tbl *jack)
537 {
538 snd_hda_gen_mic_autoswitch(codec, jack);
539 jack_update_power(codec, jack);
540 }
541
542 static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
543 {
544 unsigned int data;
545
546 data = snd_hda_codec_read(codec, codec->afg, 0,
547 AC_VERB_GET_GPIO_DATA, 0);
548 /* toggle VREF state based on GPIOx status */
549 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
550 !!(data & (1 << event->private_data)));
551 }
552
553 /* initialize the power map and enable the power event to jacks that
554 * haven't been assigned to automute
555 */
556 static void stac_init_power_map(struct hda_codec *codec)
557 {
558 struct sigmatel_spec *spec = codec->spec;
559 int i;
560
561 for (i = 0; i < spec->num_pwrs; i++) {
562 hda_nid_t nid = spec->pwr_nids[i];
563 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
564 def_conf = get_defcfg_connect(def_conf);
565 if (snd_hda_jack_tbl_get(codec, nid))
566 continue;
567 if (def_conf == AC_JACK_PORT_COMPLEX &&
568 !(spec->vref_mute_led_nid == nid ||
569 is_jack_detectable(codec, nid))) {
570 snd_hda_jack_detect_enable_callback(codec, nid,
571 STAC_PWR_EVENT,
572 jack_update_power);
573 } else {
574 if (def_conf == AC_JACK_PORT_NONE)
575 stac_toggle_power_map(codec, nid, false, false);
576 else
577 stac_toggle_power_map(codec, nid, true, false);
578 }
579 }
580 }
581
582 /*
583 */
584
585 static inline bool get_int_hint(struct hda_codec *codec, const char *key,
586 int *valp)
587 {
588 return !snd_hda_get_int_hint(codec, key, valp);
589 }
590
591 /* override some hints from the hwdep entry */
592 static void stac_store_hints(struct hda_codec *codec)
593 {
594 struct sigmatel_spec *spec = codec->spec;
595 int val;
596
597 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
598 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
599 spec->gpio_mask;
600 }
601 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
602 spec->gpio_mask &= spec->gpio_mask;
603 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
604 spec->gpio_dir &= spec->gpio_mask;
605 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
606 spec->eapd_mask &= spec->gpio_mask;
607 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
608 spec->gpio_mute &= spec->gpio_mask;
609 val = snd_hda_get_bool_hint(codec, "eapd_switch");
610 if (val >= 0)
611 spec->eapd_switch = val;
612 }
613
614 /*
615 * loopback controls
616 */
617
618 #define stac_aloopback_info snd_ctl_boolean_mono_info
619
620 static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
621 struct snd_ctl_elem_value *ucontrol)
622 {
623 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
624 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
625 struct sigmatel_spec *spec = codec->spec;
626
627 ucontrol->value.integer.value[0] = !!(spec->aloopback &
628 (spec->aloopback_mask << idx));
629 return 0;
630 }
631
632 static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
633 struct snd_ctl_elem_value *ucontrol)
634 {
635 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
636 struct sigmatel_spec *spec = codec->spec;
637 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
638 unsigned int dac_mode;
639 unsigned int val, idx_val;
640
641 idx_val = spec->aloopback_mask << idx;
642 if (ucontrol->value.integer.value[0])
643 val = spec->aloopback | idx_val;
644 else
645 val = spec->aloopback & ~idx_val;
646 if (spec->aloopback == val)
647 return 0;
648
649 spec->aloopback = val;
650
651 /* Only return the bits defined by the shift value of the
652 * first two bytes of the mask
653 */
654 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
655 kcontrol->private_value & 0xFFFF, 0x0);
656 dac_mode >>= spec->aloopback_shift;
657
658 if (spec->aloopback & idx_val) {
659 snd_hda_power_up(codec);
660 dac_mode |= idx_val;
661 } else {
662 snd_hda_power_down(codec);
663 dac_mode &= ~idx_val;
664 }
665
666 snd_hda_codec_write_cache(codec, codec->afg, 0,
667 kcontrol->private_value >> 16, dac_mode);
668
669 return 1;
670 }
671
672 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
673 { \
674 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
675 .name = "Analog Loopback", \
676 .count = cnt, \
677 .info = stac_aloopback_info, \
678 .get = stac_aloopback_get, \
679 .put = stac_aloopback_put, \
680 .private_value = verb_read | (verb_write << 16), \
681 }
682
683 /*
684 * Mute LED handling on HP laptops
685 */
686
687 /* check whether it's a HP laptop with a docking port */
688 static bool hp_bnb2011_with_dock(struct hda_codec *codec)
689 {
690 if (codec->vendor_id != 0x111d7605 &&
691 codec->vendor_id != 0x111d76d1)
692 return false;
693
694 switch (codec->subsystem_id) {
695 case 0x103c1618:
696 case 0x103c1619:
697 case 0x103c161a:
698 case 0x103c161b:
699 case 0x103c161c:
700 case 0x103c161d:
701 case 0x103c161e:
702 case 0x103c161f:
703
704 case 0x103c162a:
705 case 0x103c162b:
706
707 case 0x103c1630:
708 case 0x103c1631:
709
710 case 0x103c1633:
711 case 0x103c1634:
712 case 0x103c1635:
713
714 case 0x103c3587:
715 case 0x103c3588:
716 case 0x103c3589:
717 case 0x103c358a:
718
719 case 0x103c3667:
720 case 0x103c3668:
721 case 0x103c3669:
722
723 return true;
724 }
725 return false;
726 }
727
728 static bool hp_blike_system(u32 subsystem_id)
729 {
730 switch (subsystem_id) {
731 case 0x103c1520:
732 case 0x103c1521:
733 case 0x103c1523:
734 case 0x103c1524:
735 case 0x103c1525:
736 case 0x103c1722:
737 case 0x103c1723:
738 case 0x103c1724:
739 case 0x103c1725:
740 case 0x103c1726:
741 case 0x103c1727:
742 case 0x103c1728:
743 case 0x103c1729:
744 case 0x103c172a:
745 case 0x103c172b:
746 case 0x103c307e:
747 case 0x103c307f:
748 case 0x103c3080:
749 case 0x103c3081:
750 case 0x103c7007:
751 case 0x103c7008:
752 return true;
753 }
754 return false;
755 }
756
757 static void set_hp_led_gpio(struct hda_codec *codec)
758 {
759 struct sigmatel_spec *spec = codec->spec;
760 unsigned int gpio;
761
762 if (spec->gpio_led)
763 return;
764
765 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
766 gpio &= AC_GPIO_IO_COUNT;
767 if (gpio > 3)
768 spec->gpio_led = 0x08; /* GPIO 3 */
769 else
770 spec->gpio_led = 0x01; /* GPIO 0 */
771 }
772
773 /*
774 * This method searches for the mute LED GPIO configuration
775 * provided as OEM string in SMBIOS. The format of that string
776 * is HP_Mute_LED_P_G or HP_Mute_LED_P
777 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
778 * that corresponds to the NOT muted state of the master volume
779 * and G is the index of the GPIO to use as the mute LED control (0..9)
780 * If _G portion is missing it is assigned based on the codec ID
781 *
782 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
783 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
784 *
785 *
786 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
787 * SMBIOS - at least the ones I have seen do not have them - which include
788 * my own system (HP Pavilion dv6-1110ax) and my cousin's
789 * HP Pavilion dv9500t CTO.
790 * Need more information on whether it is true across the entire series.
791 * -- kunal
792 */
793 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
794 {
795 struct sigmatel_spec *spec = codec->spec;
796 const struct dmi_device *dev = NULL;
797
798 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
799 get_int_hint(codec, "gpio_led_polarity",
800 &spec->gpio_led_polarity);
801 return 1;
802 }
803
804 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
805 if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
806 &spec->gpio_led_polarity,
807 &spec->gpio_led) == 2) {
808 unsigned int max_gpio;
809 max_gpio = snd_hda_param_read(codec, codec->afg,
810 AC_PAR_GPIO_CAP);
811 max_gpio &= AC_GPIO_IO_COUNT;
812 if (spec->gpio_led < max_gpio)
813 spec->gpio_led = 1 << spec->gpio_led;
814 else
815 spec->vref_mute_led_nid = spec->gpio_led;
816 return 1;
817 }
818 if (sscanf(dev->name, "HP_Mute_LED_%u",
819 &spec->gpio_led_polarity) == 1) {
820 set_hp_led_gpio(codec);
821 return 1;
822 }
823 /* BIOS bug: unfilled OEM string */
824 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
825 set_hp_led_gpio(codec);
826 if (default_polarity >= 0)
827 spec->gpio_led_polarity = default_polarity;
828 else
829 spec->gpio_led_polarity = 1;
830 return 1;
831 }
832 }
833
834 /*
835 * Fallback case - if we don't find the DMI strings,
836 * we statically set the GPIO - if not a B-series system
837 * and default polarity is provided
838 */
839 if (!hp_blike_system(codec->subsystem_id) &&
840 (default_polarity == 0 || default_polarity == 1)) {
841 set_hp_led_gpio(codec);
842 spec->gpio_led_polarity = default_polarity;
843 return 1;
844 }
845 return 0;
846 }
847
848 /* check whether a built-in speaker is included in parsed pins */
849 static bool has_builtin_speaker(struct hda_codec *codec)
850 {
851 struct sigmatel_spec *spec = codec->spec;
852 hda_nid_t *nid_pin;
853 int nids, i;
854
855 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
856 nid_pin = spec->gen.autocfg.line_out_pins;
857 nids = spec->gen.autocfg.line_outs;
858 } else {
859 nid_pin = spec->gen.autocfg.speaker_pins;
860 nids = spec->gen.autocfg.speaker_outs;
861 }
862
863 for (i = 0; i < nids; i++) {
864 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
865 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
866 return true;
867 }
868 return false;
869 }
870
871 /*
872 * PC beep controls
873 */
874
875 /* create PC beep volume controls */
876 static int stac_auto_create_beep_ctls(struct hda_codec *codec,
877 hda_nid_t nid)
878 {
879 struct sigmatel_spec *spec = codec->spec;
880 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
881 struct snd_kcontrol_new *knew;
882 static struct snd_kcontrol_new abeep_mute_ctl =
883 HDA_CODEC_MUTE(NULL, 0, 0, 0);
884 static struct snd_kcontrol_new dbeep_mute_ctl =
885 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
886 static struct snd_kcontrol_new beep_vol_ctl =
887 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
888
889 /* check for mute support for the the amp */
890 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
891 const struct snd_kcontrol_new *temp;
892 if (spec->anabeep_nid == nid)
893 temp = &abeep_mute_ctl;
894 else
895 temp = &dbeep_mute_ctl;
896 knew = snd_hda_gen_add_kctl(&spec->gen,
897 "Beep Playback Switch", temp);
898 if (!knew)
899 return -ENOMEM;
900 knew->private_value =
901 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
902 }
903
904 /* check to see if there is volume support for the amp */
905 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
906 knew = snd_hda_gen_add_kctl(&spec->gen,
907 "Beep Playback Volume",
908 &beep_vol_ctl);
909 if (!knew)
910 return -ENOMEM;
911 knew->private_value =
912 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
913 }
914 return 0;
915 }
916
917 #ifdef CONFIG_SND_HDA_INPUT_BEEP
918 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
919
920 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
921 struct snd_ctl_elem_value *ucontrol)
922 {
923 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
924 ucontrol->value.integer.value[0] = codec->beep->enabled;
925 return 0;
926 }
927
928 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
929 struct snd_ctl_elem_value *ucontrol)
930 {
931 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
932 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
933 }
934
935 static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
936 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
937 .name = "Beep Playback Switch",
938 .info = stac_dig_beep_switch_info,
939 .get = stac_dig_beep_switch_get,
940 .put = stac_dig_beep_switch_put,
941 };
942
943 static int stac_beep_switch_ctl(struct hda_codec *codec)
944 {
945 struct sigmatel_spec *spec = codec->spec;
946
947 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
948 return -ENOMEM;
949 return 0;
950 }
951 #endif
952
953 /*
954 * SPDIF-out mux controls
955 */
956
957 static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
958 struct snd_ctl_elem_info *uinfo)
959 {
960 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
961 struct sigmatel_spec *spec = codec->spec;
962 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
963 }
964
965 static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
966 struct snd_ctl_elem_value *ucontrol)
967 {
968 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
969 struct sigmatel_spec *spec = codec->spec;
970 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
971
972 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
973 return 0;
974 }
975
976 static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
977 struct snd_ctl_elem_value *ucontrol)
978 {
979 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
980 struct sigmatel_spec *spec = codec->spec;
981 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
982
983 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
984 spec->gen.autocfg.dig_out_pins[smux_idx],
985 &spec->cur_smux[smux_idx]);
986 }
987
988 static struct snd_kcontrol_new stac_smux_mixer = {
989 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
990 .name = "IEC958 Playback Source",
991 /* count set later */
992 .info = stac_smux_enum_info,
993 .get = stac_smux_enum_get,
994 .put = stac_smux_enum_put,
995 };
996
997 static const char * const stac_spdif_labels[] = {
998 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
999 };
1000
1001 static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
1002 {
1003 struct sigmatel_spec *spec = codec->spec;
1004 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
1005 const char * const *labels = spec->spdif_labels;
1006 struct snd_kcontrol_new *kctl;
1007 int i, num_cons;
1008
1009 if (cfg->dig_outs < 1)
1010 return 0;
1011
1012 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
1013 if (num_cons <= 1)
1014 return 0;
1015
1016 if (!labels)
1017 labels = stac_spdif_labels;
1018 for (i = 0; i < num_cons; i++) {
1019 if (snd_BUG_ON(!labels[i]))
1020 return -EINVAL;
1021 snd_hda_add_imux_item(&spec->spdif_mux, labels[i], i, NULL);
1022 }
1023
1024 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
1025 if (!kctl)
1026 return -ENOMEM;
1027 kctl->count = cfg->dig_outs;
1028
1029 return 0;
1030 }
1031
1032 /*
1033 */
1034
1035 static const struct hda_verb stac9200_core_init[] = {
1036 /* set dac0mux for dac converter */
1037 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1038 {}
1039 };
1040
1041 static const struct hda_verb stac9200_eapd_init[] = {
1042 /* set dac0mux for dac converter */
1043 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1044 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1045 {}
1046 };
1047
1048 static const struct hda_verb dell_eq_core_init[] = {
1049 /* set master volume to max value without distortion
1050 * and direct control */
1051 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
1052 {}
1053 };
1054
1055 static const struct hda_verb stac92hd73xx_core_init[] = {
1056 /* set master volume and direct control */
1057 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1058 {}
1059 };
1060
1061 static const struct hda_verb stac92hd83xxx_core_init[] = {
1062 /* power state controls amps */
1063 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
1064 {}
1065 };
1066
1067 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1068 { 0x22, 0x785, 0x43 },
1069 { 0x22, 0x782, 0xe0 },
1070 { 0x22, 0x795, 0x00 },
1071 {}
1072 };
1073
1074 static const struct hda_verb stac92hd71bxx_core_init[] = {
1075 /* set master volume and direct control */
1076 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1077 {}
1078 };
1079
1080 static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
1081 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
1082 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1083 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1084 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1085 {}
1086 };
1087
1088 static const struct hda_verb stac925x_core_init[] = {
1089 /* set dac0mux for dac converter */
1090 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1091 /* mute the master volume */
1092 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1093 {}
1094 };
1095
1096 static const struct hda_verb stac922x_core_init[] = {
1097 /* set master volume and direct control */
1098 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1099 {}
1100 };
1101
1102 static const struct hda_verb d965_core_init[] = {
1103 /* unmute node 0x1b */
1104 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1105 /* select node 0x03 as DAC */
1106 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1107 {}
1108 };
1109
1110 static const struct hda_verb dell_3st_core_init[] = {
1111 /* don't set delta bit */
1112 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1113 /* unmute node 0x1b */
1114 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1115 /* select node 0x03 as DAC */
1116 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1117 {}
1118 };
1119
1120 static const struct hda_verb stac927x_core_init[] = {
1121 /* set master volume and direct control */
1122 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1123 /* enable analog pc beep path */
1124 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1125 {}
1126 };
1127
1128 static const struct hda_verb stac927x_volknob_core_init[] = {
1129 /* don't set delta bit */
1130 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1131 /* enable analog pc beep path */
1132 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1133 {}
1134 };
1135
1136 static const struct hda_verb stac9205_core_init[] = {
1137 /* set master volume and direct control */
1138 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1139 /* enable analog pc beep path */
1140 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1141 {}
1142 };
1143
1144 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1145 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1146
1147 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1148 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1149
1150 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1151 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1152
1153 static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1154 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1155
1156 static const struct snd_kcontrol_new stac9205_loopback =
1157 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1158
1159 static const struct snd_kcontrol_new stac927x_loopback =
1160 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1161
1162 static const struct hda_pintbl ref9200_pin_configs[] = {
1163 { 0x08, 0x01c47010 },
1164 { 0x09, 0x01447010 },
1165 { 0x0d, 0x0221401f },
1166 { 0x0e, 0x01114010 },
1167 { 0x0f, 0x02a19020 },
1168 { 0x10, 0x01a19021 },
1169 { 0x11, 0x90100140 },
1170 { 0x12, 0x01813122 },
1171 {}
1172 };
1173
1174 static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1175 { 0x08, 0x400000fe },
1176 { 0x09, 0x404500f4 },
1177 { 0x0d, 0x400100f0 },
1178 { 0x0e, 0x90110010 },
1179 { 0x0f, 0x400100f1 },
1180 { 0x10, 0x02a1902e },
1181 { 0x11, 0x500000f2 },
1182 { 0x12, 0x500000f3 },
1183 {}
1184 };
1185
1186 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1187 { 0x08, 0x400000fe },
1188 { 0x09, 0x404500f4 },
1189 { 0x0d, 0x400100f0 },
1190 { 0x0e, 0x90110010 },
1191 { 0x0f, 0x400100f1 },
1192 { 0x10, 0x02a1902e },
1193 { 0x11, 0x500000f2 },
1194 { 0x12, 0x500000f3 },
1195 {}
1196 };
1197
1198 /*
1199 STAC 9200 pin configs for
1200 102801A8
1201 102801DE
1202 102801E8
1203 */
1204 static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1205 { 0x08, 0x400001f0 },
1206 { 0x09, 0x400001f1 },
1207 { 0x0d, 0x02214030 },
1208 { 0x0e, 0x01014010 },
1209 { 0x0f, 0x02a19020 },
1210 { 0x10, 0x01a19021 },
1211 { 0x11, 0x90100140 },
1212 { 0x12, 0x01813122 },
1213 {}
1214 };
1215
1216 /*
1217 STAC 9200 pin configs for
1218 102801C0
1219 102801C1
1220 */
1221 static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1222 { 0x08, 0x400001f0 },
1223 { 0x09, 0x400001f1 },
1224 { 0x0d, 0x0221401f },
1225 { 0x0e, 0x01014010 },
1226 { 0x0f, 0x01813020 },
1227 { 0x10, 0x02a19021 },
1228 { 0x11, 0x90100140 },
1229 { 0x12, 0x400001f2 },
1230 {}
1231 };
1232
1233 /*
1234 STAC 9200 pin configs for
1235 102801C4 (Dell Dimension E310)
1236 102801C5
1237 102801C7
1238 102801D9
1239 102801DA
1240 102801E3
1241 */
1242 static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1243 { 0x08, 0x400001f0 },
1244 { 0x09, 0x400001f1 },
1245 { 0x0d, 0x0221401f },
1246 { 0x0e, 0x01014010 },
1247 { 0x0f, 0x01813020 },
1248 { 0x10, 0x01a19021 },
1249 { 0x11, 0x90100140 },
1250 { 0x12, 0x400001f2 },
1251 {}
1252 };
1253
1254
1255 /*
1256 STAC 9200-32 pin configs for
1257 102801B5 (Dell Inspiron 630m)
1258 102801D8 (Dell Inspiron 640m)
1259 */
1260 static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1261 { 0x08, 0x40c003fa },
1262 { 0x09, 0x03441340 },
1263 { 0x0d, 0x0321121f },
1264 { 0x0e, 0x90170310 },
1265 { 0x0f, 0x408003fb },
1266 { 0x10, 0x03a11020 },
1267 { 0x11, 0x401003fc },
1268 { 0x12, 0x403003fd },
1269 {}
1270 };
1271
1272 /*
1273 STAC 9200-32 pin configs for
1274 102801C2 (Dell Latitude D620)
1275 102801C8
1276 102801CC (Dell Latitude D820)
1277 102801D4
1278 102801D6
1279 */
1280 static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1281 { 0x08, 0x40c003fa },
1282 { 0x09, 0x0144131f },
1283 { 0x0d, 0x0321121f },
1284 { 0x0e, 0x90170310 },
1285 { 0x0f, 0x90a70321 },
1286 { 0x10, 0x03a11020 },
1287 { 0x11, 0x401003fb },
1288 { 0x12, 0x40f000fc },
1289 {}
1290 };
1291
1292 /*
1293 STAC 9200-32 pin configs for
1294 102801CE (Dell XPS M1710)
1295 102801CF (Dell Precision M90)
1296 */
1297 static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1298 { 0x08, 0x40c003fa },
1299 { 0x09, 0x01441340 },
1300 { 0x0d, 0x0421421f },
1301 { 0x0e, 0x90170310 },
1302 { 0x0f, 0x408003fb },
1303 { 0x10, 0x04a1102e },
1304 { 0x11, 0x90170311 },
1305 { 0x12, 0x403003fc },
1306 {}
1307 };
1308
1309 /*
1310 STAC 9200-32 pin configs for
1311 102801C9
1312 102801CA
1313 102801CB (Dell Latitude 120L)
1314 102801D3
1315 */
1316 static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1317 { 0x08, 0x40c003fa },
1318 { 0x09, 0x404003fb },
1319 { 0x0d, 0x0321121f },
1320 { 0x0e, 0x90170310 },
1321 { 0x0f, 0x408003fc },
1322 { 0x10, 0x03a11020 },
1323 { 0x11, 0x401003fd },
1324 { 0x12, 0x403003fe },
1325 {}
1326 };
1327
1328 /*
1329 STAC 9200-32 pin configs for
1330 102801BD (Dell Inspiron E1505n)
1331 102801EE
1332 102801EF
1333 */
1334 static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1335 { 0x08, 0x40c003fa },
1336 { 0x09, 0x01441340 },
1337 { 0x0d, 0x0421121f },
1338 { 0x0e, 0x90170310 },
1339 { 0x0f, 0x408003fb },
1340 { 0x10, 0x04a11020 },
1341 { 0x11, 0x401003fc },
1342 { 0x12, 0x403003fd },
1343 {}
1344 };
1345
1346 /*
1347 STAC 9200-32 pin configs for
1348 102801F5 (Dell Inspiron 1501)
1349 102801F6
1350 */
1351 static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1352 { 0x08, 0x40c003fa },
1353 { 0x09, 0x404003fb },
1354 { 0x0d, 0x0421121f },
1355 { 0x0e, 0x90170310 },
1356 { 0x0f, 0x408003fc },
1357 { 0x10, 0x04a11020 },
1358 { 0x11, 0x401003fd },
1359 { 0x12, 0x403003fe },
1360 {}
1361 };
1362
1363 /*
1364 STAC 9200-32
1365 102801CD (Dell Inspiron E1705/9400)
1366 */
1367 static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1368 { 0x08, 0x40c003fa },
1369 { 0x09, 0x01441340 },
1370 { 0x0d, 0x0421121f },
1371 { 0x0e, 0x90170310 },
1372 { 0x0f, 0x90170310 },
1373 { 0x10, 0x04a11020 },
1374 { 0x11, 0x90170310 },
1375 { 0x12, 0x40f003fc },
1376 {}
1377 };
1378
1379 static const struct hda_pintbl oqo9200_pin_configs[] = {
1380 { 0x08, 0x40c000f0 },
1381 { 0x09, 0x404000f1 },
1382 { 0x0d, 0x0221121f },
1383 { 0x0e, 0x02211210 },
1384 { 0x0f, 0x90170111 },
1385 { 0x10, 0x90a70120 },
1386 { 0x11, 0x400000f2 },
1387 { 0x12, 0x400000f3 },
1388 {}
1389 };
1390
1391
1392 static void stac9200_fixup_panasonic(struct hda_codec *codec,
1393 const struct hda_fixup *fix, int action)
1394 {
1395 struct sigmatel_spec *spec = codec->spec;
1396
1397 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
1398 spec->gpio_mask = spec->gpio_dir = 0x09;
1399 spec->gpio_data = 0x00;
1400 /* CF-74 has no headphone detection, and the driver should *NOT*
1401 * do detection and HP/speaker toggle because the hardware does it.
1402 */
1403 spec->gen.suppress_auto_mute = 1;
1404 }
1405 }
1406
1407
1408 static const struct hda_fixup stac9200_fixups[] = {
1409 [STAC_REF] = {
1410 .type = HDA_FIXUP_PINS,
1411 .v.pins = ref9200_pin_configs,
1412 },
1413 [STAC_9200_OQO] = {
1414 .type = HDA_FIXUP_PINS,
1415 .v.pins = oqo9200_pin_configs,
1416 .chained = true,
1417 .chain_id = STAC_9200_EAPD_INIT,
1418 },
1419 [STAC_9200_DELL_D21] = {
1420 .type = HDA_FIXUP_PINS,
1421 .v.pins = dell9200_d21_pin_configs,
1422 },
1423 [STAC_9200_DELL_D22] = {
1424 .type = HDA_FIXUP_PINS,
1425 .v.pins = dell9200_d22_pin_configs,
1426 },
1427 [STAC_9200_DELL_D23] = {
1428 .type = HDA_FIXUP_PINS,
1429 .v.pins = dell9200_d23_pin_configs,
1430 },
1431 [STAC_9200_DELL_M21] = {
1432 .type = HDA_FIXUP_PINS,
1433 .v.pins = dell9200_m21_pin_configs,
1434 },
1435 [STAC_9200_DELL_M22] = {
1436 .type = HDA_FIXUP_PINS,
1437 .v.pins = dell9200_m22_pin_configs,
1438 },
1439 [STAC_9200_DELL_M23] = {
1440 .type = HDA_FIXUP_PINS,
1441 .v.pins = dell9200_m23_pin_configs,
1442 },
1443 [STAC_9200_DELL_M24] = {
1444 .type = HDA_FIXUP_PINS,
1445 .v.pins = dell9200_m24_pin_configs,
1446 },
1447 [STAC_9200_DELL_M25] = {
1448 .type = HDA_FIXUP_PINS,
1449 .v.pins = dell9200_m25_pin_configs,
1450 },
1451 [STAC_9200_DELL_M26] = {
1452 .type = HDA_FIXUP_PINS,
1453 .v.pins = dell9200_m26_pin_configs,
1454 },
1455 [STAC_9200_DELL_M27] = {
1456 .type = HDA_FIXUP_PINS,
1457 .v.pins = dell9200_m27_pin_configs,
1458 },
1459 [STAC_9200_M4] = {
1460 .type = HDA_FIXUP_PINS,
1461 .v.pins = gateway9200_m4_pin_configs,
1462 .chained = true,
1463 .chain_id = STAC_9200_EAPD_INIT,
1464 },
1465 [STAC_9200_M4_2] = {
1466 .type = HDA_FIXUP_PINS,
1467 .v.pins = gateway9200_m4_2_pin_configs,
1468 .chained = true,
1469 .chain_id = STAC_9200_EAPD_INIT,
1470 },
1471 [STAC_9200_PANASONIC] = {
1472 .type = HDA_FIXUP_FUNC,
1473 .v.func = stac9200_fixup_panasonic,
1474 },
1475 [STAC_9200_EAPD_INIT] = {
1476 .type = HDA_FIXUP_VERBS,
1477 .v.verbs = (const struct hda_verb[]) {
1478 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1479 {}
1480 },
1481 },
1482 };
1483
1484 static const struct hda_model_fixup stac9200_models[] = {
1485 { .id = STAC_REF, .name = "ref" },
1486 { .id = STAC_9200_OQO, .name = "oqo" },
1487 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1488 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1489 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1490 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1491 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1492 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1493 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1494 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1495 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1496 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1497 { .id = STAC_9200_M4, .name = "gateway-m4" },
1498 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1499 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1500 {}
1501 };
1502
1503 static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
1504 /* SigmaTel reference board */
1505 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1506 "DFI LanParty", STAC_REF),
1507 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1508 "DFI LanParty", STAC_REF),
1509 /* Dell laptops have BIOS problem */
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1511 "unknown Dell", STAC_9200_DELL_D21),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1513 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1515 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1517 "unknown Dell", STAC_9200_DELL_D22),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1519 "unknown Dell", STAC_9200_DELL_D22),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1521 "Dell Latitude D620", STAC_9200_DELL_M22),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1523 "unknown Dell", STAC_9200_DELL_D23),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1525 "unknown Dell", STAC_9200_DELL_D23),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1527 "unknown Dell", STAC_9200_DELL_M22),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1529 "unknown Dell", STAC_9200_DELL_M24),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1531 "unknown Dell", STAC_9200_DELL_M24),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1533 "Dell Latitude 120L", STAC_9200_DELL_M24),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1535 "Dell Latitude D820", STAC_9200_DELL_M22),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1537 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1539 "Dell XPS M1710", STAC_9200_DELL_M23),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1541 "Dell Precision M90", STAC_9200_DELL_M23),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1543 "unknown Dell", STAC_9200_DELL_M22),
1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1545 "unknown Dell", STAC_9200_DELL_M22),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1547 "unknown Dell", STAC_9200_DELL_M22),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1549 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1551 "unknown Dell", STAC_9200_DELL_D23),
1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1553 "unknown Dell", STAC_9200_DELL_D23),
1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1555 "unknown Dell", STAC_9200_DELL_D21),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1557 "unknown Dell", STAC_9200_DELL_D23),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1559 "unknown Dell", STAC_9200_DELL_D21),
1560 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1561 "unknown Dell", STAC_9200_DELL_M25),
1562 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1563 "unknown Dell", STAC_9200_DELL_M25),
1564 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1565 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1566 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1567 "unknown Dell", STAC_9200_DELL_M26),
1568 /* Panasonic */
1569 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1570 /* Gateway machines needs EAPD to be set on resume */
1571 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1572 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1573 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
1574 /* OQO Mobile */
1575 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1576 {} /* terminator */
1577 };
1578
1579 static const struct hda_pintbl ref925x_pin_configs[] = {
1580 { 0x07, 0x40c003f0 },
1581 { 0x08, 0x424503f2 },
1582 { 0x0a, 0x01813022 },
1583 { 0x0b, 0x02a19021 },
1584 { 0x0c, 0x90a70320 },
1585 { 0x0d, 0x02214210 },
1586 { 0x10, 0x01019020 },
1587 { 0x11, 0x9033032e },
1588 {}
1589 };
1590
1591 static const struct hda_pintbl stac925xM1_pin_configs[] = {
1592 { 0x07, 0x40c003f4 },
1593 { 0x08, 0x424503f2 },
1594 { 0x0a, 0x400000f3 },
1595 { 0x0b, 0x02a19020 },
1596 { 0x0c, 0x40a000f0 },
1597 { 0x0d, 0x90100210 },
1598 { 0x10, 0x400003f1 },
1599 { 0x11, 0x9033032e },
1600 {}
1601 };
1602
1603 static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1604 { 0x07, 0x40c003f4 },
1605 { 0x08, 0x424503f2 },
1606 { 0x0a, 0x400000f3 },
1607 { 0x0b, 0x02a19020 },
1608 { 0x0c, 0x40a000f0 },
1609 { 0x0d, 0x90100210 },
1610 { 0x10, 0x400003f1 },
1611 { 0x11, 0x9033032e },
1612 {}
1613 };
1614
1615 static const struct hda_pintbl stac925xM2_pin_configs[] = {
1616 { 0x07, 0x40c003f4 },
1617 { 0x08, 0x424503f2 },
1618 { 0x0a, 0x400000f3 },
1619 { 0x0b, 0x02a19020 },
1620 { 0x0c, 0x40a000f0 },
1621 { 0x0d, 0x90100210 },
1622 { 0x10, 0x400003f1 },
1623 { 0x11, 0x9033032e },
1624 {}
1625 };
1626
1627 static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1628 { 0x07, 0x40c003f4 },
1629 { 0x08, 0x424503f2 },
1630 { 0x0a, 0x400000f3 },
1631 { 0x0b, 0x02a19020 },
1632 { 0x0c, 0x40a000f0 },
1633 { 0x0d, 0x90100210 },
1634 { 0x10, 0x400003f1 },
1635 { 0x11, 0x9033032e },
1636 {}
1637 };
1638
1639 static const struct hda_pintbl stac925xM3_pin_configs[] = {
1640 { 0x07, 0x40c003f4 },
1641 { 0x08, 0x424503f2 },
1642 { 0x0a, 0x400000f3 },
1643 { 0x0b, 0x02a19020 },
1644 { 0x0c, 0x40a000f0 },
1645 { 0x0d, 0x90100210 },
1646 { 0x10, 0x400003f1 },
1647 { 0x11, 0x503303f3 },
1648 {}
1649 };
1650
1651 static const struct hda_pintbl stac925xM5_pin_configs[] = {
1652 { 0x07, 0x40c003f4 },
1653 { 0x08, 0x424503f2 },
1654 { 0x0a, 0x400000f3 },
1655 { 0x0b, 0x02a19020 },
1656 { 0x0c, 0x40a000f0 },
1657 { 0x0d, 0x90100210 },
1658 { 0x10, 0x400003f1 },
1659 { 0x11, 0x9033032e },
1660 {}
1661 };
1662
1663 static const struct hda_pintbl stac925xM6_pin_configs[] = {
1664 { 0x07, 0x40c003f4 },
1665 { 0x08, 0x424503f2 },
1666 { 0x0a, 0x400000f3 },
1667 { 0x0b, 0x02a19020 },
1668 { 0x0c, 0x40a000f0 },
1669 { 0x0d, 0x90100210 },
1670 { 0x10, 0x400003f1 },
1671 { 0x11, 0x90330320 },
1672 {}
1673 };
1674
1675 static const struct hda_fixup stac925x_fixups[] = {
1676 [STAC_REF] = {
1677 .type = HDA_FIXUP_PINS,
1678 .v.pins = ref925x_pin_configs,
1679 },
1680 [STAC_M1] = {
1681 .type = HDA_FIXUP_PINS,
1682 .v.pins = stac925xM1_pin_configs,
1683 },
1684 [STAC_M1_2] = {
1685 .type = HDA_FIXUP_PINS,
1686 .v.pins = stac925xM1_2_pin_configs,
1687 },
1688 [STAC_M2] = {
1689 .type = HDA_FIXUP_PINS,
1690 .v.pins = stac925xM2_pin_configs,
1691 },
1692 [STAC_M2_2] = {
1693 .type = HDA_FIXUP_PINS,
1694 .v.pins = stac925xM2_2_pin_configs,
1695 },
1696 [STAC_M3] = {
1697 .type = HDA_FIXUP_PINS,
1698 .v.pins = stac925xM3_pin_configs,
1699 },
1700 [STAC_M5] = {
1701 .type = HDA_FIXUP_PINS,
1702 .v.pins = stac925xM5_pin_configs,
1703 },
1704 [STAC_M6] = {
1705 .type = HDA_FIXUP_PINS,
1706 .v.pins = stac925xM6_pin_configs,
1707 },
1708 };
1709
1710 static const struct hda_model_fixup stac925x_models[] = {
1711 { .id = STAC_REF, .name = "ref" },
1712 { .id = STAC_M1, .name = "m1" },
1713 { .id = STAC_M1_2, .name = "m1-2" },
1714 { .id = STAC_M2, .name = "m2" },
1715 { .id = STAC_M2_2, .name = "m2-2" },
1716 { .id = STAC_M3, .name = "m3" },
1717 { .id = STAC_M5, .name = "m5" },
1718 { .id = STAC_M6, .name = "m6" },
1719 {}
1720 };
1721
1722 static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1723 /* SigmaTel reference board */
1724 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1725 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1726 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1727
1728 /* Default table for unknown ID */
1729 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1730
1731 /* gateway machines are checked via codec ssid */
1732 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1733 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1734 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1735 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
1736 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1737 /* Not sure about the brand name for those */
1738 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1739 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1740 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1741 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1742 {} /* terminator */
1743 };
1744
1745 static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1746 { 0x0a, 0x02214030 },
1747 { 0x0b, 0x02a19040 },
1748 { 0x0c, 0x01a19020 },
1749 { 0x0d, 0x02214030 },
1750 { 0x0e, 0x0181302e },
1751 { 0x0f, 0x01014010 },
1752 { 0x10, 0x01014020 },
1753 { 0x11, 0x01014030 },
1754 { 0x12, 0x02319040 },
1755 { 0x13, 0x90a000f0 },
1756 { 0x14, 0x90a000f0 },
1757 { 0x22, 0x01452050 },
1758 { 0x23, 0x01452050 },
1759 {}
1760 };
1761
1762 static const struct hda_pintbl dell_m6_pin_configs[] = {
1763 { 0x0a, 0x0321101f },
1764 { 0x0b, 0x4f00000f },
1765 { 0x0c, 0x4f0000f0 },
1766 { 0x0d, 0x90170110 },
1767 { 0x0e, 0x03a11020 },
1768 { 0x0f, 0x0321101f },
1769 { 0x10, 0x4f0000f0 },
1770 { 0x11, 0x4f0000f0 },
1771 { 0x12, 0x4f0000f0 },
1772 { 0x13, 0x90a60160 },
1773 { 0x14, 0x4f0000f0 },
1774 { 0x22, 0x4f0000f0 },
1775 { 0x23, 0x4f0000f0 },
1776 {}
1777 };
1778
1779 static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1780 { 0x0a, 0x0321101f },
1781 { 0x0b, 0x0321101f },
1782 { 0x0c, 0x03a11020 },
1783 { 0x0d, 0x03014020 },
1784 { 0x0e, 0x90170110 },
1785 { 0x0f, 0x4f0000f0 },
1786 { 0x10, 0x4f0000f0 },
1787 { 0x11, 0x4f0000f0 },
1788 { 0x12, 0x4f0000f0 },
1789 { 0x13, 0x90a60160 },
1790 { 0x14, 0x4f0000f0 },
1791 { 0x22, 0x4f0000f0 },
1792 { 0x23, 0x904601b0 },
1793 {}
1794 };
1795
1796 static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1797 { 0x0a, 0x02214230 },
1798 { 0x0b, 0x02A19240 },
1799 { 0x0c, 0x01013214 },
1800 { 0x0d, 0x01014210 },
1801 { 0x0e, 0x01A19250 },
1802 { 0x0f, 0x01011212 },
1803 { 0x10, 0x01016211 },
1804 {}
1805 };
1806
1807 static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
1808 { 0x0a, 0x02214030 },
1809 { 0x0b, 0x02A19010 },
1810 {}
1811 };
1812
1813 static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
1814 { 0x0e, 0x400000f0 },
1815 {}
1816 };
1817
1818 static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1819 const struct hda_fixup *fix, int action)
1820 {
1821 struct sigmatel_spec *spec = codec->spec;
1822
1823 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1824 return;
1825
1826 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1827 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1828 }
1829
1830 static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1831 {
1832 struct sigmatel_spec *spec = codec->spec;
1833
1834 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
1835 spec->eapd_switch = 0;
1836 }
1837
1838 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1839 const struct hda_fixup *fix, int action)
1840 {
1841 struct sigmatel_spec *spec = codec->spec;
1842
1843 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1844 return;
1845
1846 stac92hd73xx_fixup_dell(codec);
1847 snd_hda_add_verbs(codec, dell_eq_core_init);
1848 spec->volknob_init = 1;
1849 }
1850
1851 /* Analog Mics */
1852 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1853 const struct hda_fixup *fix, int action)
1854 {
1855 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1856 return;
1857
1858 stac92hd73xx_fixup_dell(codec);
1859 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1860 }
1861
1862 /* Digital Mics */
1863 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1864 const struct hda_fixup *fix, int action)
1865 {
1866 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1867 return;
1868
1869 stac92hd73xx_fixup_dell(codec);
1870 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1871 }
1872
1873 /* Both */
1874 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1875 const struct hda_fixup *fix, int action)
1876 {
1877 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1878 return;
1879
1880 stac92hd73xx_fixup_dell(codec);
1881 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1882 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1883 }
1884
1885 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1886 const struct hda_fixup *fix, int action)
1887 {
1888 struct sigmatel_spec *spec = codec->spec;
1889
1890 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1891 return;
1892
1893 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
1894 spec->eapd_switch = 0;
1895 }
1896
1897 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1898 const struct hda_fixup *fix, int action)
1899 {
1900 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1901 codec->no_jack_detect = 1;
1902 }
1903
1904 static const struct hda_fixup stac92hd73xx_fixups[] = {
1905 [STAC_92HD73XX_REF] = {
1906 .type = HDA_FIXUP_FUNC,
1907 .v.func = stac92hd73xx_fixup_ref,
1908 },
1909 [STAC_DELL_M6_AMIC] = {
1910 .type = HDA_FIXUP_FUNC,
1911 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1912 },
1913 [STAC_DELL_M6_DMIC] = {
1914 .type = HDA_FIXUP_FUNC,
1915 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1916 },
1917 [STAC_DELL_M6_BOTH] = {
1918 .type = HDA_FIXUP_FUNC,
1919 .v.func = stac92hd73xx_fixup_dell_m6_both,
1920 },
1921 [STAC_DELL_EQ] = {
1922 .type = HDA_FIXUP_FUNC,
1923 .v.func = stac92hd73xx_fixup_dell_eq,
1924 },
1925 [STAC_ALIENWARE_M17X] = {
1926 .type = HDA_FIXUP_FUNC,
1927 .v.func = stac92hd73xx_fixup_alienware_m17x,
1928 },
1929 [STAC_92HD73XX_INTEL] = {
1930 .type = HDA_FIXUP_PINS,
1931 .v.pins = intel_dg45id_pin_configs,
1932 },
1933 [STAC_92HD73XX_NO_JD] = {
1934 .type = HDA_FIXUP_FUNC,
1935 .v.func = stac92hd73xx_fixup_no_jd,
1936 },
1937 [STAC_92HD89XX_HP_FRONT_JACK] = {
1938 .type = HDA_FIXUP_PINS,
1939 .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
1940 },
1941 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
1942 .type = HDA_FIXUP_PINS,
1943 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
1944 }
1945 };
1946
1947 static const struct hda_model_fixup stac92hd73xx_models[] = {
1948 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1949 { .id = STAC_92HD73XX_REF, .name = "ref" },
1950 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1951 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1952 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1953 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1954 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1955 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1956 {}
1957 };
1958
1959 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
1960 /* SigmaTel reference board */
1961 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1962 "DFI LanParty", STAC_92HD73XX_REF),
1963 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1964 "DFI LanParty", STAC_92HD73XX_REF),
1965 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1966 "Intel DG45ID", STAC_92HD73XX_INTEL),
1967 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1968 "Intel DG45FC", STAC_92HD73XX_INTEL),
1969 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1970 "Dell Studio 1535", STAC_DELL_M6_DMIC),
1971 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1972 "unknown Dell", STAC_DELL_M6_DMIC),
1973 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1974 "unknown Dell", STAC_DELL_M6_BOTH),
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1976 "unknown Dell", STAC_DELL_M6_BOTH),
1977 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1978 "unknown Dell", STAC_DELL_M6_AMIC),
1979 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1980 "unknown Dell", STAC_DELL_M6_AMIC),
1981 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1982 "unknown Dell", STAC_DELL_M6_DMIC),
1983 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1984 "unknown Dell", STAC_DELL_M6_DMIC),
1985 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1986 "Dell Studio 1537", STAC_DELL_M6_DMIC),
1987 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1988 "Dell Studio 17", STAC_DELL_M6_DMIC),
1989 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1990 "Dell Studio 1555", STAC_DELL_M6_DMIC),
1991 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1992 "Dell Studio 1557", STAC_DELL_M6_DMIC),
1993 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1994 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
1995 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1996 "Dell Studio 1558", STAC_DELL_M6_DMIC),
1997 /* codec SSID matching */
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1999 "Alienware M17x", STAC_ALIENWARE_M17X),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
2001 "Alienware M17x", STAC_ALIENWARE_M17X),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
2003 "Alienware M17x R3", STAC_DELL_EQ),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
2005 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
2007 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
2008 {} /* terminator */
2009 };
2010
2011 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
2012 { 0x0a, 0x02214030 },
2013 { 0x0b, 0x02211010 },
2014 { 0x0c, 0x02a19020 },
2015 { 0x0d, 0x02170130 },
2016 { 0x0e, 0x01014050 },
2017 { 0x0f, 0x01819040 },
2018 { 0x10, 0x01014020 },
2019 { 0x11, 0x90a3014e },
2020 { 0x1f, 0x01451160 },
2021 { 0x20, 0x98560170 },
2022 {}
2023 };
2024
2025 static const struct hda_pintbl dell_s14_pin_configs[] = {
2026 { 0x0a, 0x0221403f },
2027 { 0x0b, 0x0221101f },
2028 { 0x0c, 0x02a19020 },
2029 { 0x0d, 0x90170110 },
2030 { 0x0e, 0x40f000f0 },
2031 { 0x0f, 0x40f000f0 },
2032 { 0x10, 0x40f000f0 },
2033 { 0x11, 0x90a60160 },
2034 { 0x1f, 0x40f000f0 },
2035 { 0x20, 0x40f000f0 },
2036 {}
2037 };
2038
2039 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
2040 { 0x0a, 0x02a11020 },
2041 { 0x0b, 0x0221101f },
2042 { 0x0c, 0x400000f0 },
2043 { 0x0d, 0x90170110 },
2044 { 0x0e, 0x400000f1 },
2045 { 0x0f, 0x400000f2 },
2046 { 0x10, 0x400000f3 },
2047 { 0x11, 0x90a60160 },
2048 { 0x1f, 0x400000f4 },
2049 { 0x20, 0x400000f5 },
2050 {}
2051 };
2052
2053 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2054 { 0x0a, 0x03a12050 },
2055 { 0x0b, 0x0321201f },
2056 { 0x0c, 0x40f000f0 },
2057 { 0x0d, 0x90170110 },
2058 { 0x0e, 0x40f000f0 },
2059 { 0x0f, 0x40f000f0 },
2060 { 0x10, 0x90170110 },
2061 { 0x11, 0xd5a30140 },
2062 { 0x1f, 0x40f000f0 },
2063 { 0x20, 0x40f000f0 },
2064 {}
2065 };
2066
2067 static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2068 { 0x0a, 0x01813050 },
2069 { 0x0b, 0x0421201f },
2070 { 0x0c, 0x04a1205e },
2071 { 0x0d, 0x96130310 },
2072 { 0x0e, 0x96130310 },
2073 { 0x0f, 0x0101401f },
2074 { 0x10, 0x1111611f },
2075 { 0x11, 0xd5a30130 },
2076 {}
2077 };
2078
2079 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2080 { 0x0a, 0x40f000f0 },
2081 { 0x0b, 0x0221101f },
2082 { 0x0c, 0x02a11020 },
2083 { 0x0d, 0x92170110 },
2084 { 0x0e, 0x40f000f0 },
2085 { 0x0f, 0x92170110 },
2086 { 0x10, 0x40f000f0 },
2087 { 0x11, 0xd5a30130 },
2088 { 0x1f, 0x40f000f0 },
2089 { 0x20, 0x40f000f0 },
2090 {}
2091 };
2092
2093 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2094 const struct hda_fixup *fix, int action)
2095 {
2096 struct sigmatel_spec *spec = codec->spec;
2097
2098 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2099 return;
2100
2101 if (hp_bnb2011_with_dock(codec)) {
2102 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2103 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2104 }
2105
2106 if (find_mute_led_cfg(codec, spec->default_polarity))
2107 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
2108 spec->gpio_led,
2109 spec->gpio_led_polarity);
2110
2111 /* allow auto-switching of dock line-in */
2112 spec->gen.line_in_auto_switch = true;
2113 }
2114
2115 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2116 const struct hda_fixup *fix, int action)
2117 {
2118 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2119 return;
2120
2121 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2122 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2123 }
2124
2125 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2126 const struct hda_fixup *fix, int action)
2127 {
2128 struct sigmatel_spec *spec = codec->spec;
2129
2130 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2131 spec->default_polarity = 0;
2132 }
2133
2134 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2135 const struct hda_fixup *fix, int action)
2136 {
2137 struct sigmatel_spec *spec = codec->spec;
2138
2139 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2140 spec->default_polarity = 1;
2141 }
2142
2143 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2144 const struct hda_fixup *fix, int action)
2145 {
2146 struct sigmatel_spec *spec = codec->spec;
2147
2148 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2149 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
2150 /* resetting controller clears GPIO, so we need to keep on */
2151 codec->bus->power_keep_link_on = 1;
2152 }
2153 }
2154
2155 static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
2156 const struct hda_fixup *fix, int action)
2157 {
2158 struct sigmatel_spec *spec = codec->spec;
2159
2160 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2161 spec->gpio_led = 0x10; /* GPIO4 */
2162 spec->default_polarity = 0;
2163 }
2164 }
2165
2166 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2167 const struct hda_fixup *fix, int action)
2168 {
2169 struct sigmatel_spec *spec = codec->spec;
2170
2171 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2172 spec->headset_jack = 1;
2173 }
2174
2175 static const struct hda_verb hp_bnb13_eq_verbs[] = {
2176 /* 44.1KHz base */
2177 { 0x22, 0x7A6, 0x3E },
2178 { 0x22, 0x7A7, 0x68 },
2179 { 0x22, 0x7A8, 0x17 },
2180 { 0x22, 0x7A9, 0x3E },
2181 { 0x22, 0x7AA, 0x68 },
2182 { 0x22, 0x7AB, 0x17 },
2183 { 0x22, 0x7AC, 0x00 },
2184 { 0x22, 0x7AD, 0x80 },
2185 { 0x22, 0x7A6, 0x83 },
2186 { 0x22, 0x7A7, 0x2F },
2187 { 0x22, 0x7A8, 0xD1 },
2188 { 0x22, 0x7A9, 0x83 },
2189 { 0x22, 0x7AA, 0x2F },
2190 { 0x22, 0x7AB, 0xD1 },
2191 { 0x22, 0x7AC, 0x01 },
2192 { 0x22, 0x7AD, 0x80 },
2193 { 0x22, 0x7A6, 0x3E },
2194 { 0x22, 0x7A7, 0x68 },
2195 { 0x22, 0x7A8, 0x17 },
2196 { 0x22, 0x7A9, 0x3E },
2197 { 0x22, 0x7AA, 0x68 },
2198 { 0x22, 0x7AB, 0x17 },
2199 { 0x22, 0x7AC, 0x02 },
2200 { 0x22, 0x7AD, 0x80 },
2201 { 0x22, 0x7A6, 0x7C },
2202 { 0x22, 0x7A7, 0xC6 },
2203 { 0x22, 0x7A8, 0x0C },
2204 { 0x22, 0x7A9, 0x7C },
2205 { 0x22, 0x7AA, 0xC6 },
2206 { 0x22, 0x7AB, 0x0C },
2207 { 0x22, 0x7AC, 0x03 },
2208 { 0x22, 0x7AD, 0x80 },
2209 { 0x22, 0x7A6, 0xC3 },
2210 { 0x22, 0x7A7, 0x25 },
2211 { 0x22, 0x7A8, 0xAF },
2212 { 0x22, 0x7A9, 0xC3 },
2213 { 0x22, 0x7AA, 0x25 },
2214 { 0x22, 0x7AB, 0xAF },
2215 { 0x22, 0x7AC, 0x04 },
2216 { 0x22, 0x7AD, 0x80 },
2217 { 0x22, 0x7A6, 0x3E },
2218 { 0x22, 0x7A7, 0x85 },
2219 { 0x22, 0x7A8, 0x73 },
2220 { 0x22, 0x7A9, 0x3E },
2221 { 0x22, 0x7AA, 0x85 },
2222 { 0x22, 0x7AB, 0x73 },
2223 { 0x22, 0x7AC, 0x05 },
2224 { 0x22, 0x7AD, 0x80 },
2225 { 0x22, 0x7A6, 0x85 },
2226 { 0x22, 0x7A7, 0x39 },
2227 { 0x22, 0x7A8, 0xC7 },
2228 { 0x22, 0x7A9, 0x85 },
2229 { 0x22, 0x7AA, 0x39 },
2230 { 0x22, 0x7AB, 0xC7 },
2231 { 0x22, 0x7AC, 0x06 },
2232 { 0x22, 0x7AD, 0x80 },
2233 { 0x22, 0x7A6, 0x3C },
2234 { 0x22, 0x7A7, 0x90 },
2235 { 0x22, 0x7A8, 0xB0 },
2236 { 0x22, 0x7A9, 0x3C },
2237 { 0x22, 0x7AA, 0x90 },
2238 { 0x22, 0x7AB, 0xB0 },
2239 { 0x22, 0x7AC, 0x07 },
2240 { 0x22, 0x7AD, 0x80 },
2241 { 0x22, 0x7A6, 0x7A },
2242 { 0x22, 0x7A7, 0xC6 },
2243 { 0x22, 0x7A8, 0x39 },
2244 { 0x22, 0x7A9, 0x7A },
2245 { 0x22, 0x7AA, 0xC6 },
2246 { 0x22, 0x7AB, 0x39 },
2247 { 0x22, 0x7AC, 0x08 },
2248 { 0x22, 0x7AD, 0x80 },
2249 { 0x22, 0x7A6, 0xC4 },
2250 { 0x22, 0x7A7, 0xE9 },
2251 { 0x22, 0x7A8, 0xDC },
2252 { 0x22, 0x7A9, 0xC4 },
2253 { 0x22, 0x7AA, 0xE9 },
2254 { 0x22, 0x7AB, 0xDC },
2255 { 0x22, 0x7AC, 0x09 },
2256 { 0x22, 0x7AD, 0x80 },
2257 { 0x22, 0x7A6, 0x3D },
2258 { 0x22, 0x7A7, 0xE1 },
2259 { 0x22, 0x7A8, 0x0D },
2260 { 0x22, 0x7A9, 0x3D },
2261 { 0x22, 0x7AA, 0xE1 },
2262 { 0x22, 0x7AB, 0x0D },
2263 { 0x22, 0x7AC, 0x0A },
2264 { 0x22, 0x7AD, 0x80 },
2265 { 0x22, 0x7A6, 0x89 },
2266 { 0x22, 0x7A7, 0xB6 },
2267 { 0x22, 0x7A8, 0xEB },
2268 { 0x22, 0x7A9, 0x89 },
2269 { 0x22, 0x7AA, 0xB6 },
2270 { 0x22, 0x7AB, 0xEB },
2271 { 0x22, 0x7AC, 0x0B },
2272 { 0x22, 0x7AD, 0x80 },
2273 { 0x22, 0x7A6, 0x39 },
2274 { 0x22, 0x7A7, 0x9D },
2275 { 0x22, 0x7A8, 0xFE },
2276 { 0x22, 0x7A9, 0x39 },
2277 { 0x22, 0x7AA, 0x9D },
2278 { 0x22, 0x7AB, 0xFE },
2279 { 0x22, 0x7AC, 0x0C },
2280 { 0x22, 0x7AD, 0x80 },
2281 { 0x22, 0x7A6, 0x76 },
2282 { 0x22, 0x7A7, 0x49 },
2283 { 0x22, 0x7A8, 0x15 },
2284 { 0x22, 0x7A9, 0x76 },
2285 { 0x22, 0x7AA, 0x49 },
2286 { 0x22, 0x7AB, 0x15 },
2287 { 0x22, 0x7AC, 0x0D },
2288 { 0x22, 0x7AD, 0x80 },
2289 { 0x22, 0x7A6, 0xC8 },
2290 { 0x22, 0x7A7, 0x80 },
2291 { 0x22, 0x7A8, 0xF5 },
2292 { 0x22, 0x7A9, 0xC8 },
2293 { 0x22, 0x7AA, 0x80 },
2294 { 0x22, 0x7AB, 0xF5 },
2295 { 0x22, 0x7AC, 0x0E },
2296 { 0x22, 0x7AD, 0x80 },
2297 { 0x22, 0x7A6, 0x40 },
2298 { 0x22, 0x7A7, 0x00 },
2299 { 0x22, 0x7A8, 0x00 },
2300 { 0x22, 0x7A9, 0x40 },
2301 { 0x22, 0x7AA, 0x00 },
2302 { 0x22, 0x7AB, 0x00 },
2303 { 0x22, 0x7AC, 0x0F },
2304 { 0x22, 0x7AD, 0x80 },
2305 { 0x22, 0x7A6, 0x90 },
2306 { 0x22, 0x7A7, 0x68 },
2307 { 0x22, 0x7A8, 0xF1 },
2308 { 0x22, 0x7A9, 0x90 },
2309 { 0x22, 0x7AA, 0x68 },
2310 { 0x22, 0x7AB, 0xF1 },
2311 { 0x22, 0x7AC, 0x10 },
2312 { 0x22, 0x7AD, 0x80 },
2313 { 0x22, 0x7A6, 0x34 },
2314 { 0x22, 0x7A7, 0x47 },
2315 { 0x22, 0x7A8, 0x6C },
2316 { 0x22, 0x7A9, 0x34 },
2317 { 0x22, 0x7AA, 0x47 },
2318 { 0x22, 0x7AB, 0x6C },
2319 { 0x22, 0x7AC, 0x11 },
2320 { 0x22, 0x7AD, 0x80 },
2321 { 0x22, 0x7A6, 0x6F },
2322 { 0x22, 0x7A7, 0x97 },
2323 { 0x22, 0x7A8, 0x0F },
2324 { 0x22, 0x7A9, 0x6F },
2325 { 0x22, 0x7AA, 0x97 },
2326 { 0x22, 0x7AB, 0x0F },
2327 { 0x22, 0x7AC, 0x12 },
2328 { 0x22, 0x7AD, 0x80 },
2329 { 0x22, 0x7A6, 0xCB },
2330 { 0x22, 0x7A7, 0xB8 },
2331 { 0x22, 0x7A8, 0x94 },
2332 { 0x22, 0x7A9, 0xCB },
2333 { 0x22, 0x7AA, 0xB8 },
2334 { 0x22, 0x7AB, 0x94 },
2335 { 0x22, 0x7AC, 0x13 },
2336 { 0x22, 0x7AD, 0x80 },
2337 { 0x22, 0x7A6, 0x40 },
2338 { 0x22, 0x7A7, 0x00 },
2339 { 0x22, 0x7A8, 0x00 },
2340 { 0x22, 0x7A9, 0x40 },
2341 { 0x22, 0x7AA, 0x00 },
2342 { 0x22, 0x7AB, 0x00 },
2343 { 0x22, 0x7AC, 0x14 },
2344 { 0x22, 0x7AD, 0x80 },
2345 { 0x22, 0x7A6, 0x95 },
2346 { 0x22, 0x7A7, 0x76 },
2347 { 0x22, 0x7A8, 0x5B },
2348 { 0x22, 0x7A9, 0x95 },
2349 { 0x22, 0x7AA, 0x76 },
2350 { 0x22, 0x7AB, 0x5B },
2351 { 0x22, 0x7AC, 0x15 },
2352 { 0x22, 0x7AD, 0x80 },
2353 { 0x22, 0x7A6, 0x31 },
2354 { 0x22, 0x7A7, 0xAC },
2355 { 0x22, 0x7A8, 0x31 },
2356 { 0x22, 0x7A9, 0x31 },
2357 { 0x22, 0x7AA, 0xAC },
2358 { 0x22, 0x7AB, 0x31 },
2359 { 0x22, 0x7AC, 0x16 },
2360 { 0x22, 0x7AD, 0x80 },
2361 { 0x22, 0x7A6, 0x6A },
2362 { 0x22, 0x7A7, 0x89 },
2363 { 0x22, 0x7A8, 0xA5 },
2364 { 0x22, 0x7A9, 0x6A },
2365 { 0x22, 0x7AA, 0x89 },
2366 { 0x22, 0x7AB, 0xA5 },
2367 { 0x22, 0x7AC, 0x17 },
2368 { 0x22, 0x7AD, 0x80 },
2369 { 0x22, 0x7A6, 0xCE },
2370 { 0x22, 0x7A7, 0x53 },
2371 { 0x22, 0x7A8, 0xCF },
2372 { 0x22, 0x7A9, 0xCE },
2373 { 0x22, 0x7AA, 0x53 },
2374 { 0x22, 0x7AB, 0xCF },
2375 { 0x22, 0x7AC, 0x18 },
2376 { 0x22, 0x7AD, 0x80 },
2377 { 0x22, 0x7A6, 0x40 },
2378 { 0x22, 0x7A7, 0x00 },
2379 { 0x22, 0x7A8, 0x00 },
2380 { 0x22, 0x7A9, 0x40 },
2381 { 0x22, 0x7AA, 0x00 },
2382 { 0x22, 0x7AB, 0x00 },
2383 { 0x22, 0x7AC, 0x19 },
2384 { 0x22, 0x7AD, 0x80 },
2385 /* 48KHz base */
2386 { 0x22, 0x7A6, 0x3E },
2387 { 0x22, 0x7A7, 0x88 },
2388 { 0x22, 0x7A8, 0xDC },
2389 { 0x22, 0x7A9, 0x3E },
2390 { 0x22, 0x7AA, 0x88 },
2391 { 0x22, 0x7AB, 0xDC },
2392 { 0x22, 0x7AC, 0x1A },
2393 { 0x22, 0x7AD, 0x80 },
2394 { 0x22, 0x7A6, 0x82 },
2395 { 0x22, 0x7A7, 0xEE },
2396 { 0x22, 0x7A8, 0x46 },
2397 { 0x22, 0x7A9, 0x82 },
2398 { 0x22, 0x7AA, 0xEE },
2399 { 0x22, 0x7AB, 0x46 },
2400 { 0x22, 0x7AC, 0x1B },
2401 { 0x22, 0x7AD, 0x80 },
2402 { 0x22, 0x7A6, 0x3E },
2403 { 0x22, 0x7A7, 0x88 },
2404 { 0x22, 0x7A8, 0xDC },
2405 { 0x22, 0x7A9, 0x3E },
2406 { 0x22, 0x7AA, 0x88 },
2407 { 0x22, 0x7AB, 0xDC },
2408 { 0x22, 0x7AC, 0x1C },
2409 { 0x22, 0x7AD, 0x80 },
2410 { 0x22, 0x7A6, 0x7D },
2411 { 0x22, 0x7A7, 0x09 },
2412 { 0x22, 0x7A8, 0x28 },
2413 { 0x22, 0x7A9, 0x7D },
2414 { 0x22, 0x7AA, 0x09 },
2415 { 0x22, 0x7AB, 0x28 },
2416 { 0x22, 0x7AC, 0x1D },
2417 { 0x22, 0x7AD, 0x80 },
2418 { 0x22, 0x7A6, 0xC2 },
2419 { 0x22, 0x7A7, 0xE5 },
2420 { 0x22, 0x7A8, 0xB4 },
2421 { 0x22, 0x7A9, 0xC2 },
2422 { 0x22, 0x7AA, 0xE5 },
2423 { 0x22, 0x7AB, 0xB4 },
2424 { 0x22, 0x7AC, 0x1E },
2425 { 0x22, 0x7AD, 0x80 },
2426 { 0x22, 0x7A6, 0x3E },
2427 { 0x22, 0x7A7, 0xA3 },
2428 { 0x22, 0x7A8, 0x1F },
2429 { 0x22, 0x7A9, 0x3E },
2430 { 0x22, 0x7AA, 0xA3 },
2431 { 0x22, 0x7AB, 0x1F },
2432 { 0x22, 0x7AC, 0x1F },
2433 { 0x22, 0x7AD, 0x80 },
2434 { 0x22, 0x7A6, 0x84 },
2435 { 0x22, 0x7A7, 0xCA },
2436 { 0x22, 0x7A8, 0xF1 },
2437 { 0x22, 0x7A9, 0x84 },
2438 { 0x22, 0x7AA, 0xCA },
2439 { 0x22, 0x7AB, 0xF1 },
2440 { 0x22, 0x7AC, 0x20 },
2441 { 0x22, 0x7AD, 0x80 },
2442 { 0x22, 0x7A6, 0x3C },
2443 { 0x22, 0x7A7, 0xD5 },
2444 { 0x22, 0x7A8, 0x9C },
2445 { 0x22, 0x7A9, 0x3C },
2446 { 0x22, 0x7AA, 0xD5 },
2447 { 0x22, 0x7AB, 0x9C },
2448 { 0x22, 0x7AC, 0x21 },
2449 { 0x22, 0x7AD, 0x80 },
2450 { 0x22, 0x7A6, 0x7B },
2451 { 0x22, 0x7A7, 0x35 },
2452 { 0x22, 0x7A8, 0x0F },
2453 { 0x22, 0x7A9, 0x7B },
2454 { 0x22, 0x7AA, 0x35 },
2455 { 0x22, 0x7AB, 0x0F },
2456 { 0x22, 0x7AC, 0x22 },
2457 { 0x22, 0x7AD, 0x80 },
2458 { 0x22, 0x7A6, 0xC4 },
2459 { 0x22, 0x7A7, 0x87 },
2460 { 0x22, 0x7A8, 0x45 },
2461 { 0x22, 0x7A9, 0xC4 },
2462 { 0x22, 0x7AA, 0x87 },
2463 { 0x22, 0x7AB, 0x45 },
2464 { 0x22, 0x7AC, 0x23 },
2465 { 0x22, 0x7AD, 0x80 },
2466 { 0x22, 0x7A6, 0x3E },
2467 { 0x22, 0x7A7, 0x0A },
2468 { 0x22, 0x7A8, 0x78 },
2469 { 0x22, 0x7A9, 0x3E },
2470 { 0x22, 0x7AA, 0x0A },
2471 { 0x22, 0x7AB, 0x78 },
2472 { 0x22, 0x7AC, 0x24 },
2473 { 0x22, 0x7AD, 0x80 },
2474 { 0x22, 0x7A6, 0x88 },
2475 { 0x22, 0x7A7, 0xE2 },
2476 { 0x22, 0x7A8, 0x05 },
2477 { 0x22, 0x7A9, 0x88 },
2478 { 0x22, 0x7AA, 0xE2 },
2479 { 0x22, 0x7AB, 0x05 },
2480 { 0x22, 0x7AC, 0x25 },
2481 { 0x22, 0x7AD, 0x80 },
2482 { 0x22, 0x7A6, 0x3A },
2483 { 0x22, 0x7A7, 0x1A },
2484 { 0x22, 0x7A8, 0xA3 },
2485 { 0x22, 0x7A9, 0x3A },
2486 { 0x22, 0x7AA, 0x1A },
2487 { 0x22, 0x7AB, 0xA3 },
2488 { 0x22, 0x7AC, 0x26 },
2489 { 0x22, 0x7AD, 0x80 },
2490 { 0x22, 0x7A6, 0x77 },
2491 { 0x22, 0x7A7, 0x1D },
2492 { 0x22, 0x7A8, 0xFB },
2493 { 0x22, 0x7A9, 0x77 },
2494 { 0x22, 0x7AA, 0x1D },
2495 { 0x22, 0x7AB, 0xFB },
2496 { 0x22, 0x7AC, 0x27 },
2497 { 0x22, 0x7AD, 0x80 },
2498 { 0x22, 0x7A6, 0xC7 },
2499 { 0x22, 0x7A7, 0xDA },
2500 { 0x22, 0x7A8, 0xE5 },
2501 { 0x22, 0x7A9, 0xC7 },
2502 { 0x22, 0x7AA, 0xDA },
2503 { 0x22, 0x7AB, 0xE5 },
2504 { 0x22, 0x7AC, 0x28 },
2505 { 0x22, 0x7AD, 0x80 },
2506 { 0x22, 0x7A6, 0x40 },
2507 { 0x22, 0x7A7, 0x00 },
2508 { 0x22, 0x7A8, 0x00 },
2509 { 0x22, 0x7A9, 0x40 },
2510 { 0x22, 0x7AA, 0x00 },
2511 { 0x22, 0x7AB, 0x00 },
2512 { 0x22, 0x7AC, 0x29 },
2513 { 0x22, 0x7AD, 0x80 },
2514 { 0x22, 0x7A6, 0x8E },
2515 { 0x22, 0x7A7, 0xD7 },
2516 { 0x22, 0x7A8, 0x22 },
2517 { 0x22, 0x7A9, 0x8E },
2518 { 0x22, 0x7AA, 0xD7 },
2519 { 0x22, 0x7AB, 0x22 },
2520 { 0x22, 0x7AC, 0x2A },
2521 { 0x22, 0x7AD, 0x80 },
2522 { 0x22, 0x7A6, 0x35 },
2523 { 0x22, 0x7A7, 0x26 },
2524 { 0x22, 0x7A8, 0xC6 },
2525 { 0x22, 0x7A9, 0x35 },
2526 { 0x22, 0x7AA, 0x26 },
2527 { 0x22, 0x7AB, 0xC6 },
2528 { 0x22, 0x7AC, 0x2B },
2529 { 0x22, 0x7AD, 0x80 },
2530 { 0x22, 0x7A6, 0x71 },
2531 { 0x22, 0x7A7, 0x28 },
2532 { 0x22, 0x7A8, 0xDE },
2533 { 0x22, 0x7A9, 0x71 },
2534 { 0x22, 0x7AA, 0x28 },
2535 { 0x22, 0x7AB, 0xDE },
2536 { 0x22, 0x7AC, 0x2C },
2537 { 0x22, 0x7AD, 0x80 },
2538 { 0x22, 0x7A6, 0xCA },
2539 { 0x22, 0x7A7, 0xD9 },
2540 { 0x22, 0x7A8, 0x3A },
2541 { 0x22, 0x7A9, 0xCA },
2542 { 0x22, 0x7AA, 0xD9 },
2543 { 0x22, 0x7AB, 0x3A },
2544 { 0x22, 0x7AC, 0x2D },
2545 { 0x22, 0x7AD, 0x80 },
2546 { 0x22, 0x7A6, 0x40 },
2547 { 0x22, 0x7A7, 0x00 },
2548 { 0x22, 0x7A8, 0x00 },
2549 { 0x22, 0x7A9, 0x40 },
2550 { 0x22, 0x7AA, 0x00 },
2551 { 0x22, 0x7AB, 0x00 },
2552 { 0x22, 0x7AC, 0x2E },
2553 { 0x22, 0x7AD, 0x80 },
2554 { 0x22, 0x7A6, 0x93 },
2555 { 0x22, 0x7A7, 0x5E },
2556 { 0x22, 0x7A8, 0xD8 },
2557 { 0x22, 0x7A9, 0x93 },
2558 { 0x22, 0x7AA, 0x5E },
2559 { 0x22, 0x7AB, 0xD8 },
2560 { 0x22, 0x7AC, 0x2F },
2561 { 0x22, 0x7AD, 0x80 },
2562 { 0x22, 0x7A6, 0x32 },
2563 { 0x22, 0x7A7, 0xB7 },
2564 { 0x22, 0x7A8, 0xB1 },
2565 { 0x22, 0x7A9, 0x32 },
2566 { 0x22, 0x7AA, 0xB7 },
2567 { 0x22, 0x7AB, 0xB1 },
2568 { 0x22, 0x7AC, 0x30 },
2569 { 0x22, 0x7AD, 0x80 },
2570 { 0x22, 0x7A6, 0x6C },
2571 { 0x22, 0x7A7, 0xA1 },
2572 { 0x22, 0x7A8, 0x28 },
2573 { 0x22, 0x7A9, 0x6C },
2574 { 0x22, 0x7AA, 0xA1 },
2575 { 0x22, 0x7AB, 0x28 },
2576 { 0x22, 0x7AC, 0x31 },
2577 { 0x22, 0x7AD, 0x80 },
2578 { 0x22, 0x7A6, 0xCD },
2579 { 0x22, 0x7A7, 0x48 },
2580 { 0x22, 0x7A8, 0x4F },
2581 { 0x22, 0x7A9, 0xCD },
2582 { 0x22, 0x7AA, 0x48 },
2583 { 0x22, 0x7AB, 0x4F },
2584 { 0x22, 0x7AC, 0x32 },
2585 { 0x22, 0x7AD, 0x80 },
2586 { 0x22, 0x7A6, 0x40 },
2587 { 0x22, 0x7A7, 0x00 },
2588 { 0x22, 0x7A8, 0x00 },
2589 { 0x22, 0x7A9, 0x40 },
2590 { 0x22, 0x7AA, 0x00 },
2591 { 0x22, 0x7AB, 0x00 },
2592 { 0x22, 0x7AC, 0x33 },
2593 { 0x22, 0x7AD, 0x80 },
2594 /* common */
2595 { 0x22, 0x782, 0xC1 },
2596 { 0x22, 0x771, 0x2C },
2597 { 0x22, 0x772, 0x2C },
2598 { 0x22, 0x788, 0x04 },
2599 { 0x01, 0x7B0, 0x08 },
2600 {}
2601 };
2602
2603 static const struct hda_fixup stac92hd83xxx_fixups[] = {
2604 [STAC_92HD83XXX_REF] = {
2605 .type = HDA_FIXUP_PINS,
2606 .v.pins = ref92hd83xxx_pin_configs,
2607 },
2608 [STAC_92HD83XXX_PWR_REF] = {
2609 .type = HDA_FIXUP_PINS,
2610 .v.pins = ref92hd83xxx_pin_configs,
2611 },
2612 [STAC_DELL_S14] = {
2613 .type = HDA_FIXUP_PINS,
2614 .v.pins = dell_s14_pin_configs,
2615 },
2616 [STAC_DELL_VOSTRO_3500] = {
2617 .type = HDA_FIXUP_PINS,
2618 .v.pins = dell_vostro_3500_pin_configs,
2619 },
2620 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2621 .type = HDA_FIXUP_PINS,
2622 .v.pins = hp_cNB11_intquad_pin_configs,
2623 .chained = true,
2624 .chain_id = STAC_92HD83XXX_HP,
2625 },
2626 [STAC_92HD83XXX_HP] = {
2627 .type = HDA_FIXUP_FUNC,
2628 .v.func = stac92hd83xxx_fixup_hp,
2629 },
2630 [STAC_HP_DV7_4000] = {
2631 .type = HDA_FIXUP_PINS,
2632 .v.pins = hp_dv7_4000_pin_configs,
2633 .chained = true,
2634 .chain_id = STAC_92HD83XXX_HP,
2635 },
2636 [STAC_HP_ZEPHYR] = {
2637 .type = HDA_FIXUP_FUNC,
2638 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2639 .chained = true,
2640 .chain_id = STAC_92HD83XXX_HP,
2641 },
2642 [STAC_92HD83XXX_HP_LED] = {
2643 .type = HDA_FIXUP_FUNC,
2644 .v.func = stac92hd83xxx_fixup_hp_led,
2645 .chained = true,
2646 .chain_id = STAC_92HD83XXX_HP,
2647 },
2648 [STAC_92HD83XXX_HP_INV_LED] = {
2649 .type = HDA_FIXUP_FUNC,
2650 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2651 .chained = true,
2652 .chain_id = STAC_92HD83XXX_HP,
2653 },
2654 [STAC_92HD83XXX_HP_MIC_LED] = {
2655 .type = HDA_FIXUP_FUNC,
2656 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2657 .chained = true,
2658 .chain_id = STAC_92HD83XXX_HP,
2659 },
2660 [STAC_HP_LED_GPIO10] = {
2661 .type = HDA_FIXUP_FUNC,
2662 .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
2663 .chained = true,
2664 .chain_id = STAC_92HD83XXX_HP,
2665 },
2666 [STAC_92HD83XXX_HEADSET_JACK] = {
2667 .type = HDA_FIXUP_FUNC,
2668 .v.func = stac92hd83xxx_fixup_headset_jack,
2669 },
2670 [STAC_HP_ENVY_BASS] = {
2671 .type = HDA_FIXUP_PINS,
2672 .v.pins = (const struct hda_pintbl[]) {
2673 { 0x0f, 0x90170111 },
2674 {}
2675 },
2676 },
2677 [STAC_HP_BNB13_EQ] = {
2678 .type = HDA_FIXUP_VERBS,
2679 .v.verbs = hp_bnb13_eq_verbs,
2680 .chained = true,
2681 .chain_id = STAC_92HD83XXX_HP_MIC_LED,
2682 },
2683 };
2684
2685 static const struct hda_model_fixup stac92hd83xxx_models[] = {
2686 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2687 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2688 { .id = STAC_DELL_S14, .name = "dell-s14" },
2689 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2690 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2691 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2692 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2693 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2694 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2695 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2696 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
2697 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
2698 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
2699 {}
2700 };
2701
2702 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
2703 /* SigmaTel reference board */
2704 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2705 "DFI LanParty", STAC_92HD83XXX_REF),
2706 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2707 "DFI LanParty", STAC_92HD83XXX_REF),
2708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2709 "unknown Dell", STAC_DELL_S14),
2710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2711 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2713 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2715 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2717 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2719 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2721 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2723 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2725 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2727 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
2728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2729 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
2730 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2731 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2732 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2733 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2734 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2735 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2736 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
2737 "HP Pavilion dv7", STAC_HP_DV7_4000),
2738 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2739 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2740 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2741 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2742 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2743 "HP Envy Spectre", STAC_HP_ENVY_BASS),
2744 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
2745 "HP Folio 13", STAC_HP_LED_GPIO10),
2746 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2747 "HP Folio", STAC_HP_BNB13_EQ),
2748 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
2749 "HP bNB13", STAC_HP_BNB13_EQ),
2750 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
2751 "HP bNB13", STAC_HP_BNB13_EQ),
2752 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
2753 "HP bNB13", STAC_HP_BNB13_EQ),
2754 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
2755 "HP bNB13", STAC_HP_BNB13_EQ),
2756 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
2757 "HP bNB13", STAC_HP_BNB13_EQ),
2758 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
2759 "HP bNB13", STAC_HP_BNB13_EQ),
2760 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
2761 "HP bNB13", STAC_HP_BNB13_EQ),
2762 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
2763 "HP bNB13", STAC_HP_BNB13_EQ),
2764 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
2765 "HP bNB13", STAC_HP_BNB13_EQ),
2766 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
2767 "HP bNB13", STAC_HP_BNB13_EQ),
2768 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
2769 "HP bNB13", STAC_HP_BNB13_EQ),
2770 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
2771 "HP bNB13", STAC_HP_BNB13_EQ),
2772 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
2773 "HP bNB13", STAC_HP_BNB13_EQ),
2774 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
2775 "HP bNB13", STAC_HP_BNB13_EQ),
2776 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
2777 "HP bNB13", STAC_HP_BNB13_EQ),
2778 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
2779 "HP bNB13", STAC_HP_BNB13_EQ),
2780 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
2781 "HP bNB13", STAC_HP_BNB13_EQ),
2782 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
2783 "HP bNB13", STAC_HP_BNB13_EQ),
2784 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
2785 "HP bNB13", STAC_HP_BNB13_EQ),
2786 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
2787 "HP bNB13", STAC_HP_BNB13_EQ),
2788 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
2789 "HP bNB13", STAC_HP_BNB13_EQ),
2790 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
2791 "HP bNB13", STAC_HP_BNB13_EQ),
2792 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
2793 "HP bNB13", STAC_HP_BNB13_EQ),
2794 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
2795 "HP bNB13", STAC_HP_BNB13_EQ),
2796 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
2797 "HP bNB13", STAC_HP_BNB13_EQ),
2798 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
2799 "HP bNB13", STAC_HP_BNB13_EQ),
2800 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
2801 "HP bNB13", STAC_HP_BNB13_EQ),
2802 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
2803 "HP bNB13", STAC_HP_BNB13_EQ),
2804 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
2805 "HP bNB13", STAC_HP_BNB13_EQ),
2806 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
2807 "HP bNB13", STAC_HP_BNB13_EQ),
2808 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
2809 "HP bNB13", STAC_HP_BNB13_EQ),
2810 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
2811 "HP bNB13", STAC_HP_BNB13_EQ),
2812 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
2813 "HP bNB13", STAC_HP_BNB13_EQ),
2814 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
2815 "HP bNB13", STAC_HP_BNB13_EQ),
2816 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
2817 "HP bNB13", STAC_HP_BNB13_EQ),
2818 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
2819 "HP bNB13", STAC_HP_BNB13_EQ),
2820 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
2821 "HP bNB13", STAC_HP_BNB13_EQ),
2822 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
2823 "HP bNB13", STAC_HP_BNB13_EQ),
2824 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
2825 "HP bNB13", STAC_HP_BNB13_EQ),
2826 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
2827 "HP bNB13", STAC_HP_BNB13_EQ),
2828 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
2829 "HP bNB13", STAC_HP_BNB13_EQ),
2830 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
2831 "HP bNB13", STAC_HP_BNB13_EQ),
2832 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
2833 "HP bNB13", STAC_HP_BNB13_EQ),
2834 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
2835 "HP bNB13", STAC_HP_BNB13_EQ),
2836 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
2837 "HP bNB13", STAC_HP_BNB13_EQ),
2838 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
2839 "HP bNB13", STAC_HP_BNB13_EQ),
2840 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
2841 "HP bNB13", STAC_HP_BNB13_EQ),
2842 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2843 "HP", STAC_92HD83XXX_HP_MIC_LED),
2844 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2845 "HP", STAC_92HD83XXX_HP_MIC_LED),
2846 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2847 "HP", STAC_92HD83XXX_HP_MIC_LED),
2848 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2849 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2850 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2851 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2852 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2853 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2854 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2855 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2856 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2857 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2858 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2859 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2860 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2861 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2862 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2863 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2864 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2865 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2866 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2867 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2868 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2869 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2870 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2871 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2872 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2873 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2874 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2875 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2876 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2877 "HP", STAC_HP_ZEPHYR),
2878 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2879 "HP Mini", STAC_92HD83XXX_HP_LED),
2880 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2881 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
2882 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2883 "HP Mini", STAC_92HD83XXX_HP_LED),
2884 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
2885 {} /* terminator */
2886 };
2887
2888 /* HP dv7 bass switch - GPIO5 */
2889 #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2890 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2891 struct snd_ctl_elem_value *ucontrol)
2892 {
2893 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2894 struct sigmatel_spec *spec = codec->spec;
2895 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2896 return 0;
2897 }
2898
2899 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2900 struct snd_ctl_elem_value *ucontrol)
2901 {
2902 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2903 struct sigmatel_spec *spec = codec->spec;
2904 unsigned int gpio_data;
2905
2906 gpio_data = (spec->gpio_data & ~0x20) |
2907 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2908 if (gpio_data == spec->gpio_data)
2909 return 0;
2910 spec->gpio_data = gpio_data;
2911 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2912 return 1;
2913 }
2914
2915 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2916 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2917 .info = stac_hp_bass_gpio_info,
2918 .get = stac_hp_bass_gpio_get,
2919 .put = stac_hp_bass_gpio_put,
2920 };
2921
2922 static int stac_add_hp_bass_switch(struct hda_codec *codec)
2923 {
2924 struct sigmatel_spec *spec = codec->spec;
2925
2926 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2927 &stac_hp_bass_sw_ctrl))
2928 return -ENOMEM;
2929
2930 spec->gpio_mask |= 0x20;
2931 spec->gpio_dir |= 0x20;
2932 spec->gpio_data |= 0x20;
2933 return 0;
2934 }
2935
2936 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2937 { 0x0a, 0x02214030 },
2938 { 0x0b, 0x02a19040 },
2939 { 0x0c, 0x01a19020 },
2940 { 0x0d, 0x01014010 },
2941 { 0x0e, 0x0181302e },
2942 { 0x0f, 0x01014010 },
2943 { 0x14, 0x01019020 },
2944 { 0x18, 0x90a000f0 },
2945 { 0x19, 0x90a000f0 },
2946 { 0x1e, 0x01452050 },
2947 { 0x1f, 0x01452050 },
2948 {}
2949 };
2950
2951 static const struct hda_pintbl dell_m4_1_pin_configs[] = {
2952 { 0x0a, 0x0421101f },
2953 { 0x0b, 0x04a11221 },
2954 { 0x0c, 0x40f000f0 },
2955 { 0x0d, 0x90170110 },
2956 { 0x0e, 0x23a1902e },
2957 { 0x0f, 0x23014250 },
2958 { 0x14, 0x40f000f0 },
2959 { 0x18, 0x90a000f0 },
2960 { 0x19, 0x40f000f0 },
2961 { 0x1e, 0x4f0000f0 },
2962 { 0x1f, 0x4f0000f0 },
2963 {}
2964 };
2965
2966 static const struct hda_pintbl dell_m4_2_pin_configs[] = {
2967 { 0x0a, 0x0421101f },
2968 { 0x0b, 0x04a11221 },
2969 { 0x0c, 0x90a70330 },
2970 { 0x0d, 0x90170110 },
2971 { 0x0e, 0x23a1902e },
2972 { 0x0f, 0x23014250 },
2973 { 0x14, 0x40f000f0 },
2974 { 0x18, 0x40f000f0 },
2975 { 0x19, 0x40f000f0 },
2976 { 0x1e, 0x044413b0 },
2977 { 0x1f, 0x044413b0 },
2978 {}
2979 };
2980
2981 static const struct hda_pintbl dell_m4_3_pin_configs[] = {
2982 { 0x0a, 0x0421101f },
2983 { 0x0b, 0x04a11221 },
2984 { 0x0c, 0x90a70330 },
2985 { 0x0d, 0x90170110 },
2986 { 0x0e, 0x40f000f0 },
2987 { 0x0f, 0x40f000f0 },
2988 { 0x14, 0x40f000f0 },
2989 { 0x18, 0x90a000f0 },
2990 { 0x19, 0x40f000f0 },
2991 { 0x1e, 0x044413b0 },
2992 { 0x1f, 0x044413b0 },
2993 {}
2994 };
2995
2996 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
2997 const struct hda_fixup *fix, int action)
2998 {
2999 struct sigmatel_spec *spec = codec->spec;
3000
3001 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3002 return;
3003
3004 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
3005 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
3006 }
3007
3008 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
3009 const struct hda_fixup *fix, int action)
3010 {
3011 struct sigmatel_spec *spec = codec->spec;
3012 struct hda_jack_tbl *jack;
3013
3014 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3015 return;
3016
3017 /* Enable VREF power saving on GPIO1 detect */
3018 snd_hda_codec_write_cache(codec, codec->afg, 0,
3019 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
3020 snd_hda_jack_detect_enable_callback(codec, codec->afg,
3021 STAC_VREF_EVENT,
3022 stac_vref_event);
3023 jack = snd_hda_jack_tbl_get(codec, codec->afg);
3024 if (jack)
3025 jack->private_data = 0x02;
3026
3027 spec->gpio_mask |= 0x02;
3028
3029 /* enable internal microphone */
3030 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
3031 }
3032
3033 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
3034 const struct hda_fixup *fix, int action)
3035 {
3036 struct sigmatel_spec *spec = codec->spec;
3037
3038 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3039 return;
3040 spec->gpio_led = 0x01;
3041 }
3042
3043 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
3044 const struct hda_fixup *fix, int action)
3045 {
3046 unsigned int cap;
3047
3048 switch (action) {
3049 case HDA_FIXUP_ACT_PRE_PROBE:
3050 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
3051 break;
3052
3053 case HDA_FIXUP_ACT_PROBE:
3054 /* enable bass on HP dv7 */
3055 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
3056 cap &= AC_GPIO_IO_COUNT;
3057 if (cap >= 6)
3058 stac_add_hp_bass_switch(codec);
3059 break;
3060 }
3061 }
3062
3063 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
3064 const struct hda_fixup *fix, int action)
3065 {
3066 struct sigmatel_spec *spec = codec->spec;
3067
3068 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3069 return;
3070 spec->gpio_led = 0x08;
3071 }
3072
3073
3074 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
3075 const struct hda_fixup *fix, int action)
3076 {
3077 struct sigmatel_spec *spec = codec->spec;
3078
3079 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3080 return;
3081
3082 if (hp_blike_system(codec->subsystem_id)) {
3083 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
3084 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
3085 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
3086 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
3087 /* It was changed in the BIOS to just satisfy MS DTM.
3088 * Lets turn it back into slaved HP
3089 */
3090 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
3091 | (AC_JACK_HP_OUT <<
3092 AC_DEFCFG_DEVICE_SHIFT);
3093 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
3094 | AC_DEFCFG_SEQUENCE)))
3095 | 0x1f;
3096 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
3097 }
3098 }
3099
3100 if (find_mute_led_cfg(codec, 1))
3101 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
3102 spec->gpio_led,
3103 spec->gpio_led_polarity);
3104
3105 }
3106
3107 static const struct hda_fixup stac92hd71bxx_fixups[] = {
3108 [STAC_92HD71BXX_REF] = {
3109 .type = HDA_FIXUP_FUNC,
3110 .v.func = stac92hd71bxx_fixup_ref,
3111 },
3112 [STAC_DELL_M4_1] = {
3113 .type = HDA_FIXUP_PINS,
3114 .v.pins = dell_m4_1_pin_configs,
3115 },
3116 [STAC_DELL_M4_2] = {
3117 .type = HDA_FIXUP_PINS,
3118 .v.pins = dell_m4_2_pin_configs,
3119 },
3120 [STAC_DELL_M4_3] = {
3121 .type = HDA_FIXUP_PINS,
3122 .v.pins = dell_m4_3_pin_configs,
3123 },
3124 [STAC_HP_M4] = {
3125 .type = HDA_FIXUP_FUNC,
3126 .v.func = stac92hd71bxx_fixup_hp_m4,
3127 .chained = true,
3128 .chain_id = STAC_92HD71BXX_HP,
3129 },
3130 [STAC_HP_DV4] = {
3131 .type = HDA_FIXUP_FUNC,
3132 .v.func = stac92hd71bxx_fixup_hp_dv4,
3133 .chained = true,
3134 .chain_id = STAC_HP_DV5,
3135 },
3136 [STAC_HP_DV5] = {
3137 .type = HDA_FIXUP_FUNC,
3138 .v.func = stac92hd71bxx_fixup_hp_dv5,
3139 .chained = true,
3140 .chain_id = STAC_92HD71BXX_HP,
3141 },
3142 [STAC_HP_HDX] = {
3143 .type = HDA_FIXUP_FUNC,
3144 .v.func = stac92hd71bxx_fixup_hp_hdx,
3145 .chained = true,
3146 .chain_id = STAC_92HD71BXX_HP,
3147 },
3148 [STAC_92HD71BXX_HP] = {
3149 .type = HDA_FIXUP_FUNC,
3150 .v.func = stac92hd71bxx_fixup_hp,
3151 },
3152 };
3153
3154 static const struct hda_model_fixup stac92hd71bxx_models[] = {
3155 { .id = STAC_92HD71BXX_REF, .name = "ref" },
3156 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
3157 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
3158 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
3159 { .id = STAC_HP_M4, .name = "hp-m4" },
3160 { .id = STAC_HP_DV4, .name = "hp-dv4" },
3161 { .id = STAC_HP_DV5, .name = "hp-dv5" },
3162 { .id = STAC_HP_HDX, .name = "hp-hdx" },
3163 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
3164 {}
3165 };
3166
3167 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
3168 /* SigmaTel reference board */
3169 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3170 "DFI LanParty", STAC_92HD71BXX_REF),
3171 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3172 "DFI LanParty", STAC_92HD71BXX_REF),
3173 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
3174 "HP", STAC_HP_DV5),
3175 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
3176 "HP", STAC_HP_DV5),
3177 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
3178 "HP dv4-7", STAC_HP_DV4),
3179 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
3180 "HP dv4-7", STAC_HP_DV5),
3181 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
3182 "HP HDX", STAC_HP_HDX), /* HDX18 */
3183 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
3184 "HP mini 1000", STAC_HP_M4),
3185 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
3186 "HP HDX", STAC_HP_HDX), /* HDX16 */
3187 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
3188 "HP dv6", STAC_HP_DV5),
3189 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
3190 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
3191 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
3192 "HP DV6", STAC_HP_DV5),
3193 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
3194 "HP", STAC_HP_DV5),
3195 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
3196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
3197 "unknown Dell", STAC_DELL_M4_1),
3198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
3199 "unknown Dell", STAC_DELL_M4_1),
3200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
3201 "unknown Dell", STAC_DELL_M4_1),
3202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
3203 "unknown Dell", STAC_DELL_M4_1),
3204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
3205 "unknown Dell", STAC_DELL_M4_1),
3206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
3207 "unknown Dell", STAC_DELL_M4_1),
3208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
3209 "unknown Dell", STAC_DELL_M4_1),
3210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
3211 "unknown Dell", STAC_DELL_M4_2),
3212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
3213 "unknown Dell", STAC_DELL_M4_2),
3214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
3215 "unknown Dell", STAC_DELL_M4_2),
3216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
3217 "unknown Dell", STAC_DELL_M4_2),
3218 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
3219 "unknown Dell", STAC_DELL_M4_3),
3220 {} /* terminator */
3221 };
3222
3223 static const struct hda_pintbl ref922x_pin_configs[] = {
3224 { 0x0a, 0x01014010 },
3225 { 0x0b, 0x01016011 },
3226 { 0x0c, 0x01012012 },
3227 { 0x0d, 0x0221401f },
3228 { 0x0e, 0x01813122 },
3229 { 0x0f, 0x01011014 },
3230 { 0x10, 0x01441030 },
3231 { 0x11, 0x01c41030 },
3232 { 0x15, 0x40000100 },
3233 { 0x1b, 0x40000100 },
3234 {}
3235 };
3236
3237 /*
3238 STAC 922X pin configs for
3239 102801A7
3240 102801AB
3241 102801A9
3242 102801D1
3243 102801D2
3244 */
3245 static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
3246 { 0x0a, 0x02214030 },
3247 { 0x0b, 0x01a19021 },
3248 { 0x0c, 0x01111012 },
3249 { 0x0d, 0x01114010 },
3250 { 0x0e, 0x02a19020 },
3251 { 0x0f, 0x01117011 },
3252 { 0x10, 0x400001f0 },
3253 { 0x11, 0x400001f1 },
3254 { 0x15, 0x01813122 },
3255 { 0x1b, 0x400001f2 },
3256 {}
3257 };
3258
3259 /*
3260 STAC 922X pin configs for
3261 102801AC
3262 102801D0
3263 */
3264 static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
3265 { 0x0a, 0x02214030 },
3266 { 0x0b, 0x01a19021 },
3267 { 0x0c, 0x01111012 },
3268 { 0x0d, 0x01114010 },
3269 { 0x0e, 0x02a19020 },
3270 { 0x0f, 0x01117011 },
3271 { 0x10, 0x01451140 },
3272 { 0x11, 0x400001f0 },
3273 { 0x15, 0x01813122 },
3274 { 0x1b, 0x400001f1 },
3275 {}
3276 };
3277
3278 /*
3279 STAC 922X pin configs for
3280 102801BF
3281 */
3282 static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
3283 { 0x0a, 0x0321101f },
3284 { 0x0b, 0x01112024 },
3285 { 0x0c, 0x01111222 },
3286 { 0x0d, 0x91174220 },
3287 { 0x0e, 0x03a11050 },
3288 { 0x0f, 0x01116221 },
3289 { 0x10, 0x90a70330 },
3290 { 0x11, 0x01452340 },
3291 { 0x15, 0x40C003f1 },
3292 { 0x1b, 0x405003f0 },
3293 {}
3294 };
3295
3296 /*
3297 STAC 9221 A1 pin configs for
3298 102801D7 (Dell XPS M1210)
3299 */
3300 static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
3301 { 0x0a, 0x02211211 },
3302 { 0x0b, 0x408103ff },
3303 { 0x0c, 0x02a1123e },
3304 { 0x0d, 0x90100310 },
3305 { 0x0e, 0x408003f1 },
3306 { 0x0f, 0x0221121f },
3307 { 0x10, 0x03451340 },
3308 { 0x11, 0x40c003f2 },
3309 { 0x15, 0x508003f3 },
3310 { 0x1b, 0x405003f4 },
3311 {}
3312 };
3313
3314 static const struct hda_pintbl d945gtp3_pin_configs[] = {
3315 { 0x0a, 0x0221401f },
3316 { 0x0b, 0x01a19022 },
3317 { 0x0c, 0x01813021 },
3318 { 0x0d, 0x01014010 },
3319 { 0x0e, 0x40000100 },
3320 { 0x0f, 0x40000100 },
3321 { 0x10, 0x40000100 },
3322 { 0x11, 0x40000100 },
3323 { 0x15, 0x02a19120 },
3324 { 0x1b, 0x40000100 },
3325 {}
3326 };
3327
3328 static const struct hda_pintbl d945gtp5_pin_configs[] = {
3329 { 0x0a, 0x0221401f },
3330 { 0x0b, 0x01011012 },
3331 { 0x0c, 0x01813024 },
3332 { 0x0d, 0x01014010 },
3333 { 0x0e, 0x01a19021 },
3334 { 0x0f, 0x01016011 },
3335 { 0x10, 0x01452130 },
3336 { 0x11, 0x40000100 },
3337 { 0x15, 0x02a19320 },
3338 { 0x1b, 0x40000100 },
3339 {}
3340 };
3341
3342 static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
3343 { 0x0a, 0x0121e21f },
3344 { 0x0b, 0x400000ff },
3345 { 0x0c, 0x9017e110 },
3346 { 0x0d, 0x400000fd },
3347 { 0x0e, 0x400000fe },
3348 { 0x0f, 0x0181e020 },
3349 { 0x10, 0x1145e030 },
3350 { 0x11, 0x11c5e240 },
3351 { 0x15, 0x400000fc },
3352 { 0x1b, 0x400000fb },
3353 {}
3354 };
3355
3356 static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
3357 { 0x0a, 0x0121e21f },
3358 { 0x0b, 0x90a7012e },
3359 { 0x0c, 0x9017e110 },
3360 { 0x0d, 0x400000fd },
3361 { 0x0e, 0x400000fe },
3362 { 0x0f, 0x0181e020 },
3363 { 0x10, 0x1145e230 },
3364 { 0x11, 0x500000fa },
3365 { 0x15, 0x400000fc },
3366 { 0x1b, 0x400000fb },
3367 {}
3368 };
3369
3370 static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
3371 { 0x0a, 0x0121e21f },
3372 { 0x0b, 0x90a7012e },
3373 { 0x0c, 0x9017e110 },
3374 { 0x0d, 0x400000fd },
3375 { 0x0e, 0x400000fe },
3376 { 0x0f, 0x0181e020 },
3377 { 0x10, 0x1145e230 },
3378 { 0x11, 0x11c5e240 },
3379 { 0x15, 0x400000fc },
3380 { 0x1b, 0x400000fb },
3381 {}
3382 };
3383
3384 static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
3385 { 0x0a, 0x0321e21f },
3386 { 0x0b, 0x03a1e02e },
3387 { 0x0c, 0x9017e110 },
3388 { 0x0d, 0x9017e11f },
3389 { 0x0e, 0x400000fe },
3390 { 0x0f, 0x0381e020 },
3391 { 0x10, 0x1345e230 },
3392 { 0x11, 0x13c5e240 },
3393 { 0x15, 0x400000fc },
3394 { 0x1b, 0x400000fb },
3395 {}
3396 };
3397
3398 static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
3399 { 0x0a, 0x0321e21f },
3400 { 0x0b, 0x03a1e02e },
3401 { 0x0c, 0x9017e110 },
3402 { 0x0d, 0x9017e11f },
3403 { 0x0e, 0x400000fe },
3404 { 0x0f, 0x0381e020 },
3405 { 0x10, 0x1345e230 },
3406 { 0x11, 0x13c5e240 },
3407 { 0x15, 0x400000fc },
3408 { 0x1b, 0x400000fb },
3409 {}
3410 };
3411
3412 static const struct hda_pintbl ecs202_pin_configs[] = {
3413 { 0x0a, 0x0221401f },
3414 { 0x0b, 0x02a19020 },
3415 { 0x0c, 0x01a19020 },
3416 { 0x0d, 0x01114010 },
3417 { 0x0e, 0x408000f0 },
3418 { 0x0f, 0x01813022 },
3419 { 0x10, 0x074510a0 },
3420 { 0x11, 0x40c400f1 },
3421 { 0x15, 0x9037012e },
3422 { 0x1b, 0x40e000f2 },
3423 {}
3424 };
3425
3426 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
3427 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
3428 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
3429 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
3430 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
3431 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
3432 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
3433 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
3434 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
3435 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
3436 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
3437 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
3438 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
3439 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
3440 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
3441 {}
3442 };
3443
3444 static const struct hda_fixup stac922x_fixups[];
3445
3446 /* remap the fixup from codec SSID and apply it */
3447 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
3448 const struct hda_fixup *fix,
3449 int action)
3450 {
3451 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3452 return;
3453 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
3454 stac922x_fixups);
3455 if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
3456 snd_hda_apply_fixup(codec, action);
3457 }
3458
3459 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
3460 const struct hda_fixup *fix,
3461 int action)
3462 {
3463 struct sigmatel_spec *spec = codec->spec;
3464
3465 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3466 spec->gpio_mask = spec->gpio_dir = 0x03;
3467 spec->gpio_data = 0x03;
3468 }
3469 }
3470
3471 static const struct hda_fixup stac922x_fixups[] = {
3472 [STAC_D945_REF] = {
3473 .type = HDA_FIXUP_PINS,
3474 .v.pins = ref922x_pin_configs,
3475 },
3476 [STAC_D945GTP3] = {
3477 .type = HDA_FIXUP_PINS,
3478 .v.pins = d945gtp3_pin_configs,
3479 },
3480 [STAC_D945GTP5] = {
3481 .type = HDA_FIXUP_PINS,
3482 .v.pins = d945gtp5_pin_configs,
3483 },
3484 [STAC_INTEL_MAC_AUTO] = {
3485 .type = HDA_FIXUP_FUNC,
3486 .v.func = stac922x_fixup_intel_mac_auto,
3487 },
3488 [STAC_INTEL_MAC_V1] = {
3489 .type = HDA_FIXUP_PINS,
3490 .v.pins = intel_mac_v1_pin_configs,
3491 .chained = true,
3492 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3493 },
3494 [STAC_INTEL_MAC_V2] = {
3495 .type = HDA_FIXUP_PINS,
3496 .v.pins = intel_mac_v2_pin_configs,
3497 .chained = true,
3498 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3499 },
3500 [STAC_INTEL_MAC_V3] = {
3501 .type = HDA_FIXUP_PINS,
3502 .v.pins = intel_mac_v3_pin_configs,
3503 .chained = true,
3504 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3505 },
3506 [STAC_INTEL_MAC_V4] = {
3507 .type = HDA_FIXUP_PINS,
3508 .v.pins = intel_mac_v4_pin_configs,
3509 .chained = true,
3510 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3511 },
3512 [STAC_INTEL_MAC_V5] = {
3513 .type = HDA_FIXUP_PINS,
3514 .v.pins = intel_mac_v5_pin_configs,
3515 .chained = true,
3516 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3517 },
3518 [STAC_922X_INTEL_MAC_GPIO] = {
3519 .type = HDA_FIXUP_FUNC,
3520 .v.func = stac922x_fixup_intel_mac_gpio,
3521 },
3522 [STAC_ECS_202] = {
3523 .type = HDA_FIXUP_PINS,
3524 .v.pins = ecs202_pin_configs,
3525 },
3526 [STAC_922X_DELL_D81] = {
3527 .type = HDA_FIXUP_PINS,
3528 .v.pins = dell_922x_d81_pin_configs,
3529 },
3530 [STAC_922X_DELL_D82] = {
3531 .type = HDA_FIXUP_PINS,
3532 .v.pins = dell_922x_d82_pin_configs,
3533 },
3534 [STAC_922X_DELL_M81] = {
3535 .type = HDA_FIXUP_PINS,
3536 .v.pins = dell_922x_m81_pin_configs,
3537 },
3538 [STAC_922X_DELL_M82] = {
3539 .type = HDA_FIXUP_PINS,
3540 .v.pins = dell_922x_m82_pin_configs,
3541 },
3542 };
3543
3544 static const struct hda_model_fixup stac922x_models[] = {
3545 { .id = STAC_D945_REF, .name = "ref" },
3546 { .id = STAC_D945GTP5, .name = "5stack" },
3547 { .id = STAC_D945GTP3, .name = "3stack" },
3548 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
3549 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
3550 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
3551 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
3552 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
3553 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
3554 { .id = STAC_ECS_202, .name = "ecs202" },
3555 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
3556 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
3557 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
3558 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
3559 /* for backward compatibility */
3560 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
3561 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
3562 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
3563 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
3564 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
3565 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
3566 {}
3567 };
3568
3569 static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
3570 /* SigmaTel reference board */
3571 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3572 "DFI LanParty", STAC_D945_REF),
3573 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3574 "DFI LanParty", STAC_D945_REF),
3575 /* Intel 945G based systems */
3576 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
3577 "Intel D945G", STAC_D945GTP3),
3578 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
3579 "Intel D945G", STAC_D945GTP3),
3580 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
3581 "Intel D945G", STAC_D945GTP3),
3582 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
3583 "Intel D945G", STAC_D945GTP3),
3584 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
3585 "Intel D945G", STAC_D945GTP3),
3586 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
3587 "Intel D945G", STAC_D945GTP3),
3588 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
3589 "Intel D945G", STAC_D945GTP3),
3590 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
3591 "Intel D945G", STAC_D945GTP3),
3592 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
3593 "Intel D945G", STAC_D945GTP3),
3594 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
3595 "Intel D945G", STAC_D945GTP3),
3596 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
3597 "Intel D945G", STAC_D945GTP3),
3598 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
3599 "Intel D945G", STAC_D945GTP3),
3600 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
3601 "Intel D945G", STAC_D945GTP3),
3602 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3603 "Intel D945G", STAC_D945GTP3),
3604 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3605 "Intel D945G", STAC_D945GTP3),
3606 /* Intel D945G 5-stack systems */
3607 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3608 "Intel D945G", STAC_D945GTP5),
3609 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3610 "Intel D945G", STAC_D945GTP5),
3611 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3612 "Intel D945G", STAC_D945GTP5),
3613 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3614 "Intel D945G", STAC_D945GTP5),
3615 /* Intel 945P based systems */
3616 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3617 "Intel D945P", STAC_D945GTP3),
3618 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3619 "Intel D945P", STAC_D945GTP3),
3620 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3621 "Intel D945P", STAC_D945GTP3),
3622 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3623 "Intel D945P", STAC_D945GTP3),
3624 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3625 "Intel D945P", STAC_D945GTP3),
3626 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3627 "Intel D945P", STAC_D945GTP5),
3628 /* other intel */
3629 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3630 "Intel D945", STAC_D945_REF),
3631 /* other systems */
3632
3633 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
3634 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3635
3636 /* Dell systems */
3637 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3638 "unknown Dell", STAC_922X_DELL_D81),
3639 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3640 "unknown Dell", STAC_922X_DELL_D81),
3641 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3642 "unknown Dell", STAC_922X_DELL_D81),
3643 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3644 "unknown Dell", STAC_922X_DELL_D82),
3645 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3646 "unknown Dell", STAC_922X_DELL_M81),
3647 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3648 "unknown Dell", STAC_922X_DELL_D82),
3649 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3650 "unknown Dell", STAC_922X_DELL_D81),
3651 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3652 "unknown Dell", STAC_922X_DELL_D81),
3653 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3654 "Dell XPS M1210", STAC_922X_DELL_M82),
3655 /* ECS/PC Chips boards */
3656 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
3657 "ECS/PC chips", STAC_ECS_202),
3658 {} /* terminator */
3659 };
3660
3661 static const struct hda_pintbl ref927x_pin_configs[] = {
3662 { 0x0a, 0x02214020 },
3663 { 0x0b, 0x02a19080 },
3664 { 0x0c, 0x0181304e },
3665 { 0x0d, 0x01014010 },
3666 { 0x0e, 0x01a19040 },
3667 { 0x0f, 0x01011012 },
3668 { 0x10, 0x01016011 },
3669 { 0x11, 0x0101201f },
3670 { 0x12, 0x183301f0 },
3671 { 0x13, 0x18a001f0 },
3672 { 0x14, 0x18a001f0 },
3673 { 0x21, 0x01442070 },
3674 { 0x22, 0x01c42190 },
3675 { 0x23, 0x40000100 },
3676 {}
3677 };
3678
3679 static const struct hda_pintbl d965_3st_pin_configs[] = {
3680 { 0x0a, 0x0221401f },
3681 { 0x0b, 0x02a19120 },
3682 { 0x0c, 0x40000100 },
3683 { 0x0d, 0x01014011 },
3684 { 0x0e, 0x01a19021 },
3685 { 0x0f, 0x01813024 },
3686 { 0x10, 0x40000100 },
3687 { 0x11, 0x40000100 },
3688 { 0x12, 0x40000100 },
3689 { 0x13, 0x40000100 },
3690 { 0x14, 0x40000100 },
3691 { 0x21, 0x40000100 },
3692 { 0x22, 0x40000100 },
3693 { 0x23, 0x40000100 },
3694 {}
3695 };
3696
3697 static const struct hda_pintbl d965_5st_pin_configs[] = {
3698 { 0x0a, 0x02214020 },
3699 { 0x0b, 0x02a19080 },
3700 { 0x0c, 0x0181304e },
3701 { 0x0d, 0x01014010 },
3702 { 0x0e, 0x01a19040 },
3703 { 0x0f, 0x01011012 },
3704 { 0x10, 0x01016011 },
3705 { 0x11, 0x40000100 },
3706 { 0x12, 0x40000100 },
3707 { 0x13, 0x40000100 },
3708 { 0x14, 0x40000100 },
3709 { 0x21, 0x01442070 },
3710 { 0x22, 0x40000100 },
3711 { 0x23, 0x40000100 },
3712 {}
3713 };
3714
3715 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3716 { 0x0a, 0x40000100 },
3717 { 0x0b, 0x40000100 },
3718 { 0x0c, 0x0181304e },
3719 { 0x0d, 0x01014010 },
3720 { 0x0e, 0x01a19040 },
3721 { 0x0f, 0x01011012 },
3722 { 0x10, 0x01016011 },
3723 { 0x11, 0x40000100 },
3724 { 0x12, 0x40000100 },
3725 { 0x13, 0x40000100 },
3726 { 0x14, 0x40000100 },
3727 { 0x21, 0x01442070 },
3728 { 0x22, 0x40000100 },
3729 { 0x23, 0x40000100 },
3730 {}
3731 };
3732
3733 static const struct hda_pintbl dell_3st_pin_configs[] = {
3734 { 0x0a, 0x02211230 },
3735 { 0x0b, 0x02a11220 },
3736 { 0x0c, 0x01a19040 },
3737 { 0x0d, 0x01114210 },
3738 { 0x0e, 0x01111212 },
3739 { 0x0f, 0x01116211 },
3740 { 0x10, 0x01813050 },
3741 { 0x11, 0x01112214 },
3742 { 0x12, 0x403003fa },
3743 { 0x13, 0x90a60040 },
3744 { 0x14, 0x90a60040 },
3745 { 0x21, 0x404003fb },
3746 { 0x22, 0x40c003fc },
3747 { 0x23, 0x40000100 },
3748 {}
3749 };
3750
3751 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3752 const struct hda_fixup *fix, int action)
3753 {
3754 /* no jack detecion for ref-no-jd model */
3755 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3756 codec->no_jack_detect = 1;
3757 }
3758
3759 static void stac927x_fixup_ref(struct hda_codec *codec,
3760 const struct hda_fixup *fix, int action)
3761 {
3762 struct sigmatel_spec *spec = codec->spec;
3763
3764 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3765 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3766 spec->eapd_mask = spec->gpio_mask = 0;
3767 spec->gpio_dir = spec->gpio_data = 0;
3768 }
3769 }
3770
3771 static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3772 const struct hda_fixup *fix, int action)
3773 {
3774 struct sigmatel_spec *spec = codec->spec;
3775
3776 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3777 return;
3778
3779 if (codec->subsystem_id != 0x1028022f) {
3780 /* GPIO2 High = Enable EAPD */
3781 spec->eapd_mask = spec->gpio_mask = 0x04;
3782 spec->gpio_dir = spec->gpio_data = 0x04;
3783 }
3784
3785 snd_hda_add_verbs(codec, dell_3st_core_init);
3786 spec->volknob_init = 1;
3787 }
3788
3789 static void stac927x_fixup_volknob(struct hda_codec *codec,
3790 const struct hda_fixup *fix, int action)
3791 {
3792 struct sigmatel_spec *spec = codec->spec;
3793
3794 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3795 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3796 spec->volknob_init = 1;
3797 }
3798 }
3799
3800 static const struct hda_fixup stac927x_fixups[] = {
3801 [STAC_D965_REF_NO_JD] = {
3802 .type = HDA_FIXUP_FUNC,
3803 .v.func = stac927x_fixup_ref_no_jd,
3804 .chained = true,
3805 .chain_id = STAC_D965_REF,
3806 },
3807 [STAC_D965_REF] = {
3808 .type = HDA_FIXUP_FUNC,
3809 .v.func = stac927x_fixup_ref,
3810 },
3811 [STAC_D965_3ST] = {
3812 .type = HDA_FIXUP_PINS,
3813 .v.pins = d965_3st_pin_configs,
3814 .chained = true,
3815 .chain_id = STAC_D965_VERBS,
3816 },
3817 [STAC_D965_5ST] = {
3818 .type = HDA_FIXUP_PINS,
3819 .v.pins = d965_5st_pin_configs,
3820 .chained = true,
3821 .chain_id = STAC_D965_VERBS,
3822 },
3823 [STAC_D965_VERBS] = {
3824 .type = HDA_FIXUP_VERBS,
3825 .v.verbs = d965_core_init,
3826 },
3827 [STAC_D965_5ST_NO_FP] = {
3828 .type = HDA_FIXUP_PINS,
3829 .v.pins = d965_5st_no_fp_pin_configs,
3830 },
3831 [STAC_DELL_3ST] = {
3832 .type = HDA_FIXUP_PINS,
3833 .v.pins = dell_3st_pin_configs,
3834 .chained = true,
3835 .chain_id = STAC_927X_DELL_DMIC,
3836 },
3837 [STAC_DELL_BIOS] = {
3838 .type = HDA_FIXUP_PINS,
3839 .v.pins = (const struct hda_pintbl[]) {
3840 /* correct the front output jack as a hp out */
3841 { 0x0f, 0x0221101f },
3842 /* correct the front input jack as a mic */
3843 { 0x0e, 0x02a79130 },
3844 {}
3845 },
3846 .chained = true,
3847 .chain_id = STAC_927X_DELL_DMIC,
3848 },
3849 [STAC_DELL_BIOS_AMIC] = {
3850 .type = HDA_FIXUP_PINS,
3851 .v.pins = (const struct hda_pintbl[]) {
3852 /* configure the analog microphone on some laptops */
3853 { 0x0c, 0x90a79130 },
3854 {}
3855 },
3856 .chained = true,
3857 .chain_id = STAC_DELL_BIOS,
3858 },
3859 [STAC_DELL_BIOS_SPDIF] = {
3860 .type = HDA_FIXUP_PINS,
3861 .v.pins = (const struct hda_pintbl[]) {
3862 /* correct the device field to SPDIF out */
3863 { 0x21, 0x01442070 },
3864 {}
3865 },
3866 .chained = true,
3867 .chain_id = STAC_DELL_BIOS,
3868 },
3869 [STAC_927X_DELL_DMIC] = {
3870 .type = HDA_FIXUP_FUNC,
3871 .v.func = stac927x_fixup_dell_dmic,
3872 },
3873 [STAC_927X_VOLKNOB] = {
3874 .type = HDA_FIXUP_FUNC,
3875 .v.func = stac927x_fixup_volknob,
3876 },
3877 };
3878
3879 static const struct hda_model_fixup stac927x_models[] = {
3880 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3881 { .id = STAC_D965_REF, .name = "ref" },
3882 { .id = STAC_D965_3ST, .name = "3stack" },
3883 { .id = STAC_D965_5ST, .name = "5stack" },
3884 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3885 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3886 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
3887 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
3888 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3889 {}
3890 };
3891
3892 static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
3893 /* SigmaTel reference board */
3894 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3895 "DFI LanParty", STAC_D965_REF),
3896 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3897 "DFI LanParty", STAC_D965_REF),
3898 /* Intel 946 based systems */
3899 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3900 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
3901 /* 965 based 3 stack systems */
3902 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3903 "Intel D965", STAC_D965_3ST),
3904 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3905 "Intel D965", STAC_D965_3ST),
3906 /* Dell 3 stack systems */
3907 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
3908 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3909 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
3910 /* Dell 3 stack systems with verb table in BIOS */
3911 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
3912 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
3913 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
3914 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
3915 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
3916 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3917 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3918 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
3919 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
3920 /* 965 based 5 stack systems */
3921 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3922 "Intel D965", STAC_D965_5ST),
3923 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3924 "Intel D965", STAC_D965_5ST),
3925 /* volume-knob fixes */
3926 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3927 {} /* terminator */
3928 };
3929
3930 static const struct hda_pintbl ref9205_pin_configs[] = {
3931 { 0x0a, 0x40000100 },
3932 { 0x0b, 0x40000100 },
3933 { 0x0c, 0x01016011 },
3934 { 0x0d, 0x01014010 },
3935 { 0x0e, 0x01813122 },
3936 { 0x0f, 0x01a19021 },
3937 { 0x14, 0x01019020 },
3938 { 0x16, 0x40000100 },
3939 { 0x17, 0x90a000f0 },
3940 { 0x18, 0x90a000f0 },
3941 { 0x21, 0x01441030 },
3942 { 0x22, 0x01c41030 },
3943 {}
3944 };
3945
3946 /*
3947 STAC 9205 pin configs for
3948 102801F1
3949 102801F2
3950 102801FC
3951 102801FD
3952 10280204
3953 1028021F
3954 10280228 (Dell Vostro 1500)
3955 10280229 (Dell Vostro 1700)
3956 */
3957 static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
3958 { 0x0a, 0x0321101F },
3959 { 0x0b, 0x03A11020 },
3960 { 0x0c, 0x400003FA },
3961 { 0x0d, 0x90170310 },
3962 { 0x0e, 0x400003FB },
3963 { 0x0f, 0x400003FC },
3964 { 0x14, 0x400003FD },
3965 { 0x16, 0x40F000F9 },
3966 { 0x17, 0x90A60330 },
3967 { 0x18, 0x400003FF },
3968 { 0x21, 0x0144131F },
3969 { 0x22, 0x40C003FE },
3970 {}
3971 };
3972
3973 /*
3974 STAC 9205 pin configs for
3975 102801F9
3976 102801FA
3977 102801FE
3978 102801FF (Dell Precision M4300)
3979 10280206
3980 10280200
3981 10280201
3982 */
3983 static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
3984 { 0x0a, 0x0321101f },
3985 { 0x0b, 0x03a11020 },
3986 { 0x0c, 0x90a70330 },
3987 { 0x0d, 0x90170310 },
3988 { 0x0e, 0x400000fe },
3989 { 0x0f, 0x400000ff },
3990 { 0x14, 0x400000fd },
3991 { 0x16, 0x40f000f9 },
3992 { 0x17, 0x400000fa },
3993 { 0x18, 0x400000fc },
3994 { 0x21, 0x0144131f },
3995 { 0x22, 0x40c003f8 },
3996 /* Enable SPDIF in/out */
3997 { 0x1f, 0x01441030 },
3998 { 0x20, 0x1c410030 },
3999 {}
4000 };
4001
4002 static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
4003 { 0x0a, 0x0421101f },
4004 { 0x0b, 0x04a11020 },
4005 { 0x0c, 0x400003fa },
4006 { 0x0d, 0x90170310 },
4007 { 0x0e, 0x400003fb },
4008 { 0x0f, 0x400003fc },
4009 { 0x14, 0x400003fd },
4010 { 0x16, 0x400003f9 },
4011 { 0x17, 0x90a60330 },
4012 { 0x18, 0x400003ff },
4013 { 0x21, 0x01441340 },
4014 { 0x22, 0x40c003fe },
4015 {}
4016 };
4017
4018 static void stac9205_fixup_ref(struct hda_codec *codec,
4019 const struct hda_fixup *fix, int action)
4020 {
4021 struct sigmatel_spec *spec = codec->spec;
4022
4023 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4024 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
4025 /* SPDIF-In enabled */
4026 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
4027 }
4028 }
4029
4030 static void stac9205_fixup_dell_m43(struct hda_codec *codec,
4031 const struct hda_fixup *fix, int action)
4032 {
4033 struct sigmatel_spec *spec = codec->spec;
4034 struct hda_jack_tbl *jack;
4035
4036 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4037 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
4038
4039 /* Enable unsol response for GPIO4/Dock HP connection */
4040 snd_hda_codec_write_cache(codec, codec->afg, 0,
4041 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4042 snd_hda_jack_detect_enable_callback(codec, codec->afg,
4043 STAC_VREF_EVENT,
4044 stac_vref_event);
4045 jack = snd_hda_jack_tbl_get(codec, codec->afg);
4046 if (jack)
4047 jack->private_data = 0x01;
4048
4049 spec->gpio_dir = 0x0b;
4050 spec->eapd_mask = 0x01;
4051 spec->gpio_mask = 0x1b;
4052 spec->gpio_mute = 0x10;
4053 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4054 * GPIO3 Low = DRM
4055 */
4056 spec->gpio_data = 0x01;
4057 }
4058 }
4059
4060 static void stac9205_fixup_eapd(struct hda_codec *codec,
4061 const struct hda_fixup *fix, int action)
4062 {
4063 struct sigmatel_spec *spec = codec->spec;
4064
4065 if (action == HDA_FIXUP_ACT_PRE_PROBE)
4066 spec->eapd_switch = 0;
4067 }
4068
4069 static const struct hda_fixup stac9205_fixups[] = {
4070 [STAC_9205_REF] = {
4071 .type = HDA_FIXUP_FUNC,
4072 .v.func = stac9205_fixup_ref,
4073 },
4074 [STAC_9205_DELL_M42] = {
4075 .type = HDA_FIXUP_PINS,
4076 .v.pins = dell_9205_m42_pin_configs,
4077 },
4078 [STAC_9205_DELL_M43] = {
4079 .type = HDA_FIXUP_FUNC,
4080 .v.func = stac9205_fixup_dell_m43,
4081 },
4082 [STAC_9205_DELL_M44] = {
4083 .type = HDA_FIXUP_PINS,
4084 .v.pins = dell_9205_m44_pin_configs,
4085 },
4086 [STAC_9205_EAPD] = {
4087 .type = HDA_FIXUP_FUNC,
4088 .v.func = stac9205_fixup_eapd,
4089 },
4090 {}
4091 };
4092
4093 static const struct hda_model_fixup stac9205_models[] = {
4094 { .id = STAC_9205_REF, .name = "ref" },
4095 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
4096 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
4097 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
4098 { .id = STAC_9205_EAPD, .name = "eapd" },
4099 {}
4100 };
4101
4102 static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
4103 /* SigmaTel reference board */
4104 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
4105 "DFI LanParty", STAC_9205_REF),
4106 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
4107 "SigmaTel", STAC_9205_REF),
4108 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
4109 "DFI LanParty", STAC_9205_REF),
4110 /* Dell */
4111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
4112 "unknown Dell", STAC_9205_DELL_M42),
4113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
4114 "unknown Dell", STAC_9205_DELL_M42),
4115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
4116 "Dell Precision", STAC_9205_DELL_M43),
4117 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
4118 "Dell Precision", STAC_9205_DELL_M43),
4119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
4120 "Dell Precision", STAC_9205_DELL_M43),
4121 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
4122 "unknown Dell", STAC_9205_DELL_M42),
4123 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
4124 "unknown Dell", STAC_9205_DELL_M42),
4125 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
4126 "Dell Precision", STAC_9205_DELL_M43),
4127 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
4128 "Dell Precision M4300", STAC_9205_DELL_M43),
4129 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
4130 "unknown Dell", STAC_9205_DELL_M42),
4131 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
4132 "Dell Precision", STAC_9205_DELL_M43),
4133 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
4134 "Dell Precision", STAC_9205_DELL_M43),
4135 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
4136 "Dell Precision", STAC_9205_DELL_M43),
4137 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
4138 "Dell Inspiron", STAC_9205_DELL_M44),
4139 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
4140 "Dell Vostro 1500", STAC_9205_DELL_M42),
4141 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
4142 "Dell Vostro 1700", STAC_9205_DELL_M42),
4143 /* Gateway */
4144 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
4145 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
4146 {} /* terminator */
4147 };
4148
4149 static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
4150 const struct hda_fixup *fix, int action)
4151 {
4152 struct sigmatel_spec *spec = codec->spec;
4153
4154 if (action != HDA_FIXUP_ACT_PRE_PROBE)
4155 return;
4156
4157 if (find_mute_led_cfg(codec, spec->default_polarity))
4158 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
4159 spec->gpio_led,
4160 spec->gpio_led_polarity);
4161 }
4162
4163 static const struct hda_fixup stac92hd95_fixups[] = {
4164 [STAC_92HD95_HP_LED] = {
4165 .type = HDA_FIXUP_FUNC,
4166 .v.func = stac92hd95_fixup_hp_led,
4167 },
4168 [STAC_92HD95_HP_BASS] = {
4169 .type = HDA_FIXUP_VERBS,
4170 .v.verbs = (const struct hda_verb[]) {
4171 {0x1a, 0x795, 0x00}, /* HPF to 100Hz */
4172 {}
4173 },
4174 .chained = true,
4175 .chain_id = STAC_92HD95_HP_LED,
4176 },
4177 };
4178
4179 static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = {
4180 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
4181 {} /* terminator */
4182 };
4183
4184 static const struct hda_model_fixup stac92hd95_models[] = {
4185 { .id = STAC_92HD95_HP_LED, .name = "hp-led" },
4186 { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
4187 {}
4188 };
4189
4190
4191 static int stac_parse_auto_config(struct hda_codec *codec)
4192 {
4193 struct sigmatel_spec *spec = codec->spec;
4194 int err;
4195 int flags = 0;
4196
4197 if (spec->headset_jack)
4198 flags |= HDA_PINCFG_HEADSET_MIC;
4199
4200 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
4201 if (err < 0)
4202 return err;
4203
4204 /* add hooks */
4205 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
4206 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
4207
4208 spec->gen.automute_hook = stac_update_outputs;
4209 spec->gen.hp_automute_hook = stac_hp_automute;
4210 spec->gen.line_automute_hook = stac_line_automute;
4211 spec->gen.mic_autoswitch_hook = stac_mic_autoswitch;
4212
4213 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
4214 if (err < 0)
4215 return err;
4216
4217 /* minimum value is actually mute */
4218 spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
4219
4220 /* setup analog beep controls */
4221 if (spec->anabeep_nid > 0) {
4222 err = stac_auto_create_beep_ctls(codec,
4223 spec->anabeep_nid);
4224 if (err < 0)
4225 return err;
4226 }
4227
4228 /* setup digital beep controls and input device */
4229 #ifdef CONFIG_SND_HDA_INPUT_BEEP
4230 if (spec->gen.beep_nid) {
4231 hda_nid_t nid = spec->gen.beep_nid;
4232 unsigned int caps;
4233
4234 err = stac_auto_create_beep_ctls(codec, nid);
4235 if (err < 0)
4236 return err;
4237 if (codec->beep) {
4238 /* IDT/STAC codecs have linear beep tone parameter */
4239 codec->beep->linear_tone = spec->linear_tone_beep;
4240 /* if no beep switch is available, make its own one */
4241 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4242 if (!(caps & AC_AMPCAP_MUTE)) {
4243 err = stac_beep_switch_ctl(codec);
4244 if (err < 0)
4245 return err;
4246 }
4247 }
4248 }
4249 #endif
4250
4251 if (spec->gpio_led)
4252 spec->gen.vmaster_mute.hook = stac_vmaster_hook;
4253
4254 if (spec->aloopback_ctl &&
4255 snd_hda_get_bool_hint(codec, "loopback") == 1) {
4256 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
4257 return -ENOMEM;
4258 }
4259
4260 if (spec->have_spdif_mux) {
4261 err = stac_create_spdif_mux_ctls(codec);
4262 if (err < 0)
4263 return err;
4264 }
4265
4266 stac_init_power_map(codec);
4267
4268 return 0;
4269 }
4270
4271
4272 static int stac_init(struct hda_codec *codec)
4273 {
4274 struct sigmatel_spec *spec = codec->spec;
4275 int i;
4276
4277 /* override some hints */
4278 stac_store_hints(codec);
4279
4280 /* set up GPIO */
4281 /* turn on EAPD statically when spec->eapd_switch isn't set.
4282 * otherwise, unsol event will turn it on/off dynamically
4283 */
4284 if (!spec->eapd_switch)
4285 spec->gpio_data |= spec->eapd_mask;
4286 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
4287
4288 snd_hda_gen_init(codec);
4289
4290 /* sync the power-map */
4291 if (spec->num_pwrs)
4292 snd_hda_codec_write(codec, codec->afg, 0,
4293 AC_VERB_IDT_SET_POWER_MAP,
4294 spec->power_map_bits);
4295
4296 /* power down inactive ADCs */
4297 if (spec->powerdown_adcs) {
4298 for (i = 0; i < spec->gen.num_all_adcs; i++) {
4299 if (spec->active_adcs & (1 << i))
4300 continue;
4301 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
4302 AC_VERB_SET_POWER_STATE,
4303 AC_PWRST_D3);
4304 }
4305 }
4306
4307 return 0;
4308 }
4309
4310 static void stac_shutup(struct hda_codec *codec)
4311 {
4312 struct sigmatel_spec *spec = codec->spec;
4313
4314 snd_hda_shutup_pins(codec);
4315
4316 if (spec->eapd_mask)
4317 stac_gpio_set(codec, spec->gpio_mask,
4318 spec->gpio_dir, spec->gpio_data &
4319 ~spec->eapd_mask);
4320 }
4321
4322 #define stac_free snd_hda_gen_free
4323
4324 #ifdef CONFIG_PROC_FS
4325 static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4326 struct hda_codec *codec, hda_nid_t nid)
4327 {
4328 if (nid == codec->afg)
4329 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4330 snd_hda_codec_read(codec, nid, 0,
4331 AC_VERB_IDT_GET_POWER_MAP, 0));
4332 }
4333
4334 static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4335 struct hda_codec *codec,
4336 unsigned int verb)
4337 {
4338 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4339 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4340 }
4341
4342 /* stac92hd71bxx, stac92hd73xx */
4343 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4344 struct hda_codec *codec, hda_nid_t nid)
4345 {
4346 stac92hd_proc_hook(buffer, codec, nid);
4347 if (nid == codec->afg)
4348 analog_loop_proc_hook(buffer, codec, 0xfa0);
4349 }
4350
4351 static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4352 struct hda_codec *codec, hda_nid_t nid)
4353 {
4354 if (nid == codec->afg)
4355 analog_loop_proc_hook(buffer, codec, 0xfe0);
4356 }
4357
4358 static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4359 struct hda_codec *codec, hda_nid_t nid)
4360 {
4361 if (nid == codec->afg)
4362 analog_loop_proc_hook(buffer, codec, 0xfeb);
4363 }
4364 #else
4365 #define stac92hd_proc_hook NULL
4366 #define stac92hd7x_proc_hook NULL
4367 #define stac9205_proc_hook NULL
4368 #define stac927x_proc_hook NULL
4369 #endif
4370
4371 #ifdef CONFIG_PM
4372 static int stac_suspend(struct hda_codec *codec)
4373 {
4374 stac_shutup(codec);
4375 return 0;
4376 }
4377 #else
4378 #define stac_suspend NULL
4379 #endif /* CONFIG_PM */
4380
4381 static const struct hda_codec_ops stac_patch_ops = {
4382 .build_controls = snd_hda_gen_build_controls,
4383 .build_pcms = snd_hda_gen_build_pcms,
4384 .init = stac_init,
4385 .free = stac_free,
4386 .unsol_event = snd_hda_jack_unsol_event,
4387 #ifdef CONFIG_PM
4388 .suspend = stac_suspend,
4389 #endif
4390 .reboot_notify = stac_shutup,
4391 };
4392
4393 static int alloc_stac_spec(struct hda_codec *codec)
4394 {
4395 struct sigmatel_spec *spec;
4396
4397 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4398 if (!spec)
4399 return -ENOMEM;
4400 snd_hda_gen_spec_init(&spec->gen);
4401 codec->spec = spec;
4402 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
4403 return 0;
4404 }
4405
4406 static int patch_stac9200(struct hda_codec *codec)
4407 {
4408 struct sigmatel_spec *spec;
4409 int err;
4410
4411 err = alloc_stac_spec(codec);
4412 if (err < 0)
4413 return err;
4414
4415 spec = codec->spec;
4416 spec->linear_tone_beep = 1;
4417 spec->gen.own_eapd_ctl = 1;
4418
4419 codec->patch_ops = stac_patch_ops;
4420 codec->power_filter = snd_hda_codec_eapd_power_filter;
4421
4422 snd_hda_add_verbs(codec, stac9200_eapd_init);
4423
4424 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
4425 stac9200_fixups);
4426 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4427
4428 err = stac_parse_auto_config(codec);
4429 if (err < 0) {
4430 stac_free(codec);
4431 return err;
4432 }
4433
4434 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4435
4436 return 0;
4437 }
4438
4439 static int patch_stac925x(struct hda_codec *codec)
4440 {
4441 struct sigmatel_spec *spec;
4442 int err;
4443
4444 err = alloc_stac_spec(codec);
4445 if (err < 0)
4446 return err;
4447
4448 spec = codec->spec;
4449 spec->linear_tone_beep = 1;
4450 spec->gen.own_eapd_ctl = 1;
4451
4452 codec->patch_ops = stac_patch_ops;
4453
4454 snd_hda_add_verbs(codec, stac925x_core_init);
4455
4456 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
4457 stac925x_fixups);
4458 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4459
4460 err = stac_parse_auto_config(codec);
4461 if (err < 0) {
4462 stac_free(codec);
4463 return err;
4464 }
4465
4466 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4467
4468 return 0;
4469 }
4470
4471 static int patch_stac92hd73xx(struct hda_codec *codec)
4472 {
4473 struct sigmatel_spec *spec;
4474 int err;
4475 int num_dacs;
4476
4477 err = alloc_stac_spec(codec);
4478 if (err < 0)
4479 return err;
4480
4481 spec = codec->spec;
4482 spec->linear_tone_beep = 0;
4483 spec->gen.mixer_nid = 0x1d;
4484 spec->have_spdif_mux = 1;
4485
4486 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
4487 if (num_dacs < 3 || num_dacs > 5) {
4488 codec_warn(codec,
4489 "Could not determine number of channels defaulting to DAC count\n");
4490 num_dacs = 5;
4491 }
4492
4493 switch (num_dacs) {
4494 case 0x3: /* 6 Channel */
4495 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
4496 break;
4497 case 0x4: /* 8 Channel */
4498 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
4499 break;
4500 case 0x5: /* 10 Channel */
4501 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
4502 break;
4503 }
4504
4505 spec->aloopback_mask = 0x01;
4506 spec->aloopback_shift = 8;
4507
4508 spec->gen.beep_nid = 0x1c; /* digital beep */
4509
4510 /* GPIO0 High = Enable EAPD */
4511 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4512 spec->gpio_data = 0x01;
4513
4514 spec->eapd_switch = 1;
4515
4516 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4517 spec->pwr_nids = stac92hd73xx_pwr_nids;
4518
4519 spec->gen.own_eapd_ctl = 1;
4520 spec->gen.power_down_unused = 1;
4521
4522 codec->patch_ops = stac_patch_ops;
4523
4524 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
4525 stac92hd73xx_fixups);
4526 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4527
4528 if (!spec->volknob_init)
4529 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
4530
4531 err = stac_parse_auto_config(codec);
4532 if (err < 0) {
4533 stac_free(codec);
4534 return err;
4535 }
4536
4537 /* Don't GPIO-mute speakers if there are no internal speakers, because
4538 * the GPIO might be necessary for Headphone
4539 */
4540 if (spec->eapd_switch && !has_builtin_speaker(codec))
4541 spec->eapd_switch = 0;
4542
4543 codec->proc_widget_hook = stac92hd7x_proc_hook;
4544
4545 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4546
4547 return 0;
4548 }
4549
4550 static void stac_setup_gpio(struct hda_codec *codec)
4551 {
4552 struct sigmatel_spec *spec = codec->spec;
4553
4554 spec->gpio_mask |= spec->eapd_mask;
4555 if (spec->gpio_led) {
4556 if (!spec->vref_mute_led_nid) {
4557 spec->gpio_mask |= spec->gpio_led;
4558 spec->gpio_dir |= spec->gpio_led;
4559 spec->gpio_data |= spec->gpio_led;
4560 } else {
4561 codec->power_filter = stac_vref_led_power_filter;
4562 }
4563 }
4564
4565 if (spec->mic_mute_led_gpio) {
4566 spec->gpio_mask |= spec->mic_mute_led_gpio;
4567 spec->gpio_dir |= spec->mic_mute_led_gpio;
4568 spec->mic_enabled = 0;
4569 spec->gpio_data |= spec->mic_mute_led_gpio;
4570
4571 spec->gen.cap_sync_hook = stac_capture_led_hook;
4572 }
4573 }
4574
4575 static int patch_stac92hd83xxx(struct hda_codec *codec)
4576 {
4577 struct sigmatel_spec *spec;
4578 int err;
4579
4580 err = alloc_stac_spec(codec);
4581 if (err < 0)
4582 return err;
4583
4584 codec->epss = 0; /* longer delay needed for D3 */
4585
4586 spec = codec->spec;
4587 spec->linear_tone_beep = 0;
4588 spec->gen.own_eapd_ctl = 1;
4589 spec->gen.power_down_unused = 1;
4590 spec->gen.mixer_nid = 0x1b;
4591
4592 spec->gen.beep_nid = 0x21; /* digital beep */
4593 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4594 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4595 spec->default_polarity = -1; /* no default cfg */
4596
4597 codec->patch_ops = stac_patch_ops;
4598
4599 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
4600
4601 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
4602 stac92hd83xxx_fixups);
4603 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4604
4605 stac_setup_gpio(codec);
4606
4607 err = stac_parse_auto_config(codec);
4608 if (err < 0) {
4609 stac_free(codec);
4610 return err;
4611 }
4612
4613 codec->proc_widget_hook = stac92hd_proc_hook;
4614
4615 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4616
4617 return 0;
4618 }
4619
4620 static const hda_nid_t stac92hd95_pwr_nids[] = {
4621 0x0a, 0x0b, 0x0c, 0x0d
4622 };
4623
4624 static int patch_stac92hd95(struct hda_codec *codec)
4625 {
4626 struct sigmatel_spec *spec;
4627 int err;
4628
4629 err = alloc_stac_spec(codec);
4630 if (err < 0)
4631 return err;
4632
4633 codec->epss = 0; /* longer delay needed for D3 */
4634
4635 spec = codec->spec;
4636 spec->linear_tone_beep = 0;
4637 spec->gen.own_eapd_ctl = 1;
4638 spec->gen.power_down_unused = 1;
4639
4640 spec->gen.beep_nid = 0x19; /* digital beep */
4641 spec->pwr_nids = stac92hd95_pwr_nids;
4642 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
4643 spec->default_polarity = 0;
4644
4645 codec->patch_ops = stac_patch_ops;
4646
4647 snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
4648 stac92hd95_fixups);
4649 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4650
4651 stac_setup_gpio(codec);
4652
4653 err = stac_parse_auto_config(codec);
4654 if (err < 0) {
4655 stac_free(codec);
4656 return err;
4657 }
4658
4659 codec->proc_widget_hook = stac92hd_proc_hook;
4660
4661 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4662
4663 return 0;
4664 }
4665
4666 static int patch_stac92hd71bxx(struct hda_codec *codec)
4667 {
4668 struct sigmatel_spec *spec;
4669 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
4670 int err;
4671
4672 err = alloc_stac_spec(codec);
4673 if (err < 0)
4674 return err;
4675
4676 spec = codec->spec;
4677 spec->linear_tone_beep = 0;
4678 spec->gen.own_eapd_ctl = 1;
4679 spec->gen.power_down_unused = 1;
4680 spec->gen.mixer_nid = 0x17;
4681 spec->have_spdif_mux = 1;
4682
4683 codec->patch_ops = stac_patch_ops;
4684
4685 /* GPIO0 = EAPD */
4686 spec->gpio_mask = 0x01;
4687 spec->gpio_dir = 0x01;
4688 spec->gpio_data = 0x01;
4689
4690 switch (codec->vendor_id) {
4691 case 0x111d76b6: /* 4 Port without Analog Mixer */
4692 case 0x111d76b7:
4693 unmute_init++;
4694 break;
4695 case 0x111d7608: /* 5 Port with Analog Mixer */
4696 if ((codec->revision_id & 0xf) == 0 ||
4697 (codec->revision_id & 0xf) == 1)
4698 spec->stream_delay = 40; /* 40 milliseconds */
4699
4700 /* disable VSW */
4701 unmute_init++;
4702 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4703 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
4704 break;
4705 case 0x111d7603: /* 6 Port with Analog Mixer */
4706 if ((codec->revision_id & 0xf) == 1)
4707 spec->stream_delay = 40; /* 40 milliseconds */
4708
4709 break;
4710 }
4711
4712 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
4713 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
4714
4715 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
4716 snd_hda_sequence_write_cache(codec, unmute_init);
4717
4718 spec->aloopback_ctl = &stac92hd71bxx_loopback;
4719 spec->aloopback_mask = 0x50;
4720 spec->aloopback_shift = 0;
4721
4722 spec->powerdown_adcs = 1;
4723 spec->gen.beep_nid = 0x26; /* digital beep */
4724 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
4725 spec->pwr_nids = stac92hd71bxx_pwr_nids;
4726
4727 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4728 stac92hd71bxx_fixups);
4729 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4730
4731 stac_setup_gpio(codec);
4732
4733 err = stac_parse_auto_config(codec);
4734 if (err < 0) {
4735 stac_free(codec);
4736 return err;
4737 }
4738
4739 codec->proc_widget_hook = stac92hd7x_proc_hook;
4740
4741 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4742
4743 return 0;
4744 }
4745
4746 static int patch_stac922x(struct hda_codec *codec)
4747 {
4748 struct sigmatel_spec *spec;
4749 int err;
4750
4751 err = alloc_stac_spec(codec);
4752 if (err < 0)
4753 return err;
4754
4755 spec = codec->spec;
4756 spec->linear_tone_beep = 1;
4757 spec->gen.own_eapd_ctl = 1;
4758
4759 codec->patch_ops = stac_patch_ops;
4760
4761 snd_hda_add_verbs(codec, stac922x_core_init);
4762
4763 /* Fix Mux capture level; max to 2 */
4764 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4765 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4766 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4767 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4768 (0 << AC_AMPCAP_MUTE_SHIFT));
4769
4770 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4771 stac922x_fixups);
4772 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4773
4774 err = stac_parse_auto_config(codec);
4775 if (err < 0) {
4776 stac_free(codec);
4777 return err;
4778 }
4779
4780 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4781
4782 return 0;
4783 }
4784
4785 static const char * const stac927x_spdif_labels[] = {
4786 "Digital Playback", "ADAT", "Analog Mux 1",
4787 "Analog Mux 2", "Analog Mux 3", NULL
4788 };
4789
4790 static int patch_stac927x(struct hda_codec *codec)
4791 {
4792 struct sigmatel_spec *spec;
4793 int err;
4794
4795 err = alloc_stac_spec(codec);
4796 if (err < 0)
4797 return err;
4798
4799 spec = codec->spec;
4800 spec->linear_tone_beep = 1;
4801 spec->gen.own_eapd_ctl = 1;
4802 spec->have_spdif_mux = 1;
4803 spec->spdif_labels = stac927x_spdif_labels;
4804
4805 spec->gen.beep_nid = 0x23; /* digital beep */
4806
4807 /* GPIO0 High = Enable EAPD */
4808 spec->eapd_mask = spec->gpio_mask = 0x01;
4809 spec->gpio_dir = spec->gpio_data = 0x01;
4810
4811 spec->aloopback_ctl = &stac927x_loopback;
4812 spec->aloopback_mask = 0x40;
4813 spec->aloopback_shift = 0;
4814 spec->eapd_switch = 1;
4815
4816 codec->patch_ops = stac_patch_ops;
4817
4818 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4819 stac927x_fixups);
4820 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4821
4822 if (!spec->volknob_init)
4823 snd_hda_add_verbs(codec, stac927x_core_init);
4824
4825 err = stac_parse_auto_config(codec);
4826 if (err < 0) {
4827 stac_free(codec);
4828 return err;
4829 }
4830
4831 codec->proc_widget_hook = stac927x_proc_hook;
4832
4833 /*
4834 * !!FIXME!!
4835 * The STAC927x seem to require fairly long delays for certain
4836 * command sequences. With too short delays (even if the answer
4837 * is set to RIRB properly), it results in the silence output
4838 * on some hardwares like Dell.
4839 *
4840 * The below flag enables the longer delay (see get_response
4841 * in hda_intel.c).
4842 */
4843 codec->bus->needs_damn_long_delay = 1;
4844
4845 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4846
4847 return 0;
4848 }
4849
4850 static int patch_stac9205(struct hda_codec *codec)
4851 {
4852 struct sigmatel_spec *spec;
4853 int err;
4854
4855 err = alloc_stac_spec(codec);
4856 if (err < 0)
4857 return err;
4858
4859 spec = codec->spec;
4860 spec->linear_tone_beep = 1;
4861 spec->gen.own_eapd_ctl = 1;
4862 spec->have_spdif_mux = 1;
4863
4864 spec->gen.beep_nid = 0x23; /* digital beep */
4865
4866 snd_hda_add_verbs(codec, stac9205_core_init);
4867 spec->aloopback_ctl = &stac9205_loopback;
4868
4869 spec->aloopback_mask = 0x40;
4870 spec->aloopback_shift = 0;
4871
4872 /* GPIO0 High = EAPD */
4873 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4874 spec->gpio_data = 0x01;
4875
4876 /* Turn on/off EAPD per HP plugging */
4877 spec->eapd_switch = 1;
4878
4879 codec->patch_ops = stac_patch_ops;
4880
4881 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4882 stac9205_fixups);
4883 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4884
4885 err = stac_parse_auto_config(codec);
4886 if (err < 0) {
4887 stac_free(codec);
4888 return err;
4889 }
4890
4891 codec->proc_widget_hook = stac9205_proc_hook;
4892
4893 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4894
4895 return 0;
4896 }
4897
4898 /*
4899 * STAC9872 hack
4900 */
4901
4902 static const struct hda_verb stac9872_core_init[] = {
4903 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
4904 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4905 {}
4906 };
4907
4908 static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4909 { 0x0a, 0x03211020 },
4910 { 0x0b, 0x411111f0 },
4911 { 0x0c, 0x411111f0 },
4912 { 0x0d, 0x03a15030 },
4913 { 0x0e, 0x411111f0 },
4914 { 0x0f, 0x90170110 },
4915 { 0x11, 0x411111f0 },
4916 { 0x13, 0x411111f0 },
4917 { 0x14, 0x90a7013e },
4918 {}
4919 };
4920
4921 static const struct hda_model_fixup stac9872_models[] = {
4922 { .id = STAC_9872_VAIO, .name = "vaio" },
4923 {}
4924 };
4925
4926 static const struct hda_fixup stac9872_fixups[] = {
4927 [STAC_9872_VAIO] = {
4928 .type = HDA_FIXUP_PINS,
4929 .v.pins = stac9872_vaio_pin_configs,
4930 },
4931 };
4932
4933 static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
4934 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
4935 "Sony VAIO F/S", STAC_9872_VAIO),
4936 {} /* terminator */
4937 };
4938
4939 static int patch_stac9872(struct hda_codec *codec)
4940 {
4941 struct sigmatel_spec *spec;
4942 int err;
4943
4944 err = alloc_stac_spec(codec);
4945 if (err < 0)
4946 return err;
4947
4948 spec = codec->spec;
4949 spec->linear_tone_beep = 1;
4950 spec->gen.own_eapd_ctl = 1;
4951
4952 codec->patch_ops = stac_patch_ops;
4953
4954 snd_hda_add_verbs(codec, stac9872_core_init);
4955
4956 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
4957 stac9872_fixups);
4958 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4959
4960 err = stac_parse_auto_config(codec);
4961 if (err < 0) {
4962 stac_free(codec);
4963 return -EINVAL;
4964 }
4965
4966 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4967
4968 return 0;
4969 }
4970
4971
4972 /*
4973 * patch entries
4974 */
4975 static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4976 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4977 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4978 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4979 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4980 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4981 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4982 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
4983 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4984 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4985 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4986 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4987 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4988 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
4989 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4990 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4991 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4992 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4993 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4994 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4995 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4996 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4997 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4998 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
4999 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5000 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5001 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5002 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5003 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5004 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
5005 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5006 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
5007 /* The following does not take into account .id=0x83847661 when subsys =
5008 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5009 * currently not fully supported.
5010 */
5011 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5012 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5013 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
5014 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
5015 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5016 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5017 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5018 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5019 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5020 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5021 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5022 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
5023 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
5024 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5025 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
5026 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
5027 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
5028 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
5029 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
5030 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
5031 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
5032 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
5033 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
5034 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
5035 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5036 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
5037 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
5038 { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 },
5039 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5040 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5041 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5042 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5043 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5044 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5045 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5046 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5047 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
5048 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
5049 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
5050 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
5051 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
5052 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
5053 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
5054 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
5055 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
5056 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
5057 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
5058 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
5059 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
5060 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
5061 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
5062 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
5063 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
5064 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
5065 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
5066 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
5067 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
5068 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
5069 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
5070 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
5071 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
5072 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
5073 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
5074 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
5075 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
5076 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
5077 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
5078 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
5079 {} /* terminator */
5080 };
5081
5082 MODULE_ALIAS("snd-hda-codec-id:8384*");
5083 MODULE_ALIAS("snd-hda-codec-id:111d*");
5084
5085 MODULE_LICENSE("GPL");
5086 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5087
5088 static struct hda_codec_preset_list sigmatel_list = {
5089 .preset = snd_hda_preset_sigmatel,
5090 .owner = THIS_MODULE,
5091 };
5092
5093 static int __init patch_sigmatel_init(void)
5094 {
5095 return snd_hda_add_codec_preset(&sigmatel_list);
5096 }
5097
5098 static void __exit patch_sigmatel_exit(void)
5099 {
5100 snd_hda_delete_codec_preset(&sigmatel_list);
5101 }
5102
5103 module_init(patch_sigmatel_init)
5104 module_exit(patch_sigmatel_exit)
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