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Merge tag 'drm/tegra/for-5.7-fixes' of git://anongit.freedesktop.org/tegra/linux...
[thirdparty/linux.git] / sound / soc / codecs / wm8960.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * wm8960.c -- WM8960 ALSA SoC Audio driver
4 *
5 * Copyright 2007-11 Wolfson Microelectronics, plc
6 *
7 * Author: Liam Girdwood
8 */
9
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/init.h>
13 #include <linux/delay.h>
14 #include <linux/pm.h>
15 #include <linux/clk.h>
16 #include <linux/i2c.h>
17 #include <linux/slab.h>
18 #include <sound/core.h>
19 #include <sound/pcm.h>
20 #include <sound/pcm_params.h>
21 #include <sound/soc.h>
22 #include <sound/initval.h>
23 #include <sound/tlv.h>
24 #include <sound/wm8960.h>
25
26 #include "wm8960.h"
27
28 /* R25 - Power 1 */
29 #define WM8960_VMID_MASK 0x180
30 #define WM8960_VREF 0x40
31
32 /* R26 - Power 2 */
33 #define WM8960_PWR2_LOUT1 0x40
34 #define WM8960_PWR2_ROUT1 0x20
35 #define WM8960_PWR2_OUT3 0x02
36
37 /* R28 - Anti-pop 1 */
38 #define WM8960_POBCTRL 0x80
39 #define WM8960_BUFDCOPEN 0x10
40 #define WM8960_BUFIOEN 0x08
41 #define WM8960_SOFT_ST 0x04
42 #define WM8960_HPSTBY 0x01
43
44 /* R29 - Anti-pop 2 */
45 #define WM8960_DISOP 0x40
46 #define WM8960_DRES_MASK 0x30
47
48 static bool is_pll_freq_available(unsigned int source, unsigned int target);
49 static int wm8960_set_pll(struct snd_soc_component *component,
50 unsigned int freq_in, unsigned int freq_out);
51 /*
52 * wm8960 register cache
53 * We can't read the WM8960 register space when we are
54 * using 2 wire for device control, so we cache them instead.
55 */
56 static const struct reg_default wm8960_reg_defaults[] = {
57 { 0x0, 0x00a7 },
58 { 0x1, 0x00a7 },
59 { 0x2, 0x0000 },
60 { 0x3, 0x0000 },
61 { 0x4, 0x0000 },
62 { 0x5, 0x0008 },
63 { 0x6, 0x0000 },
64 { 0x7, 0x000a },
65 { 0x8, 0x01c0 },
66 { 0x9, 0x0000 },
67 { 0xa, 0x00ff },
68 { 0xb, 0x00ff },
69
70 { 0x10, 0x0000 },
71 { 0x11, 0x007b },
72 { 0x12, 0x0100 },
73 { 0x13, 0x0032 },
74 { 0x14, 0x0000 },
75 { 0x15, 0x00c3 },
76 { 0x16, 0x00c3 },
77 { 0x17, 0x01c0 },
78 { 0x18, 0x0000 },
79 { 0x19, 0x0000 },
80 { 0x1a, 0x0000 },
81 { 0x1b, 0x0000 },
82 { 0x1c, 0x0000 },
83 { 0x1d, 0x0000 },
84
85 { 0x20, 0x0100 },
86 { 0x21, 0x0100 },
87 { 0x22, 0x0050 },
88
89 { 0x25, 0x0050 },
90 { 0x26, 0x0000 },
91 { 0x27, 0x0000 },
92 { 0x28, 0x0000 },
93 { 0x29, 0x0000 },
94 { 0x2a, 0x0040 },
95 { 0x2b, 0x0000 },
96 { 0x2c, 0x0000 },
97 { 0x2d, 0x0050 },
98 { 0x2e, 0x0050 },
99 { 0x2f, 0x0000 },
100 { 0x30, 0x0002 },
101 { 0x31, 0x0037 },
102
103 { 0x33, 0x0080 },
104 { 0x34, 0x0008 },
105 { 0x35, 0x0031 },
106 { 0x36, 0x0026 },
107 { 0x37, 0x00e9 },
108 };
109
110 static bool wm8960_volatile(struct device *dev, unsigned int reg)
111 {
112 switch (reg) {
113 case WM8960_RESET:
114 return true;
115 default:
116 return false;
117 }
118 }
119
120 struct wm8960_priv {
121 struct clk *mclk;
122 struct regmap *regmap;
123 int (*set_bias_level)(struct snd_soc_component *,
124 enum snd_soc_bias_level level);
125 struct snd_soc_dapm_widget *lout1;
126 struct snd_soc_dapm_widget *rout1;
127 struct snd_soc_dapm_widget *out3;
128 bool deemph;
129 int lrclk;
130 int bclk;
131 int sysclk;
132 int clk_id;
133 int freq_in;
134 bool is_stream_in_use[2];
135 struct wm8960_data pdata;
136 };
137
138 #define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
139
140 /* enumerated controls */
141 static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
142 "Right Inverted", "Stereo Inversion"};
143 static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
144 static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
145 static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
146 static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
147 static const char *wm8960_adc_data_output_sel[] = {
148 "Left Data = Left ADC; Right Data = Right ADC",
149 "Left Data = Left ADC; Right Data = Left ADC",
150 "Left Data = Right ADC; Right Data = Right ADC",
151 "Left Data = Right ADC; Right Data = Left ADC",
152 };
153 static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
154
155 static const struct soc_enum wm8960_enum[] = {
156 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
157 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
158 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
159 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
160 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
161 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
162 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
163 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
164 };
165
166 static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
167
168 static int wm8960_set_deemph(struct snd_soc_component *component)
169 {
170 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
171 int val, i, best;
172
173 /* If we're using deemphasis select the nearest available sample
174 * rate.
175 */
176 if (wm8960->deemph) {
177 best = 1;
178 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
179 if (abs(deemph_settings[i] - wm8960->lrclk) <
180 abs(deemph_settings[best] - wm8960->lrclk))
181 best = i;
182 }
183
184 val = best << 1;
185 } else {
186 val = 0;
187 }
188
189 dev_dbg(component->dev, "Set deemphasis %d\n", val);
190
191 return snd_soc_component_update_bits(component, WM8960_DACCTL1,
192 0x6, val);
193 }
194
195 static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
196 struct snd_ctl_elem_value *ucontrol)
197 {
198 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
199 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
200
201 ucontrol->value.integer.value[0] = wm8960->deemph;
202 return 0;
203 }
204
205 static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
206 struct snd_ctl_elem_value *ucontrol)
207 {
208 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
209 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
210 unsigned int deemph = ucontrol->value.integer.value[0];
211
212 if (deemph > 1)
213 return -EINVAL;
214
215 wm8960->deemph = deemph;
216
217 return wm8960_set_deemph(component);
218 }
219
220 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
221 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
222 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
223 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
224 static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
225 static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
226 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv,
227 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
228 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
229 );
230
231 static const struct snd_kcontrol_new wm8960_snd_controls[] = {
232 SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
233 0, 63, 0, inpga_tlv),
234 SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
235 6, 1, 0),
236 SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
237 7, 1, 1),
238
239 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
240 WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
241 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
242 WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
243 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
244 WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
245 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
246 WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
247 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
248 WM8960_RINPATH, 4, 3, 0, micboost_tlv),
249 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
250 WM8960_LINPATH, 4, 3, 0, micboost_tlv),
251
252 SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
253 0, 255, 0, dac_tlv),
254
255 SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
256 0, 127, 0, out_tlv),
257 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
258 7, 1, 0),
259
260 SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
261 0, 127, 0, out_tlv),
262 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
263 7, 1, 0),
264 SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
265 SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
266
267 SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
268 SOC_ENUM("ADC Polarity", wm8960_enum[0]),
269 SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
270
271 SOC_ENUM("DAC Polarity", wm8960_enum[1]),
272 SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
273 wm8960_get_deemph, wm8960_put_deemph),
274
275 SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
276 SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
277 SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
278 SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
279
280 SOC_ENUM("ALC Function", wm8960_enum[4]),
281 SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
282 SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
283 SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
284 SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
285 SOC_ENUM("ALC Mode", wm8960_enum[5]),
286 SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
287 SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
288
289 SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
290 SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
291
292 SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
293 0, 255, 0, adc_tlv),
294
295 SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
296 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
297 SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
298 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
299 SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
300 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
301 SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
302 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
303
304 SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
305 SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
306 };
307
308 static const struct snd_kcontrol_new wm8960_lin_boost[] = {
309 SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
310 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
311 SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
312 };
313
314 static const struct snd_kcontrol_new wm8960_lin[] = {
315 SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
316 };
317
318 static const struct snd_kcontrol_new wm8960_rin_boost[] = {
319 SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
320 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
321 SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
322 };
323
324 static const struct snd_kcontrol_new wm8960_rin[] = {
325 SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
326 };
327
328 static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
329 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
330 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
331 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
332 };
333
334 static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
335 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
336 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
337 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
338 };
339
340 static const struct snd_kcontrol_new wm8960_mono_out[] = {
341 SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
342 SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
343 };
344
345 static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
346 SND_SOC_DAPM_INPUT("LINPUT1"),
347 SND_SOC_DAPM_INPUT("RINPUT1"),
348 SND_SOC_DAPM_INPUT("LINPUT2"),
349 SND_SOC_DAPM_INPUT("RINPUT2"),
350 SND_SOC_DAPM_INPUT("LINPUT3"),
351 SND_SOC_DAPM_INPUT("RINPUT3"),
352
353 SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
354
355 SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
356 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
357 SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
358 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
359
360 SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
361 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
362 SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
363 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
364
365 SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
366 SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
367
368 SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
369 SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
370
371 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
372 &wm8960_loutput_mixer[0],
373 ARRAY_SIZE(wm8960_loutput_mixer)),
374 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
375 &wm8960_routput_mixer[0],
376 ARRAY_SIZE(wm8960_routput_mixer)),
377
378 SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
379 SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
380
381 SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
382 SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
383
384 SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
385 SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
386
387 SND_SOC_DAPM_OUTPUT("SPK_LP"),
388 SND_SOC_DAPM_OUTPUT("SPK_LN"),
389 SND_SOC_DAPM_OUTPUT("HP_L"),
390 SND_SOC_DAPM_OUTPUT("HP_R"),
391 SND_SOC_DAPM_OUTPUT("SPK_RP"),
392 SND_SOC_DAPM_OUTPUT("SPK_RN"),
393 SND_SOC_DAPM_OUTPUT("OUT3"),
394 };
395
396 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
397 SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
398 &wm8960_mono_out[0],
399 ARRAY_SIZE(wm8960_mono_out)),
400 };
401
402 /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
403 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
404 SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
405 };
406
407 static const struct snd_soc_dapm_route audio_paths[] = {
408 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
409 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
410 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
411
412 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
413 { "Left Input Mixer", "Boost Switch", "LINPUT1" }, /* Really Boost Switch */
414 { "Left Input Mixer", NULL, "LINPUT2" },
415 { "Left Input Mixer", NULL, "LINPUT3" },
416
417 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
418 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
419 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
420
421 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
422 { "Right Input Mixer", "Boost Switch", "RINPUT1" }, /* Really Boost Switch */
423 { "Right Input Mixer", NULL, "RINPUT2" },
424 { "Right Input Mixer", NULL, "RINPUT3" },
425
426 { "Left ADC", NULL, "Left Input Mixer" },
427 { "Right ADC", NULL, "Right Input Mixer" },
428
429 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
430 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
431 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
432
433 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
434 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
435 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
436
437 { "LOUT1 PGA", NULL, "Left Output Mixer" },
438 { "ROUT1 PGA", NULL, "Right Output Mixer" },
439
440 { "HP_L", NULL, "LOUT1 PGA" },
441 { "HP_R", NULL, "ROUT1 PGA" },
442
443 { "Left Speaker PGA", NULL, "Left Output Mixer" },
444 { "Right Speaker PGA", NULL, "Right Output Mixer" },
445
446 { "Left Speaker Output", NULL, "Left Speaker PGA" },
447 { "Right Speaker Output", NULL, "Right Speaker PGA" },
448
449 { "SPK_LN", NULL, "Left Speaker Output" },
450 { "SPK_LP", NULL, "Left Speaker Output" },
451 { "SPK_RN", NULL, "Right Speaker Output" },
452 { "SPK_RP", NULL, "Right Speaker Output" },
453 };
454
455 static const struct snd_soc_dapm_route audio_paths_out3[] = {
456 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
457 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
458
459 { "OUT3", NULL, "Mono Output Mixer", }
460 };
461
462 static const struct snd_soc_dapm_route audio_paths_capless[] = {
463 { "HP_L", NULL, "OUT3 VMID" },
464 { "HP_R", NULL, "OUT3 VMID" },
465
466 { "OUT3 VMID", NULL, "Left Output Mixer" },
467 { "OUT3 VMID", NULL, "Right Output Mixer" },
468 };
469
470 static int wm8960_add_widgets(struct snd_soc_component *component)
471 {
472 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
473 struct wm8960_data *pdata = &wm8960->pdata;
474 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
475 struct snd_soc_dapm_widget *w;
476
477 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
478 ARRAY_SIZE(wm8960_dapm_widgets));
479
480 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
481
482 /* In capless mode OUT3 is used to provide VMID for the
483 * headphone outputs, otherwise it is used as a mono mixer.
484 */
485 if (pdata && pdata->capless) {
486 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
487 ARRAY_SIZE(wm8960_dapm_widgets_capless));
488
489 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
490 ARRAY_SIZE(audio_paths_capless));
491 } else {
492 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
493 ARRAY_SIZE(wm8960_dapm_widgets_out3));
494
495 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
496 ARRAY_SIZE(audio_paths_out3));
497 }
498
499 /* We need to power up the headphone output stage out of
500 * sequence for capless mode. To save scanning the widget
501 * list each time to find the desired power state do so now
502 * and save the result.
503 */
504 list_for_each_entry(w, &component->card->widgets, list) {
505 if (w->dapm != dapm)
506 continue;
507 if (strcmp(w->name, "LOUT1 PGA") == 0)
508 wm8960->lout1 = w;
509 if (strcmp(w->name, "ROUT1 PGA") == 0)
510 wm8960->rout1 = w;
511 if (strcmp(w->name, "OUT3 VMID") == 0)
512 wm8960->out3 = w;
513 }
514
515 return 0;
516 }
517
518 static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
519 unsigned int fmt)
520 {
521 struct snd_soc_component *component = codec_dai->component;
522 u16 iface = 0;
523
524 /* set master/slave audio interface */
525 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
526 case SND_SOC_DAIFMT_CBM_CFM:
527 iface |= 0x0040;
528 break;
529 case SND_SOC_DAIFMT_CBS_CFS:
530 break;
531 default:
532 return -EINVAL;
533 }
534
535 /* interface format */
536 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
537 case SND_SOC_DAIFMT_I2S:
538 iface |= 0x0002;
539 break;
540 case SND_SOC_DAIFMT_RIGHT_J:
541 break;
542 case SND_SOC_DAIFMT_LEFT_J:
543 iface |= 0x0001;
544 break;
545 case SND_SOC_DAIFMT_DSP_A:
546 iface |= 0x0003;
547 break;
548 case SND_SOC_DAIFMT_DSP_B:
549 iface |= 0x0013;
550 break;
551 default:
552 return -EINVAL;
553 }
554
555 /* clock inversion */
556 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
557 case SND_SOC_DAIFMT_NB_NF:
558 break;
559 case SND_SOC_DAIFMT_IB_IF:
560 iface |= 0x0090;
561 break;
562 case SND_SOC_DAIFMT_IB_NF:
563 iface |= 0x0080;
564 break;
565 case SND_SOC_DAIFMT_NB_IF:
566 iface |= 0x0010;
567 break;
568 default:
569 return -EINVAL;
570 }
571
572 /* set iface */
573 snd_soc_component_write(component, WM8960_IFACE1, iface);
574 return 0;
575 }
576
577 static struct {
578 int rate;
579 unsigned int val;
580 } alc_rates[] = {
581 { 48000, 0 },
582 { 44100, 0 },
583 { 32000, 1 },
584 { 22050, 2 },
585 { 24000, 2 },
586 { 16000, 3 },
587 { 11025, 4 },
588 { 12000, 4 },
589 { 8000, 5 },
590 };
591
592 /* -1 for reserved value */
593 static const int sysclk_divs[] = { 1, -1, 2, -1 };
594
595 /* Multiply 256 for internal 256 div */
596 static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
597
598 /* Multiply 10 to eliminate decimials */
599 static const int bclk_divs[] = {
600 10, 15, 20, 30, 40, 55, 60, 80, 110,
601 120, 160, 220, 240, 320, 320, 320
602 };
603
604 /**
605 * wm8960_configure_sysclk - checks if there is a sysclk frequency available
606 * The sysclk must be chosen such that:
607 * - sysclk = MCLK / sysclk_divs
608 * - lrclk = sysclk / dac_divs
609 * - 10 * bclk = sysclk / bclk_divs
610 *
611 * If we cannot find an exact match for (sysclk, lrclk, bclk)
612 * triplet, we relax the bclk such that bclk is chosen as the
613 * closest available frequency greater than expected bclk.
614 *
615 * @wm8960_priv: wm8960 codec private data
616 * @mclk: MCLK used to derive sysclk
617 * @sysclk_idx: sysclk_divs index for found sysclk
618 * @dac_idx: dac_divs index for found lrclk
619 * @bclk_idx: bclk_divs index for found bclk
620 *
621 * Returns:
622 * -1, in case no sysclk frequency available found
623 * >=0, in case we could derive bclk and lrclk from sysclk using
624 * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
625 */
626 static
627 int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
628 int *sysclk_idx, int *dac_idx, int *bclk_idx)
629 {
630 int sysclk, bclk, lrclk;
631 int i, j, k;
632 int diff, closest = mclk;
633
634 /* marker for no match */
635 *bclk_idx = -1;
636
637 bclk = wm8960->bclk;
638 lrclk = wm8960->lrclk;
639
640 /* check if the sysclk frequency is available. */
641 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
642 if (sysclk_divs[i] == -1)
643 continue;
644 sysclk = mclk / sysclk_divs[i];
645 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
646 if (sysclk != dac_divs[j] * lrclk)
647 continue;
648 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
649 diff = sysclk - bclk * bclk_divs[k] / 10;
650 if (diff == 0) {
651 *sysclk_idx = i;
652 *dac_idx = j;
653 *bclk_idx = k;
654 break;
655 }
656 if (diff > 0 && closest > diff) {
657 *sysclk_idx = i;
658 *dac_idx = j;
659 *bclk_idx = k;
660 closest = diff;
661 }
662 }
663 if (k != ARRAY_SIZE(bclk_divs))
664 break;
665 }
666 if (j != ARRAY_SIZE(dac_divs))
667 break;
668 }
669 return *bclk_idx;
670 }
671
672 /**
673 * wm8960_configure_pll - checks if there is a PLL out frequency available
674 * The PLL out frequency must be chosen such that:
675 * - sysclk = lrclk * dac_divs
676 * - freq_out = sysclk * sysclk_divs
677 * - 10 * sysclk = bclk * bclk_divs
678 *
679 * If we cannot find an exact match for (sysclk, lrclk, bclk)
680 * triplet, we relax the bclk such that bclk is chosen as the
681 * closest available frequency greater than expected bclk.
682 *
683 * @component: component structure
684 * @freq_in: input frequency used to derive freq out via PLL
685 * @sysclk_idx: sysclk_divs index for found sysclk
686 * @dac_idx: dac_divs index for found lrclk
687 * @bclk_idx: bclk_divs index for found bclk
688 *
689 * Returns:
690 * < 0, in case no PLL frequency out available was found
691 * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using
692 * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
693 */
694 static
695 int wm8960_configure_pll(struct snd_soc_component *component, int freq_in,
696 int *sysclk_idx, int *dac_idx, int *bclk_idx)
697 {
698 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
699 int sysclk, bclk, lrclk, freq_out;
700 int diff, closest, best_freq_out;
701 int i, j, k;
702
703 bclk = wm8960->bclk;
704 lrclk = wm8960->lrclk;
705 closest = freq_in;
706
707 best_freq_out = -EINVAL;
708 *sysclk_idx = *dac_idx = *bclk_idx = -1;
709
710 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
711 if (sysclk_divs[i] == -1)
712 continue;
713 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
714 sysclk = lrclk * dac_divs[j];
715 freq_out = sysclk * sysclk_divs[i];
716
717 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
718 if (!is_pll_freq_available(freq_in, freq_out))
719 continue;
720
721 diff = sysclk - bclk * bclk_divs[k] / 10;
722 if (diff == 0) {
723 *sysclk_idx = i;
724 *dac_idx = j;
725 *bclk_idx = k;
726 return freq_out;
727 }
728 if (diff > 0 && closest > diff) {
729 *sysclk_idx = i;
730 *dac_idx = j;
731 *bclk_idx = k;
732 closest = diff;
733 best_freq_out = freq_out;
734 }
735 }
736 }
737 }
738
739 return best_freq_out;
740 }
741 static int wm8960_configure_clocking(struct snd_soc_component *component)
742 {
743 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
744 int freq_out, freq_in;
745 u16 iface1 = snd_soc_component_read32(component, WM8960_IFACE1);
746 int i, j, k;
747 int ret;
748
749 if (!(iface1 & (1<<6))) {
750 dev_dbg(component->dev,
751 "Codec is slave mode, no need to configure clock\n");
752 return 0;
753 }
754
755 if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
756 dev_err(component->dev, "No MCLK configured\n");
757 return -EINVAL;
758 }
759
760 freq_in = wm8960->freq_in;
761 /*
762 * If it's sysclk auto mode, check if the MCLK can provide sysclk or
763 * not. If MCLK can provide sysclk, using MCLK to provide sysclk
764 * directly. Otherwise, auto select a available pll out frequency
765 * and set PLL.
766 */
767 if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
768 /* disable the PLL and using MCLK to provide sysclk */
769 wm8960_set_pll(component, 0, 0);
770 freq_out = freq_in;
771 } else if (wm8960->sysclk) {
772 freq_out = wm8960->sysclk;
773 } else {
774 dev_err(component->dev, "No SYSCLK configured\n");
775 return -EINVAL;
776 }
777
778 if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
779 ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
780 if (ret >= 0) {
781 goto configure_clock;
782 } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
783 dev_err(component->dev, "failed to configure clock\n");
784 return -EINVAL;
785 }
786 }
787
788 freq_out = wm8960_configure_pll(component, freq_in, &i, &j, &k);
789 if (freq_out < 0) {
790 dev_err(component->dev, "failed to configure clock via PLL\n");
791 return freq_out;
792 }
793 wm8960_set_pll(component, freq_in, freq_out);
794
795 configure_clock:
796 /* configure sysclk clock */
797 snd_soc_component_update_bits(component, WM8960_CLOCK1, 3 << 1, i << 1);
798
799 /* configure frame clock */
800 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 3, j << 3);
801 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 6, j << 6);
802
803 /* configure bit clock */
804 snd_soc_component_update_bits(component, WM8960_CLOCK2, 0xf, k);
805
806 return 0;
807 }
808
809 static int wm8960_hw_params(struct snd_pcm_substream *substream,
810 struct snd_pcm_hw_params *params,
811 struct snd_soc_dai *dai)
812 {
813 struct snd_soc_component *component = dai->component;
814 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
815 u16 iface = snd_soc_component_read32(component, WM8960_IFACE1) & 0xfff3;
816 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
817 int i;
818
819 wm8960->bclk = snd_soc_params_to_bclk(params);
820 if (params_channels(params) == 1)
821 wm8960->bclk *= 2;
822
823 /* bit size */
824 switch (params_width(params)) {
825 case 16:
826 break;
827 case 20:
828 iface |= 0x0004;
829 break;
830 case 24:
831 iface |= 0x0008;
832 break;
833 case 32:
834 /* right justify mode does not support 32 word length */
835 if ((iface & 0x3) != 0) {
836 iface |= 0x000c;
837 break;
838 }
839 /* fall through */
840 default:
841 dev_err(component->dev, "unsupported width %d\n",
842 params_width(params));
843 return -EINVAL;
844 }
845
846 wm8960->lrclk = params_rate(params);
847 /* Update filters for the new rate */
848 if (tx) {
849 wm8960_set_deemph(component);
850 } else {
851 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
852 if (alc_rates[i].rate == params_rate(params))
853 snd_soc_component_update_bits(component,
854 WM8960_ADDCTL3, 0x7,
855 alc_rates[i].val);
856 }
857
858 /* set iface */
859 snd_soc_component_write(component, WM8960_IFACE1, iface);
860
861 wm8960->is_stream_in_use[tx] = true;
862
863 if (!wm8960->is_stream_in_use[!tx])
864 return wm8960_configure_clocking(component);
865
866 return 0;
867 }
868
869 static int wm8960_hw_free(struct snd_pcm_substream *substream,
870 struct snd_soc_dai *dai)
871 {
872 struct snd_soc_component *component = dai->component;
873 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
874 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
875
876 wm8960->is_stream_in_use[tx] = false;
877
878 return 0;
879 }
880
881 static int wm8960_mute(struct snd_soc_dai *dai, int mute)
882 {
883 struct snd_soc_component *component = dai->component;
884
885 if (mute)
886 snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0x8);
887 else
888 snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0);
889 return 0;
890 }
891
892 static int wm8960_set_bias_level_out3(struct snd_soc_component *component,
893 enum snd_soc_bias_level level)
894 {
895 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
896 u16 pm2 = snd_soc_component_read32(component, WM8960_POWER2);
897 int ret;
898
899 switch (level) {
900 case SND_SOC_BIAS_ON:
901 break;
902
903 case SND_SOC_BIAS_PREPARE:
904 switch (snd_soc_component_get_bias_level(component)) {
905 case SND_SOC_BIAS_STANDBY:
906 if (!IS_ERR(wm8960->mclk)) {
907 ret = clk_prepare_enable(wm8960->mclk);
908 if (ret) {
909 dev_err(component->dev,
910 "Failed to enable MCLK: %d\n",
911 ret);
912 return ret;
913 }
914 }
915
916 ret = wm8960_configure_clocking(component);
917 if (ret)
918 return ret;
919
920 /* Set VMID to 2x50k */
921 snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x80);
922 break;
923
924 case SND_SOC_BIAS_ON:
925 /*
926 * If it's sysclk auto mode, and the pll is enabled,
927 * disable the pll
928 */
929 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
930 wm8960_set_pll(component, 0, 0);
931
932 if (!IS_ERR(wm8960->mclk))
933 clk_disable_unprepare(wm8960->mclk);
934 break;
935
936 default:
937 break;
938 }
939
940 break;
941
942 case SND_SOC_BIAS_STANDBY:
943 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
944 regcache_sync(wm8960->regmap);
945
946 /* Enable anti-pop features */
947 snd_soc_component_write(component, WM8960_APOP1,
948 WM8960_POBCTRL | WM8960_SOFT_ST |
949 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
950
951 /* Enable & ramp VMID at 2x50k */
952 snd_soc_component_update_bits(component, WM8960_POWER1, 0x80, 0x80);
953 msleep(100);
954
955 /* Enable VREF */
956 snd_soc_component_update_bits(component, WM8960_POWER1, WM8960_VREF,
957 WM8960_VREF);
958
959 /* Disable anti-pop features */
960 snd_soc_component_write(component, WM8960_APOP1, WM8960_BUFIOEN);
961 }
962
963 /* Set VMID to 2x250k */
964 snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x100);
965 break;
966
967 case SND_SOC_BIAS_OFF:
968 /* Enable anti-pop features */
969 snd_soc_component_write(component, WM8960_APOP1,
970 WM8960_POBCTRL | WM8960_SOFT_ST |
971 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
972
973 /* Disable VMID and VREF, let them discharge */
974 snd_soc_component_write(component, WM8960_POWER1, 0);
975 msleep(600);
976 break;
977 }
978
979 return 0;
980 }
981
982 static int wm8960_set_bias_level_capless(struct snd_soc_component *component,
983 enum snd_soc_bias_level level)
984 {
985 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
986 u16 pm2 = snd_soc_component_read32(component, WM8960_POWER2);
987 int reg, ret;
988
989 switch (level) {
990 case SND_SOC_BIAS_ON:
991 break;
992
993 case SND_SOC_BIAS_PREPARE:
994 switch (snd_soc_component_get_bias_level(component)) {
995 case SND_SOC_BIAS_STANDBY:
996 /* Enable anti pop mode */
997 snd_soc_component_update_bits(component, WM8960_APOP1,
998 WM8960_POBCTRL | WM8960_SOFT_ST |
999 WM8960_BUFDCOPEN,
1000 WM8960_POBCTRL | WM8960_SOFT_ST |
1001 WM8960_BUFDCOPEN);
1002
1003 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
1004 reg = 0;
1005 if (wm8960->lout1 && wm8960->lout1->power)
1006 reg |= WM8960_PWR2_LOUT1;
1007 if (wm8960->rout1 && wm8960->rout1->power)
1008 reg |= WM8960_PWR2_ROUT1;
1009 if (wm8960->out3 && wm8960->out3->power)
1010 reg |= WM8960_PWR2_OUT3;
1011 snd_soc_component_update_bits(component, WM8960_POWER2,
1012 WM8960_PWR2_LOUT1 |
1013 WM8960_PWR2_ROUT1 |
1014 WM8960_PWR2_OUT3, reg);
1015
1016 /* Enable VMID at 2*50k */
1017 snd_soc_component_update_bits(component, WM8960_POWER1,
1018 WM8960_VMID_MASK, 0x80);
1019
1020 /* Ramp */
1021 msleep(100);
1022
1023 /* Enable VREF */
1024 snd_soc_component_update_bits(component, WM8960_POWER1,
1025 WM8960_VREF, WM8960_VREF);
1026
1027 msleep(100);
1028
1029 if (!IS_ERR(wm8960->mclk)) {
1030 ret = clk_prepare_enable(wm8960->mclk);
1031 if (ret) {
1032 dev_err(component->dev,
1033 "Failed to enable MCLK: %d\n",
1034 ret);
1035 return ret;
1036 }
1037 }
1038
1039 ret = wm8960_configure_clocking(component);
1040 if (ret)
1041 return ret;
1042
1043 break;
1044
1045 case SND_SOC_BIAS_ON:
1046 /*
1047 * If it's sysclk auto mode, and the pll is enabled,
1048 * disable the pll
1049 */
1050 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
1051 wm8960_set_pll(component, 0, 0);
1052
1053 if (!IS_ERR(wm8960->mclk))
1054 clk_disable_unprepare(wm8960->mclk);
1055
1056 /* Enable anti-pop mode */
1057 snd_soc_component_update_bits(component, WM8960_APOP1,
1058 WM8960_POBCTRL | WM8960_SOFT_ST |
1059 WM8960_BUFDCOPEN,
1060 WM8960_POBCTRL | WM8960_SOFT_ST |
1061 WM8960_BUFDCOPEN);
1062
1063 /* Disable VMID and VREF */
1064 snd_soc_component_update_bits(component, WM8960_POWER1,
1065 WM8960_VREF | WM8960_VMID_MASK, 0);
1066 break;
1067
1068 case SND_SOC_BIAS_OFF:
1069 regcache_sync(wm8960->regmap);
1070 break;
1071 default:
1072 break;
1073 }
1074 break;
1075
1076 case SND_SOC_BIAS_STANDBY:
1077 switch (snd_soc_component_get_bias_level(component)) {
1078 case SND_SOC_BIAS_PREPARE:
1079 /* Disable HP discharge */
1080 snd_soc_component_update_bits(component, WM8960_APOP2,
1081 WM8960_DISOP | WM8960_DRES_MASK,
1082 0);
1083
1084 /* Disable anti-pop features */
1085 snd_soc_component_update_bits(component, WM8960_APOP1,
1086 WM8960_POBCTRL | WM8960_SOFT_ST |
1087 WM8960_BUFDCOPEN,
1088 WM8960_POBCTRL | WM8960_SOFT_ST |
1089 WM8960_BUFDCOPEN);
1090 break;
1091
1092 default:
1093 break;
1094 }
1095 break;
1096
1097 case SND_SOC_BIAS_OFF:
1098 break;
1099 }
1100
1101 return 0;
1102 }
1103
1104 /* PLL divisors */
1105 struct _pll_div {
1106 u32 pre_div:1;
1107 u32 n:4;
1108 u32 k:24;
1109 };
1110
1111 static bool is_pll_freq_available(unsigned int source, unsigned int target)
1112 {
1113 unsigned int Ndiv;
1114
1115 if (source == 0 || target == 0)
1116 return false;
1117
1118 /* Scale up target to PLL operating frequency */
1119 target *= 4;
1120 Ndiv = target / source;
1121
1122 if (Ndiv < 6) {
1123 source >>= 1;
1124 Ndiv = target / source;
1125 }
1126
1127 if ((Ndiv < 6) || (Ndiv > 12))
1128 return false;
1129
1130 return true;
1131 }
1132
1133 /* The size in bits of the pll divide multiplied by 10
1134 * to allow rounding later */
1135 #define FIXED_PLL_SIZE ((1 << 24) * 10)
1136
1137 static int pll_factors(unsigned int source, unsigned int target,
1138 struct _pll_div *pll_div)
1139 {
1140 unsigned long long Kpart;
1141 unsigned int K, Ndiv, Nmod;
1142
1143 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
1144
1145 /* Scale up target to PLL operating frequency */
1146 target *= 4;
1147
1148 Ndiv = target / source;
1149 if (Ndiv < 6) {
1150 source >>= 1;
1151 pll_div->pre_div = 1;
1152 Ndiv = target / source;
1153 } else
1154 pll_div->pre_div = 0;
1155
1156 if ((Ndiv < 6) || (Ndiv > 12)) {
1157 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
1158 return -EINVAL;
1159 }
1160
1161 pll_div->n = Ndiv;
1162 Nmod = target % source;
1163 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
1164
1165 do_div(Kpart, source);
1166
1167 K = Kpart & 0xFFFFFFFF;
1168
1169 /* Check if we need to round */
1170 if ((K % 10) >= 5)
1171 K += 5;
1172
1173 /* Move down to proper range now rounding is done */
1174 K /= 10;
1175
1176 pll_div->k = K;
1177
1178 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
1179 pll_div->n, pll_div->k, pll_div->pre_div);
1180
1181 return 0;
1182 }
1183
1184 static int wm8960_set_pll(struct snd_soc_component *component,
1185 unsigned int freq_in, unsigned int freq_out)
1186 {
1187 u16 reg;
1188 static struct _pll_div pll_div;
1189 int ret;
1190
1191 if (freq_in && freq_out) {
1192 ret = pll_factors(freq_in, freq_out, &pll_div);
1193 if (ret != 0)
1194 return ret;
1195 }
1196
1197 /* Disable the PLL: even if we are changing the frequency the
1198 * PLL needs to be disabled while we do so. */
1199 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0);
1200 snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0);
1201
1202 if (!freq_in || !freq_out)
1203 return 0;
1204
1205 reg = snd_soc_component_read32(component, WM8960_PLL1) & ~0x3f;
1206 reg |= pll_div.pre_div << 4;
1207 reg |= pll_div.n;
1208
1209 if (pll_div.k) {
1210 reg |= 0x20;
1211
1212 snd_soc_component_write(component, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
1213 snd_soc_component_write(component, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
1214 snd_soc_component_write(component, WM8960_PLL4, pll_div.k & 0xff);
1215 }
1216 snd_soc_component_write(component, WM8960_PLL1, reg);
1217
1218 /* Turn it on */
1219 snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1);
1220 msleep(250);
1221 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1);
1222
1223 return 0;
1224 }
1225
1226 static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1227 int source, unsigned int freq_in, unsigned int freq_out)
1228 {
1229 struct snd_soc_component *component = codec_dai->component;
1230 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1231
1232 wm8960->freq_in = freq_in;
1233
1234 if (pll_id == WM8960_SYSCLK_AUTO)
1235 return 0;
1236
1237 return wm8960_set_pll(component, freq_in, freq_out);
1238 }
1239
1240 static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1241 int div_id, int div)
1242 {
1243 struct snd_soc_component *component = codec_dai->component;
1244 u16 reg;
1245
1246 switch (div_id) {
1247 case WM8960_SYSCLKDIV:
1248 reg = snd_soc_component_read32(component, WM8960_CLOCK1) & 0x1f9;
1249 snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
1250 break;
1251 case WM8960_DACDIV:
1252 reg = snd_soc_component_read32(component, WM8960_CLOCK1) & 0x1c7;
1253 snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
1254 break;
1255 case WM8960_OPCLKDIV:
1256 reg = snd_soc_component_read32(component, WM8960_PLL1) & 0x03f;
1257 snd_soc_component_write(component, WM8960_PLL1, reg | div);
1258 break;
1259 case WM8960_DCLKDIV:
1260 reg = snd_soc_component_read32(component, WM8960_CLOCK2) & 0x03f;
1261 snd_soc_component_write(component, WM8960_CLOCK2, reg | div);
1262 break;
1263 case WM8960_TOCLKSEL:
1264 reg = snd_soc_component_read32(component, WM8960_ADDCTL1) & 0x1fd;
1265 snd_soc_component_write(component, WM8960_ADDCTL1, reg | div);
1266 break;
1267 default:
1268 return -EINVAL;
1269 }
1270
1271 return 0;
1272 }
1273
1274 static int wm8960_set_bias_level(struct snd_soc_component *component,
1275 enum snd_soc_bias_level level)
1276 {
1277 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1278
1279 return wm8960->set_bias_level(component, level);
1280 }
1281
1282 static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1283 unsigned int freq, int dir)
1284 {
1285 struct snd_soc_component *component = dai->component;
1286 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1287
1288 switch (clk_id) {
1289 case WM8960_SYSCLK_MCLK:
1290 snd_soc_component_update_bits(component, WM8960_CLOCK1,
1291 0x1, WM8960_SYSCLK_MCLK);
1292 break;
1293 case WM8960_SYSCLK_PLL:
1294 snd_soc_component_update_bits(component, WM8960_CLOCK1,
1295 0x1, WM8960_SYSCLK_PLL);
1296 break;
1297 case WM8960_SYSCLK_AUTO:
1298 break;
1299 default:
1300 return -EINVAL;
1301 }
1302
1303 wm8960->sysclk = freq;
1304 wm8960->clk_id = clk_id;
1305
1306 return 0;
1307 }
1308
1309 #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
1310
1311 #define WM8960_FORMATS \
1312 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1313 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1314
1315 static const struct snd_soc_dai_ops wm8960_dai_ops = {
1316 .hw_params = wm8960_hw_params,
1317 .hw_free = wm8960_hw_free,
1318 .digital_mute = wm8960_mute,
1319 .set_fmt = wm8960_set_dai_fmt,
1320 .set_clkdiv = wm8960_set_dai_clkdiv,
1321 .set_pll = wm8960_set_dai_pll,
1322 .set_sysclk = wm8960_set_dai_sysclk,
1323 };
1324
1325 static struct snd_soc_dai_driver wm8960_dai = {
1326 .name = "wm8960-hifi",
1327 .playback = {
1328 .stream_name = "Playback",
1329 .channels_min = 1,
1330 .channels_max = 2,
1331 .rates = WM8960_RATES,
1332 .formats = WM8960_FORMATS,},
1333 .capture = {
1334 .stream_name = "Capture",
1335 .channels_min = 1,
1336 .channels_max = 2,
1337 .rates = WM8960_RATES,
1338 .formats = WM8960_FORMATS,},
1339 .ops = &wm8960_dai_ops,
1340 .symmetric_rates = 1,
1341 };
1342
1343 static int wm8960_probe(struct snd_soc_component *component)
1344 {
1345 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1346 struct wm8960_data *pdata = &wm8960->pdata;
1347
1348 if (pdata->capless)
1349 wm8960->set_bias_level = wm8960_set_bias_level_capless;
1350 else
1351 wm8960->set_bias_level = wm8960_set_bias_level_out3;
1352
1353 snd_soc_add_component_controls(component, wm8960_snd_controls,
1354 ARRAY_SIZE(wm8960_snd_controls));
1355 wm8960_add_widgets(component);
1356
1357 return 0;
1358 }
1359
1360 static const struct snd_soc_component_driver soc_component_dev_wm8960 = {
1361 .probe = wm8960_probe,
1362 .set_bias_level = wm8960_set_bias_level,
1363 .suspend_bias_off = 1,
1364 .idle_bias_on = 1,
1365 .use_pmdown_time = 1,
1366 .endianness = 1,
1367 .non_legacy_dai_naming = 1,
1368 };
1369
1370 static const struct regmap_config wm8960_regmap = {
1371 .reg_bits = 7,
1372 .val_bits = 9,
1373 .max_register = WM8960_PLL4,
1374
1375 .reg_defaults = wm8960_reg_defaults,
1376 .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
1377 .cache_type = REGCACHE_RBTREE,
1378
1379 .volatile_reg = wm8960_volatile,
1380 };
1381
1382 static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
1383 struct wm8960_data *pdata)
1384 {
1385 const struct device_node *np = i2c->dev.of_node;
1386
1387 if (of_property_read_bool(np, "wlf,capless"))
1388 pdata->capless = true;
1389
1390 if (of_property_read_bool(np, "wlf,shared-lrclk"))
1391 pdata->shared_lrclk = true;
1392 }
1393
1394 static int wm8960_i2c_probe(struct i2c_client *i2c,
1395 const struct i2c_device_id *id)
1396 {
1397 struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
1398 struct wm8960_priv *wm8960;
1399 int ret;
1400
1401 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
1402 GFP_KERNEL);
1403 if (wm8960 == NULL)
1404 return -ENOMEM;
1405
1406 wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
1407 if (IS_ERR(wm8960->mclk)) {
1408 if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
1409 return -EPROBE_DEFER;
1410 }
1411
1412 wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
1413 if (IS_ERR(wm8960->regmap))
1414 return PTR_ERR(wm8960->regmap);
1415
1416 if (pdata)
1417 memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
1418 else if (i2c->dev.of_node)
1419 wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
1420
1421 ret = wm8960_reset(wm8960->regmap);
1422 if (ret != 0) {
1423 dev_err(&i2c->dev, "Failed to issue reset\n");
1424 return ret;
1425 }
1426
1427 if (wm8960->pdata.shared_lrclk) {
1428 ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
1429 0x4, 0x4);
1430 if (ret != 0) {
1431 dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
1432 ret);
1433 return ret;
1434 }
1435 }
1436
1437 /* Latch the update bits */
1438 regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
1439 regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
1440 regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
1441 regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
1442 regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
1443 regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
1444 regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
1445 regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
1446 regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
1447 regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
1448
1449 i2c_set_clientdata(i2c, wm8960);
1450
1451 ret = devm_snd_soc_register_component(&i2c->dev,
1452 &soc_component_dev_wm8960, &wm8960_dai, 1);
1453
1454 return ret;
1455 }
1456
1457 static int wm8960_i2c_remove(struct i2c_client *client)
1458 {
1459 return 0;
1460 }
1461
1462 static const struct i2c_device_id wm8960_i2c_id[] = {
1463 { "wm8960", 0 },
1464 { }
1465 };
1466 MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1467
1468 static const struct of_device_id wm8960_of_match[] = {
1469 { .compatible = "wlf,wm8960", },
1470 { }
1471 };
1472 MODULE_DEVICE_TABLE(of, wm8960_of_match);
1473
1474 static struct i2c_driver wm8960_i2c_driver = {
1475 .driver = {
1476 .name = "wm8960",
1477 .of_match_table = wm8960_of_match,
1478 },
1479 .probe = wm8960_i2c_probe,
1480 .remove = wm8960_i2c_remove,
1481 .id_table = wm8960_i2c_id,
1482 };
1483
1484 module_i2c_driver(wm8960_i2c_driver);
1485
1486 MODULE_DESCRIPTION("ASoC WM8960 driver");
1487 MODULE_AUTHOR("Liam Girdwood");
1488 MODULE_LICENSE("GPL");
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